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Fix nxstyle warning

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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
This commit is contained in:
Xiang Xiao 2020-04-13 16:08:03 +08:00 committed by patacongo
parent b22e3b9e28
commit d3c4879113
18 changed files with 523 additions and 372 deletions
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4
arch/arm/src/stm32/stm32_adc.c
View File

@ -92,7 +92,7 @@
#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || \
defined(CONFIG_STM32_ADC3) || defined(CONFIG_STM32_ADC4)
/* This implementation is for the STM32 ADC IP version 1 and STM32 ADC IP version 2 */
/* This implementation is for the STM32 ADC IP version 1 and 2 */
#if !defined(HAVE_IP_ADC_V1) && !defined(HAVE_IP_ADC_V2)
# error "STM32 ADC IP version not specified"
@ -220,7 +220,7 @@
# endif
#endif
/* DMA channels and interface values differs according to STM32 DMA IP core version */
/* DMA values differs according to STM32 DMA IP core version */
#if defined(HAVE_IP_DMA_V2)
# define ADC_DMA_CONTROL_WORD (DMA_SCR_MSIZE_16BITS | \

2
arch/arm/src/stm32/stm32_hciuart.c
View File

@ -2288,7 +2288,7 @@ static ssize_t hciuart_write(const struct btuart_lowerhalf_s *lower,
}
}
/* If the Tx buffer is not empty, then exit with the Tx interrupts enabled. */
/* If Tx buffer is not empty, then exit with Tx interrupts enabled. */
if (state->txhead != state->txtail)
{

2
arch/arm/src/stm32f0l0g0/stm32_adc.c
View File

@ -110,7 +110,7 @@
# define ADC_MAX_SAMPLES ADC_MAX_CHANNELS_NODMA
#endif
/* DMA channels and interface values differs according to STM32 DMA IP core version */
/* DMA values differs according to STM32 DMA IP core version */
#if defined(HAVE_IP_DMA_V1)
# define ADC_DMA_CONTROL_WORD (DMA_CCR_MSIZE_16BITS | \

4
arch/mips/src/pic32mx/pic32mx-gpio.c
View File

@ -170,7 +170,7 @@ int pic32mx_configgpio(uint16_t cfgset)
#if defined(CHIP_PIC32MX1) || defined(CHIP_PIC32MX2)
putreg32(mask, base + PIC32MX_IOPORT_ANSELCLR_OFFSET);
#endif
/* It is an output; clear the corresponding bit in the TRIS register */
/* It is an output; clear the corresponding bit in TRIS register */
putreg32(mask, base + PIC32MX_IOPORT_TRISCLR_OFFSET);
@ -199,7 +199,7 @@ int pic32mx_configgpio(uint16_t cfgset)
}
else
{
/* It is an input; set the corresponding bit in the TRIS register. */
/* It is an input; set the corresponding bit in TRIS register. */
putreg32(mask, base + PIC32MX_IOPORT_TRISSET_OFFSET);
putreg32(mask, base + PIC32MX_IOPORT_ODCCLR_OFFSET);

6
arch/mips/src/pic32mx/pic32mx-lowconsole.c
View File

@ -326,9 +326,9 @@ void pic32mx_uartconfigure(uintptr_t uart_base, uint32_t baudrate,
* Name: pic32mx_consoleinit
*
* Description:
* Initialize a low-level console for debug output. This function is called
* very early in the initialization sequence to configure the serial console
* UART (only).
* Initialize a low-level console for debug output. This function is
* called very early in the initialization sequence to configure the
* serial console UART (only).
*
****************************************************************************/

511
arch/mips/src/pic32mx/pic32mx-usbdev.c
View File

File diff suppressed because it is too large Load Diff

11
arch/mips/src/pic32mz/pic32mz-gpio.c
View File

@ -61,6 +61,7 @@
/****************************************************************************
* Public Data
****************************************************************************/
/* This table can be used to map a port number to a IOPORT base address. For
* example, an index of zero would correspond to IOPORTA, one with IOPORTB,
* etc.
@ -143,12 +144,14 @@ static inline unsigned int pic32mz_slewrate(pinset_t pinset)
static inline unsigned int pic32mz_slewratecon0(pinset_t pinset)
{
return (pic32mz_slewrate(pinset) & GPIO_SR_CON0_MASK) >> GPIO_SR_CON0_SHIFT;
return (pic32mz_slewrate(pinset) & GPIO_SR_CON0_MASK) >>
GPIO_SR_CON0_SHIFT;
}
static inline unsigned int pic32mz_slewratecon1(pinset_t pinset)
{
return (pic32mz_slewrate(pinset) & GPIO_SR_CON1_MASK) >> GPIO_SR_CON1_SHIFT;
return (pic32mz_slewrate(pinset) & GPIO_SR_CON1_MASK) >>
GPIO_SR_CON1_SHIFT;
}
/****************************************************************************
@ -206,7 +209,7 @@ int pic32mz_configgpio(pinset_t cfgset)
putreg32(mask, base + PIC32MZ_IOPORT_ANSELCLR_OFFSET);
/* It is an output; clear the corresponding bit in the TRIS register */
/* It is an output; clear the corresponding bit in TRIS register */
putreg32(mask, base + PIC32MZ_IOPORT_TRISCLR_OFFSET);
@ -235,7 +238,7 @@ int pic32mz_configgpio(pinset_t cfgset)
}
else
{
/* It is an input; set the corresponding bit in the TRIS register. */
/* It is an input; set the corresponding bit in TRIS register. */
putreg32(mask, base + PIC32MZ_IOPORT_TRISSET_OFFSET);
putreg32(mask, base + PIC32MZ_IOPORT_ODCCLR_OFFSET);

6
boards/arm/cxd56xx/drivers/audio/cxd56_audio_analog.c
View File

@ -163,7 +163,8 @@ CXD56_AUDIO_ECODE cxd56_audio_analog_poweroff(void)
return ret;
}
CXD56_AUDIO_ECODE cxd56_audio_analog_poweron_input(FAR cxd56_audio_mic_gain_t *gain)
CXD56_AUDIO_ECODE
cxd56_audio_analog_poweron_input(FAR cxd56_audio_mic_gain_t *gain)
{
CXD56_AUDIO_ECODE ret = CXD56_AUDIO_ECODE_OK;
@ -276,7 +277,8 @@ CXD56_AUDIO_ECODE cxd56_audio_analog_disable_output(void)
return ret;
}
CXD56_AUDIO_ECODE cxd56_audio_analog_set_micgain(FAR cxd56_audio_mic_gain_t *gain)
CXD56_AUDIO_ECODE
cxd56_audio_analog_set_micgain(FAR cxd56_audio_mic_gain_t *gain)
{
CXD56_AUDIO_ECODE ret = CXD56_AUDIO_ECODE_OK;

20
boards/arm/lpc214x/mcu123-lpc214x/src/lpc2148_spi1.c
View File

@ -142,7 +142,11 @@ static const struct spi_ops_s g_spiops =
.registercallback = 0, /* Not implemented */
};
static struct spi_dev_s g_spidev = {&g_spiops};
static struct spi_dev_s g_spidev =
{
&g_spiops
};
static sem_t g_exclsem = SEM_INITIALIZER(1); /* For mutually exclusive access */
/****************************************************************************
@ -303,8 +307,8 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev,
static uint8_t spi_status(FAR struct spi_dev_s *dev, uint32_t devid)
{
/* I don't think there is anyway to determine these things on the mcu123.com
* board.
/* I don't think there is anyway to determine these things on the
* mcu123.com board.
*/
spiinfo("Return SPI_STATUS_PRESENT\n");
@ -441,9 +445,9 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
}
/* There is a race condition where TFE may go true just before
* RNE goes true and this loop terminates prematurely. The nasty little
* delay in the following solves that (it could probably be tuned
* to improve performance).
* RNE goes true and this loop terminates prematurely. The nasty
* little delay in the following solves that (it could probably
* be tuned to improve performance).
*/
else if ((sr & LPC214X_SPI1SR_TFE) != 0)
@ -479,7 +483,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
size_t nwords)
{
FAR uint8_t *ptr = (FAR uint8_t*)buffer;
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
uint32_t rxpending = 0;
/* While there is remaining to be sent
@ -504,7 +508,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
rxpending++;
}
/* Now, read the RX data from the RX FIFO while the RX FIFO is not empty */
/* Now, read RX data from the RX FIFO while RX FIFO is not empty */
spiinfo("RX: rxpending: %d\n", rxpending);
while (getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE)

67
boards/arm/str71x/olimex-strp711/src/str71_spi.c
View File

@ -233,8 +233,8 @@
* P1.10/USBCLK 10/14 WP P1.10 input
* P1.15/HTXD 13/15 CP P1.15 input
*
* Use of SPI1 doesn't conflict with anything. WP conflicts USB; CP conflicts
* with HTXD.
* Use of SPI1 doesn't conflict with anything. WP conflicts USB;
* CP conflicts with HTXD.
*/
/* MMC/SD additional pins */
@ -441,7 +441,10 @@ static const struct spi_ops_s g_spiops =
#ifdef CONFIG_STR71X_BSPI0
static struct str71x_spidev_s g_spidev0 =
{
.spidev = { &g_spiops },
.spidev =
{
&g_spiops
},
.spibase = STR71X_BSPI0_BASE,
.csbit = ENC_GPIO0_CS,
.exclsem = SEM_INITIALIZER(1)
@ -451,7 +454,10 @@ static struct str71x_spidev_s g_spidev0 =
#ifdef CONFIG_STR71X_BSPI1
static struct str71x_spidev_s g_spidev1 =
{
.spidev = { &g_spiops },
.spidev =
{
&g_spiops
},
.spibase = STR71X_BSPI1_BASE,
.csbit = MMCSD_GPIO0_CS,
.exclsem = SEM_INITIALIZER(1)
@ -528,23 +534,32 @@ static inline void spi_drain(FAR struct str71x_spidev_s *priv)
#if CONFIG_STR714X_BSPI0_TXFIFO_DEPTH > 1
/* Wait while the TX FIFO is full */
while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFF) != 0);
while (spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFF)
{
}
#else
/* Wait until the TX FIFO is empty */
while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFE) == 0);
while (!(spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFE))
{
}
#endif
/* Write 0xff to the TX FIFO */
spi_putreg(priv, STR71X_BSPI_TXR_OFFSET, 0xff00);
/* Wait for the TX FIFO empty */
while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFNE) != 0);
while (spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFNE)
{
}
/* Wait for the RX FIFO not empty */
while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_RFNE) == 0);
while (!(spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_RFNE))
{
}
/* Then read and discard bytes until the RX FIFO is empty */
@ -552,7 +567,7 @@ static inline void spi_drain(FAR struct str71x_spidev_s *priv)
{
spi_getreg(priv, STR71X_BSPI_RXR_OFFSET);
}
while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_RFNE) != 0);
while (spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_RFNE);
}
/****************************************************************************
@ -793,11 +808,15 @@ static uint32_t spi_send(FAR struct spi_dev_s *dev, uint32_t wd)
#if CONFIG_STR714X_BSPI0_TXFIFO_DEPTH > 1
/* Wait while the TX FIFO is full */
while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFF) != 0);
while (spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFF)
{
}
#else
/* Wait until the TX FIFO is empty */
while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFE) == 0);
while (!(spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFE))
{
}
#endif
/* Write the byte to the TX FIFO */
@ -806,7 +825,9 @@ static uint32_t spi_send(FAR struct spi_dev_s *dev, uint32_t wd)
/* Wait for the RX FIFO not empty */
while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_RFNE) == 0);
while (!(spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_RFNE))
{
}
/* Get the received value from the RX FIFO and return it */
@ -825,14 +846,16 @@ static uint32_t spi_send(FAR struct spi_dev_s *dev, uint32_t wd)
* buflen - the length of data to send from the buffer in number of words.
* The wordsize is determined by the number of bits-per-word
* selected for the SPI interface. If nbits <= 8, the data is
* packed into uint8_t's; if nbits >8, the data is packed into uint16_t's
* packed into uint8_t's; if nbits >8, the data is packed into
* uint16_t's
*
* Returned Value:
* None
*
****************************************************************************/
static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t buflen)
static void spi_sndblock(FAR struct spi_dev_s *dev,
FAR const void *buffer, size_t buflen)
{
FAR struct str71x_spidev_s *priv = (FAR struct str71x_spidev_s *)dev;
FAR const uint8_t *ptr = (FAR const uint8_t *)buffer;
@ -846,7 +869,8 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
{
/* While the TX FIFO is not full and there are bytes left to send */
while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFF) == 0 && buflen > 0)
while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) &
STR71X_BSPICSR2_TFF) == 0 && buflen > 0)
{
/* Send the data */
@ -882,7 +906,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
csr2 = spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET);
}
}
while ((csr2 & STR71X_BSPICSR2_RFNE) != 0 || (csr2 & STR71X_BSPICSR2_TFNE) == 0);
while ((csr2 & STR71X_BSPICSR2_RFNE) || !(csr2 & STR71X_BSPICSR2_TFNE));
}
/****************************************************************************
@ -910,7 +934,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
size_t buflen)
{
FAR struct str71x_spidev_s *priv = (FAR struct str71x_spidev_s *)dev;
FAR uint8_t *ptr = (FAR uint8_t*)buffer;
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
uint32_t fifobytes = 0;
DEBUGASSERT(priv && priv->spibase);
@ -927,17 +951,18 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
* and (3) there are more bytes to be sent.
*/
while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFF) == 0 &&
(fifobytes < CONFIG_STR714X_BSPI0_TXFIFO_DEPTH) && buflen > 0)
while (spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFF
&& fifobytes < CONFIG_STR714X_BSPI0_TXFIFO_DEPTH && buflen > 0)
{
spi_putreg(priv, STR71X_BSPI_TXR_OFFSET, 0xff00);
buflen--;
fifobytes++;
}
/* Now, read the RX data from the RX FIFO while the RX FIFO is not empty */
/* Now, read RX data from RX FIFO while RX FIFO is not empty */
while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_RFNE) != 0)
while (spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET)
& STR71X_BSPICSR2_RFNE)
{
*ptr++ = (uint8_t)(spi_getreg(priv, STR71X_BSPI_RXR_OFFSET) >> 8);
fifobytes--;

6
drivers/mmcsd/mmcsd_spi.c
View File

@ -944,7 +944,7 @@ static int mmcsd_getcardinfo(FAR struct mmcsd_slot_s *slot, uint8_t *buffer,
return -EIO;
}
/* Try up to 8 times to find the start of block (or until an error occurs) */
/* Try up to 8 times to find the start of block or until an error occurs */
for (i = 0; i < 8; i++)
{
@ -1427,7 +1427,7 @@ static ssize_t mmcsd_write(FAR struct inode *inode,
if (nsectors == 1)
{
/* Send CMD24 (WRITE_BLOCK) and verify that good R1 status is returned */
/* Send CMD24(WRITE_BLOCK) and verify that good R1 is returned */
response = mmcsd_sendcmd(slot, &g_cmd24, offset);
if (response != MMCSD_SPIR1_OK)
@ -1720,7 +1720,7 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
result = mmcsd_sendcmd(slot, &g_cmd8, 0x1aa);
if (result == MMCSD_SPIR1_IDLESTATE)
{
/* Verify the operating voltage and that the 0xaa was correctly echoed */
/* Verify the operating voltage and 0xaa was correctly echoed */
if (((slot->r7 & MMCSD_SPIR7_VOLTAGE_MASK) ==
MMCSD_SPIR7_VOLTAGE_27) &&

2
drivers/wireless/gs2200m.c
View File

@ -38,7 +38,7 @@
*
* See "GS2200MS2W Adapter Command Reference Guide" for the explanation
* of AT commands. You can find the document at:
* https://www.telit.com/m2m-iot-products/wifi-bluetooth-modules/wi-fi-gs2200m/
* https://telit.com/m2m-iot-products/wifi-bluetooth-modules/wi-fi-gs2200m/
*
****************************************************************************/

6
drivers/wireless/ieee80211/bcm43xxx/mmc_sdio.c
View File

@ -77,7 +77,7 @@ begin_packed_struct struct sdio_cmd53
uint32_t rw_flag : 1;
} end_packed_struct;
begin_packed_struct struct sdio_resp_R5
begin_packed_struct struct sdio_resp_r5
{
uint32_t data : 8;
struct
@ -131,7 +131,7 @@ int sdio_io_rw_direct(FAR struct sdio_dev_s *dev, bool write,
uint8_t inb, uint8_t *outb)
{
union sdio_cmd5x arg;
struct sdio_resp_R5 resp;
struct sdio_resp_r5 resp;
uint32_t data;
int ret;
@ -194,7 +194,7 @@ int sdio_io_rw_extended(FAR struct sdio_dev_s *dev, bool write,
unsigned int blocklen, unsigned int nblocks)
{
union sdio_cmd5x arg;
struct sdio_resp_R5 resp;
struct sdio_resp_r5 resp;
uint32_t data;
int ret;
sdio_eventset_t wkupevent;

40
drivers/wireless/lpwan/sx127x/sx127x.c
View File

@ -409,10 +409,10 @@ static int sx127x_preamble_get(FAR struct sx127x_dev_s *dev);
static int sx127x_opmode_set(FAR struct sx127x_dev_s *dev, uint8_t opmode);
static uint8_t sx127x_opmode_get(FAR struct sx127x_dev_s *dev);
static int sx127x_opmode_init(FAR struct sx127x_dev_s *dev, uint8_t opmode);
static int sx127x_syncword_set(FAR struct sx127x_dev_s *dev, FAR uint8_t *sw,
uint8_t len);
static void sx127x_syncword_get(FAR struct sx127x_dev_s *dev, FAR uint8_t *sw,
FAR uint8_t *len);
static int sx127x_syncword_set(FAR struct sx127x_dev_s *dev,
FAR uint8_t *sw, uint8_t len);
static void sx127x_syncword_get(FAR struct sx127x_dev_s *dev,
FAR uint8_t *sw, FAR uint8_t *len);
#ifdef CONFIG_DEBUG_WIRELESS_INFO
static void sx127x_dumpregs(FAR struct sx127x_dev_s *dev);
#else
@ -1311,7 +1311,7 @@ static int sx127x_lora_isr0_process(FAR struct sx127x_dev_s *dev)
case SX127X_OPMODE_RX:
case SX127X_OPMODE_RXSINGLE:
{
/* REVISIT: Always check PAYLOADCRCERR, even if CRCONPAYLOAD not set */
/* REVISIT: Always check PAYLOADCRCERR even CRCONPAYLOAD not set */
if ((irq & SX127X_LRM_IRQ_PAYLOADCRCERR) != 0)
{
@ -1752,8 +1752,8 @@ static ssize_t sx127x_rxfifo_get(FAR struct sx127x_dev_s *dev,
/* Get packet header */
pkt = (struct sx127x_read_hdr_s *)(dev->rx_buffer +
dev->nxt_read * SX127X_RXFIFO_ITEM_SIZE);
pkt = (struct sx127x_read_hdr_s *)
(dev->rx_buffer + dev->nxt_read * SX127X_RXFIFO_ITEM_SIZE);
/* Packet length is data length + header length */
@ -1763,7 +1763,8 @@ static ssize_t sx127x_rxfifo_get(FAR struct sx127x_dev_s *dev,
for (i = 0; i < pktlen && i < SX127X_RXFIFO_ITEM_SIZE; i += 1)
{
buffer[i] = dev->rx_buffer[dev->nxt_read * SX127X_RXFIFO_ITEM_SIZE + i];
buffer[i] =
dev->rx_buffer[dev->nxt_read * SX127X_RXFIFO_ITEM_SIZE + i];
}
dev->nxt_read = (dev->nxt_read + 1) % CONFIG_LPWAN_SX127X_RXFIFO_LEN;
@ -2111,8 +2112,8 @@ static int sx127x_fskook_opmode_init(FAR struct sx127x_dev_s *dev,
* - RX trigger on PreableDetect
*/
setbits = (SX127X_FOM_RXCFG_AGCAUTOON | SX127X_FOM_RXCFG_AFCAUTOON |
SX127X_FOM_RXCFG_TRG_PREDET);
setbits = (SX127X_FOM_RXCFG_AGCAUTOON | SX127X_FOM_RXCFG_AFCAUTOON
| SX127X_FOM_RXCFG_TRG_PREDET);
sx127x_writeregbyte(dev, SX127X_FOM_RXCFG, setbits);
@ -2204,7 +2205,8 @@ errout:
*
****************************************************************************/
static int sx127x_fskook_rxbw_set(FAR struct sx127x_dev_s *dev, uint8_t rx_bw)
static int sx127x_fskook_rxbw_set(FAR struct sx127x_dev_s *dev,
uint8_t rx_bw)
{
DEBUGASSERT(dev->modulation == SX127X_MODULATION_FSK ||
dev->modulation == SX127X_MODULATION_OOK);
@ -2568,9 +2570,9 @@ static void sx127x_fskook_init(FAR struct sx127x_dev_s *dev)
*/
setbits = 0;
setbits |= (dev->fskook.fixlen == true ? 0 : SX127X_FOM_PKTCFG1_PCKFORMAT);
setbits |= (dev->crcon == true ? SX127X_FOM_PKTCFG1_CRCON : 0);
clrbits = (SX127X_FOM_PKTCFG1_PCKFORMAT | SX127X_FOM_PKTCFG1_CRCON);
setbits |= dev->fskook.fixlen == true ? 0 : SX127X_FOM_PKTCFG1_PCKFORMAT;
setbits |= dev->crcon == true ? SX127X_FOM_PKTCFG1_CRCON : 0;
clrbits = SX127X_FOM_PKTCFG1_PCKFORMAT | SX127X_FOM_PKTCFG1_CRCON;
/* Write packet mode settings 1 */
@ -3303,7 +3305,7 @@ static void sx127x_lora_init(FAR struct sx127x_dev_s *dev)
/* Modem PHY config 2:
* - RXCRCON
* NOTE: this works differently for implicit header and explicit header!
* NOTE: this works differently for implicit header and explicit header
* - packet mode
*/
@ -3498,8 +3500,8 @@ static int sx127x_lora_preamble_get(FAR struct sx127x_dev_s *dev)
* Name: sx127x_syncword_get
****************************************************************************/
static void sx127x_syncword_get(FAR struct sx127x_dev_s *dev, FAR uint8_t *sw,
FAR uint8_t *len)
static void sx127x_syncword_get(FAR struct sx127x_dev_s *dev,
FAR uint8_t *sw, FAR uint8_t *len)
{
dev->ops.syncword_get(dev, sw, len);
}
@ -3508,8 +3510,8 @@ static void sx127x_syncword_get(FAR struct sx127x_dev_s *dev, FAR uint8_t *sw,
* Name: sx127x_syncword_set
****************************************************************************/
static int sx127x_syncword_set(FAR struct sx127x_dev_s *dev, FAR uint8_t *sw,
uint8_t len)
static int sx127x_syncword_set(FAR struct sx127x_dev_s *dev,
FAR uint8_t *sw, uint8_t len)
{
return dev->ops.syncword_set(dev, sw, len);
}

3
fs/partition/fs_ptable.c
View File

@ -84,7 +84,8 @@ static int read_partition_block(FAR struct partition_state_s *state,
{
if (state->blk)
{
return state->blk->u.i_bops->read(state->blk, buffer, startblock, nblocks);
return state->blk->u.i_bops->read(state->blk,
buffer, startblock, nblocks);
}
else
{

14
include/nuttx/sdio.h
View File

@ -640,13 +640,13 @@
*
****************************************************************************/
#define SDIO_RECVR1(dev,cmd,R1) ((dev)->recv_r1(dev,cmd,R1)) /* 48-bit */
#define SDIO_RECVR2(dev,cmd,R2) ((dev)->recv_r2(dev,cmd,R2)) /* 136-bit */
#define SDIO_RECVR3(dev,cmd,R3) ((dev)->recv_r3(dev,cmd,R3)) /* 48-bit */
#define SDIO_RECVR4(dev,cmd,R4) ((dev)->recv_r4(dev,cmd,R4)) /* 48-bit */
#define SDIO_RECVR5(dev,cmd,R5) ((dev)->recv_r5(dev,cmd,R5)) /* 48-bit */
#define SDIO_RECVR6(dev,cmd,R6) ((dev)->recv_r6(dev,cmd,R6)) /* 48-bit */
#define SDIO_RECVR7(dev,cmd,R7) ((dev)->recv_r7(dev,cmd,R7)) /* 48-bit */
#define SDIO_RECVR1(dev,cmd,r1) ((dev)->recv_r1(dev,cmd,r1)) /* 48-bit */
#define SDIO_RECVR2(dev,cmd,r2) ((dev)->recv_r2(dev,cmd,r2)) /* 136-bit */
#define SDIO_RECVR3(dev,cmd,r3) ((dev)->recv_r3(dev,cmd,r3)) /* 48-bit */
#define SDIO_RECVR4(dev,cmd,r4) ((dev)->recv_r4(dev,cmd,r4)) /* 48-bit */
#define SDIO_RECVR5(dev,cmd,r5) ((dev)->recv_r5(dev,cmd,r5)) /* 48-bit */
#define SDIO_RECVR6(dev,cmd,r6) ((dev)->recv_r6(dev,cmd,r6)) /* 48-bit */
#define SDIO_RECVR7(dev,cmd,r7) ((dev)->recv_r7(dev,cmd,r7)) /* 48-bit */
/****************************************************************************
* Name: SDIO_WAITENABLE

32
wireless/ieee802154/mac802154_get_mhrlen.c
View File

@ -54,7 +54,18 @@
#include <nuttx/wireless/ieee802154/ieee802154_mac.h>
/****************************************************************************
* Public MAC Functions
* Private Data
****************************************************************************/
/* Map between ieee802154_addrmode_e enum and actual address length */
static const uint8_t mac802154_addr_length[4] =
{
0, 0, 2, 8
};
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
@ -72,8 +83,9 @@ int mac802154_get_mhrlen(MACHANDLE mac,
(FAR struct ieee802154_privmac_s *)mac;
int ret = 3; /* Always frame control (2 bytes) and seq. num (1 byte) */
/* Check to make sure both the dest address and the source address are not set
* to NONE */
/* Check to make sure both the dest address and the source address are not
* set to NONE
*/
if (meta->destaddr.mode == IEEE802154_ADDRMODE_NONE &&
meta->srcmode == IEEE802154_ADDRMODE_NONE)
@ -81,7 +93,9 @@ int mac802154_get_mhrlen(MACHANDLE mac,
return -EINVAL;
}
/* The source address can only be set to NONE if the device is the PAN coord */
/* The source address can only be set to NONE
* if the device is the PAN coord
*/
if (meta->srcmode == IEEE802154_ADDRMODE_NONE &&
priv->devmode != IEEE802154_DEVMODE_PANCOORD)
@ -95,10 +109,10 @@ int mac802154_get_mhrlen(MACHANDLE mac,
/* Add the source address length */
ret += mac802154_addr_length[ meta->srcmode];
ret += mac802154_addr_length[meta->srcmode];
/* If both destination and source addressing information is present, the MAC
* sublayer shall compare the destination and source PAN identifiers.
/* If both destination and source addressing information is present, the
* MAC sublayer shall compare the destination and source PAN identifiers.
* [1] pg. 41.
*/
@ -117,8 +131,8 @@ int mac802154_get_mhrlen(MACHANDLE mac,
}
}
/* If we are here, PAN ID compression is off, so include the dest and source
* PAN ID if the respective address is included
/* If we are here, PAN ID compression is off, so include the dest and
* source PAN ID if the respective address is included
*/
if (meta->srcmode != IEEE802154_ADDRMODE_NONE)

159
wireless/ieee802154/mac802154_internal.h
View File

@ -67,6 +67,7 @@
****************************************************************************/
/* Configuration ************************************************************/
/* If processing is not done at the interrupt level, then work queue support
* is required.
*/
@ -85,15 +86,7 @@
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/* Map between ieee802154_addrmode_e enum and actual address length */
static const uint8_t mac802154_addr_length[4] = {0, 0, 2, 8};
/****************************************************************************
* Private Types
* Public Types
****************************************************************************/
struct mac802154_radiocb_s
@ -102,11 +95,12 @@ struct mac802154_radiocb_s
FAR struct ieee802154_privmac_s *priv;
};
/* Enumeration for representing what operation the MAC layer is currently doing.
* There can only be one command being handled at any given time, but certain
* operations such as association requires more than one command to be sent.
* Therefore, the need to track not only what command is currently active, but
* also, what overall operation the command is apart of is necessary.
/* Enumeration for representing what operation the MAC layer is currently
* doing. There can only be one command being handled at any given time, but
* certain operations such as association requires more than one command to
* be sent. Therefore, the need to track not only what command is currently
* active, but also, what overall operation the command is apart of is
* necessary.
*/
enum mac802154_operation_e
@ -126,7 +120,7 @@ enum mac802154_operation_e
struct ieee802154_privmac_s
{
/*************************** General Fields *********************************/
/*************************** General Fields *******************************/
FAR struct ieee802154_radio_s *radio; /* Contained IEEE802.15.4 radio dev */
FAR struct mac802154_maccb_s *cb; /* Head of a list of MAC callbacks */
@ -136,12 +130,13 @@ struct ieee802154_privmac_s
uint8_t nclients; /* Number of notification clients */
/* Only support a single command at any given time. As of now I see no
* condition where you need to have more than one command frame simultaneously
* condition where you need to have more than one command frame
* simultaneously
*/
sem_t opsem; /* Exclusive operations */
/******************* Fields related to MAC operations ***********************/
/******************* Fields related to MAC operations *********************/
enum mac802154_operation_e curr_op; /* The current overall operation */
enum ieee802154_cmdid_e curr_cmd; /* Type of the current cmd */
@ -149,7 +144,7 @@ struct ieee802154_privmac_s
uint8_t nrxusers;
struct work_s macop_work;
/******************* Fields related to SCAN operation ***********************/
/******************* Fields related to SCAN operation *********************/
uint8_t scanindex;
uint8_t edlist[15];
@ -159,13 +154,14 @@ struct ieee802154_privmac_s
struct ieee802154_scan_req_s currscan;
uint32_t scansymdur;
/******************* Fields related to notifications ************************/
/******************* Fields related to notifications **********************/
sq_queue_t primitive_queue; /* Queue of primitives to pass via notify()
* callback to registered receivers */
struct work_s notifwork; /* For deferring notifications to LPWORK queue*/
* callback to registered receivers
*/
struct work_s notifwork; /* For deferring notifications to LPWORK queue */
/******************* Tx descriptor queues and pools *************************/
/******************* Tx descriptor queues and pools ***********************/
struct ieee802154_txdesc_s txdesc_pool[CONFIG_MAC802154_NTXDESC];
sem_t txdesc_sem;
@ -181,12 +177,13 @@ struct ieee802154_privmac_s
sq_queue_t csma_queue;
sq_queue_t gts_queue;
/* Support a singly linked list of transactions that will be sent indirectly.
* This list should only be used by a MAC acting as a coordinator. These
* transactions will stay here until the data is extracted by the destination
* device sending a Data Request MAC command or if too much time passes. This
* list should also be used to populate the address list of the outgoing
* beacon frame.
/* Support a singly linked list of transactions that will be sent
* indirectly. This list should only be used by a MAC acting as a
* coordinator. These transactions will stay here until the data
* is extracted by the destination device sending a Data Request
* MAC command or if too much time passes. This list should also
* be used to populate the address list of the outgoing beacon
* frame.
*/
sq_queue_t indirect_queue;
@ -195,15 +192,15 @@ struct ieee802154_privmac_s
sq_queue_t dataind_queue;
/************* Fields related to addressing and coordinator *****************/
/************* Fields related to addressing and coordinator ***************/
/* Holds all address information (Extended, Short, and PAN ID) for the MAC. */
/* Holds all address information (Extended, Short, and PAN ID) for MAC */
struct ieee802154_addr_s addr;
struct ieee802154_pandesc_s pandesc;
/*************** Fields related to beacon-enabled networks ******************/
/*************** Fields related to beacon-enabled networks ****************/
/* Holds attributes pertaining to the superframe specification */
@ -220,7 +217,7 @@ struct ieee802154_privmac_s
uint8_t beaconpayload[IEEE802154_MAX_BEACON_PAYLOAD_LEN];
uint8_t beaconpayloadlength;
/****************** Fields related to offloading work ***********************/
/****************** Fields related to offloading work *********************/
/* Work structures for offloading aynchronous work */
@ -229,7 +226,7 @@ struct ieee802154_privmac_s
struct work_s purge_work;
struct work_s timer_work;
/****************** Uncategorized MAC PIB attributes ***********************/
/****************** Uncategorized MAC PIB attributes **********************/
/* The maximum time to wait either for a frame intended as a response to a
* data request frame or for a broadcast frame following a beacon with the
@ -249,9 +246,9 @@ struct ieee802154_privmac_s
uint8_t dsn; /* Seq. num added to tx data or MAC frame */
/* The maximum time, in multiples of aBaseSuperframeDuration, a device shall
* wait for a response command frame to be available following a request
* command frame. [1] 128.
/* The maximum time, in multiples of aBaseSuperframeDuration, a device
* shall wait for a response command frame to be available following a
* request command frame. [1] 128.
*/
uint8_t resp_waittime;
@ -279,7 +276,7 @@ struct ieee802154_privmac_s
/* Start of 32-bit bitfield */
/* The offset, measured is symbols, between the symbol boundary at which the
/* The offset, measured is symbols, between the symbol boundary at which
* MLME captures the timestamp of each transmitted and received frame, and
* the onset of the first symbol past the SFD, namely the first symbol of
* the frames [1] pg. 129.
@ -313,6 +310,7 @@ struct ieee802154_privmac_s
uint8_t max_csmabackoffs : 3; /* Max num backoffs for CSMA algorithm
* before declaring ch access failure */
uint8_t maxretries : 3; /* Max # of retries allowed after tx fail */
/* End of 8-bit bitfield. */
/* Start of 8-bit bitfield */
@ -321,8 +319,6 @@ struct ieee802154_privmac_s
/* End of 8-bit bitfield. */
/* TODO: Add Security-related MAC PIB attributes */
};
@ -524,7 +520,7 @@ void mac802154_notify(FAR struct ieee802154_privmac_s *priv,
((GETHOST16(ptr, index) & IEEE802154_GTSDIR_MASK) >> \
IEEE802154_GTSDIR_SHIFT_MASK)
/* Helper macros for setting/receiving bits for Pending Address Specification */
/* Helper macros for setting/receiving bits for Pending Address */
#define IEEE802154_GETNPENDSADDR(ptr, index) \
((GETHOST16(ptr, index) & IEEE802154_PENDADDR_NSADDR) >> \
@ -562,8 +558,9 @@ static inline int mac802154_takesem(sem_t *sem, bool allowinterrupt)
#define mac802154_lock(dev, allowinterrupt) \
mac802154_lockpriv(dev, allowinterrupt, __FUNCTION__)
static inline int mac802154_lockpriv(FAR struct ieee802154_privmac_s *dev,
bool allowinterrupt, FAR const char *funcname)
static inline int
mac802154_lockpriv(FAR struct ieee802154_privmac_s *dev,
bool allowinterrupt, FAR const char *funcname)
{
int ret;
@ -585,8 +582,9 @@ static inline int mac802154_lockpriv(FAR struct ieee802154_privmac_s *dev,
return ret;
}
static inline void mac802154_txdesc_free(FAR struct ieee802154_privmac_s *priv,
FAR struct ieee802154_txdesc_s *txdesc)
static inline void
mac802154_txdesc_free(FAR struct ieee802154_privmac_s *priv,
FAR struct ieee802154_txdesc_s *txdesc)
{
sq_addlast((FAR sq_entry_t *)txdesc, &priv->txdesc_queue);
mac802154_givesem(&priv->txdesc_sem);
@ -603,8 +601,8 @@ static inline void mac802154_txdesc_free(FAR struct ieee802154_privmac_s *priv,
*
****************************************************************************/
static inline uint32_t mac802154_symtoticks(FAR struct ieee802154_privmac_s *priv,
uint32_t symbols)
static inline uint32_t
mac802154_symtoticks(FAR struct ieee802154_privmac_s *priv, uint32_t symbols)
{
union ieee802154_attr_u attrval;
uint32_t ret;
@ -621,18 +619,18 @@ static inline uint32_t mac802154_symtoticks(FAR struct ieee802154_privmac_s *pri
ret = ((uint64_t)attrval.phy.symdur_picosec * symbols) / (1000 * 1000);
/* This method should only be used for things that can be late. For instance,
* it's always okay to wait a little longer before disabling your receiver.
* Therefore, we force the tick count to round up.
/* This method should only be used for things that can be late. For
* instance, it's always okay to wait a little longer before disabling
* your receiver. Therefore, we force the tick count to round up.
*/
if (ret % USEC_PER_TICK == 0)
{
ret = ret/USEC_PER_TICK;
ret = ret / USEC_PER_TICK;
}
else
{
ret = ret/USEC_PER_TICK;
ret = ret / USEC_PER_TICK;
ret++;
}
@ -652,12 +650,15 @@ static inline uint32_t mac802154_symtoticks(FAR struct ieee802154_privmac_s *pri
*
****************************************************************************/
static inline void mac802154_timerstart(FAR struct ieee802154_privmac_s *priv,
static inline void
mac802154_timerstart(FAR struct ieee802154_privmac_s *priv,
uint32_t numsymbols, worker_t worker)
{
DEBUGASSERT(work_available(&priv->timer_work));
/* Schedule the work, converting the number of symbols to the number of CPU ticks */
/* Schedule the work
* converting the number of symbols to the number of CPU ticks
*/
work_queue(HPWORK, &priv->timer_work, worker, priv,
mac802154_symtoticks(priv, numsymbols));
@ -674,14 +675,16 @@ static inline void mac802154_timerstart(FAR struct ieee802154_privmac_s *priv,
*
****************************************************************************/
static inline int mac802154_timercancel(FAR struct ieee802154_privmac_s *priv)
static inline int
mac802154_timercancel(FAR struct ieee802154_privmac_s *priv)
{
work_cancel(HPWORK, &priv->timer_work);
wlinfo("Timer cancelled\n");
return OK;
}
static inline void mac802154_rxenable(FAR struct ieee802154_privmac_s *priv)
static inline void
mac802154_rxenable(FAR struct ieee802154_privmac_s *priv)
{
priv->nrxusers++;
@ -694,7 +697,8 @@ static inline void mac802154_rxenable(FAR struct ieee802154_privmac_s *priv)
}
}
static inline void mac802154_rxdisable(FAR struct ieee802154_privmac_s *priv)
static inline void
mac802154_rxdisable(FAR struct ieee802154_privmac_s *priv)
{
priv->nrxusers--;
@ -707,54 +711,61 @@ static inline void mac802154_rxdisable(FAR struct ieee802154_privmac_s *priv)
}
}
static inline void mac802154_setchannel(FAR struct ieee802154_privmac_s *priv,
uint8_t channel)
static inline void
mac802154_setchannel(FAR struct ieee802154_privmac_s *priv,
uint8_t channel)
{
priv->radio->setattr(priv->radio, IEEE802154_ATTR_PHY_CHAN,
(FAR const union ieee802154_attr_u *)&channel);
}
static inline void mac802154_setchpage(FAR struct ieee802154_privmac_s *priv,
uint8_t chpage)
static inline void
mac802154_setchpage(FAR struct ieee802154_privmac_s *priv,
uint8_t chpage)
{
priv->radio->setattr(priv->radio, IEEE802154_ATTR_PHY_CURRENT_PAGE,
(FAR const union ieee802154_attr_u *)&chpage);
}
static inline void mac802154_setpanid(FAR struct ieee802154_privmac_s *priv,
const uint8_t *panid)
static inline void
mac802154_setpanid(FAR struct ieee802154_privmac_s *priv,
FAR const uint8_t *panid)
{
IEEE802154_PANIDCOPY(priv->addr.panid, panid);
priv->radio->setattr(priv->radio, IEEE802154_ATTR_MAC_PANID,
(FAR const union ieee802154_attr_u *)panid);
}
static inline void mac802154_setsaddr(FAR struct ieee802154_privmac_s *priv,
const uint8_t *saddr)
static inline void
mac802154_setsaddr(FAR struct ieee802154_privmac_s *priv,
FAR const uint8_t *saddr)
{
IEEE802154_SADDRCOPY(priv->addr.saddr, saddr);
priv->radio->setattr(priv->radio, IEEE802154_ATTR_MAC_SADDR,
(FAR const union ieee802154_attr_u *)saddr);
}
static inline void mac802154_setcoordsaddr(FAR struct ieee802154_privmac_s *priv,
const uint8_t *saddr)
static inline void
mac802154_setcoordsaddr(FAR struct ieee802154_privmac_s *priv,
FAR const uint8_t *saddr)
{
IEEE802154_SADDRCOPY(priv->pandesc.coordaddr.saddr, saddr);
priv->radio->setattr(priv->radio, IEEE802154_ATTR_MAC_COORD_SADDR,
(FAR const union ieee802154_attr_u *)saddr);
}
static inline void mac802154_setcoordeaddr(FAR struct ieee802154_privmac_s *priv,
const uint8_t *eaddr)
static inline void
mac802154_setcoordeaddr(FAR struct ieee802154_privmac_s *priv,
FAR const uint8_t *eaddr)
{
IEEE802154_EADDRCOPY(priv->pandesc.coordaddr.eaddr, eaddr);
priv->radio->setattr(priv->radio, IEEE802154_ATTR_MAC_COORD_EADDR,
(FAR const union ieee802154_attr_u *)eaddr);
}
static inline void mac802154_setcoordaddr(FAR struct ieee802154_privmac_s *priv,
FAR const struct ieee802154_addr_s *addr)
static inline void
mac802154_setcoordaddr(FAR struct ieee802154_privmac_s *priv,
FAR const struct ieee802154_addr_s *addr)
{
memcpy(&priv->pandesc.coordaddr, addr, sizeof(struct ieee802154_addr_s));
priv->radio->setattr(priv->radio, IEEE802154_ATTR_MAC_COORD_EADDR,
@ -763,8 +774,8 @@ static inline void mac802154_setcoordaddr(FAR struct ieee802154_privmac_s *priv,
(FAR const union ieee802154_attr_u *)addr->saddr);
}
static inline void mac802154_setrxonidle(FAR struct ieee802154_privmac_s *priv,
bool rxonidle)
static inline void
mac802154_setrxonidle(FAR struct ieee802154_privmac_s *priv, bool rxonidle)
{
priv->rxonidle = rxonidle;
if (priv->rxonidle)
@ -780,8 +791,8 @@ static inline void mac802154_setrxonidle(FAR struct ieee802154_privmac_s *priv,
(FAR const union ieee802154_attr_u *)&rxonidle);
}
static inline void mac802154_setdevmode(FAR struct ieee802154_privmac_s *priv,
uint8_t mode)
static inline void
mac802154_setdevmode(FAR struct ieee802154_privmac_s *priv, uint8_t mode)
{
priv->devmode = mode;
priv->radio->setattr(priv->radio, IEEE802154_ATTR_MAC_DEVMODE,