diff --git a/arch/arm/src/stm32/stm32_adc.c b/arch/arm/src/stm32/stm32_adc.c index 129e759dd4..a3aa130205 100644 --- a/arch/arm/src/stm32/stm32_adc.c +++ b/arch/arm/src/stm32/stm32_adc.c @@ -92,7 +92,7 @@ #if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || \ defined(CONFIG_STM32_ADC3) || defined(CONFIG_STM32_ADC4) -/* This implementation is for the STM32 ADC IP version 1 and STM32 ADC IP version 2 */ +/* This implementation is for the STM32 ADC IP version 1 and 2 */ #if !defined(HAVE_IP_ADC_V1) && !defined(HAVE_IP_ADC_V2) # error "STM32 ADC IP version not specified" @@ -220,7 +220,7 @@ # endif #endif -/* DMA channels and interface values differs according to STM32 DMA IP core version */ +/* DMA values differs according to STM32 DMA IP core version */ #if defined(HAVE_IP_DMA_V2) # define ADC_DMA_CONTROL_WORD (DMA_SCR_MSIZE_16BITS | \ diff --git a/arch/arm/src/stm32/stm32_hciuart.c b/arch/arm/src/stm32/stm32_hciuart.c index ac8bb2c627..55f1946b71 100644 --- a/arch/arm/src/stm32/stm32_hciuart.c +++ b/arch/arm/src/stm32/stm32_hciuart.c @@ -2288,7 +2288,7 @@ static ssize_t hciuart_write(const struct btuart_lowerhalf_s *lower, } } - /* If the Tx buffer is not empty, then exit with the Tx interrupts enabled. */ + /* If Tx buffer is not empty, then exit with Tx interrupts enabled. */ if (state->txhead != state->txtail) { diff --git a/arch/arm/src/stm32f0l0g0/stm32_adc.c b/arch/arm/src/stm32f0l0g0/stm32_adc.c index 4e19e3060b..5cbc8bc4be 100644 --- a/arch/arm/src/stm32f0l0g0/stm32_adc.c +++ b/arch/arm/src/stm32f0l0g0/stm32_adc.c @@ -110,7 +110,7 @@ # define ADC_MAX_SAMPLES ADC_MAX_CHANNELS_NODMA #endif -/* DMA channels and interface values differs according to STM32 DMA IP core version */ +/* DMA values differs according to STM32 DMA IP core version */ #if defined(HAVE_IP_DMA_V1) # define ADC_DMA_CONTROL_WORD (DMA_CCR_MSIZE_16BITS | \ diff --git a/arch/mips/src/pic32mx/pic32mx-gpio.c b/arch/mips/src/pic32mx/pic32mx-gpio.c index d324fe0206..59c46b92dd 100644 --- a/arch/mips/src/pic32mx/pic32mx-gpio.c +++ b/arch/mips/src/pic32mx/pic32mx-gpio.c @@ -170,7 +170,7 @@ int pic32mx_configgpio(uint16_t cfgset) #if defined(CHIP_PIC32MX1) || defined(CHIP_PIC32MX2) putreg32(mask, base + PIC32MX_IOPORT_ANSELCLR_OFFSET); #endif - /* It is an output; clear the corresponding bit in the TRIS register */ + /* It is an output; clear the corresponding bit in TRIS register */ putreg32(mask, base + PIC32MX_IOPORT_TRISCLR_OFFSET); @@ -199,7 +199,7 @@ int pic32mx_configgpio(uint16_t cfgset) } else { - /* It is an input; set the corresponding bit in the TRIS register. */ + /* It is an input; set the corresponding bit in TRIS register. */ putreg32(mask, base + PIC32MX_IOPORT_TRISSET_OFFSET); putreg32(mask, base + PIC32MX_IOPORT_ODCCLR_OFFSET); diff --git a/arch/mips/src/pic32mx/pic32mx-lowconsole.c b/arch/mips/src/pic32mx/pic32mx-lowconsole.c index 5037e76094..492bc54b6c 100644 --- a/arch/mips/src/pic32mx/pic32mx-lowconsole.c +++ b/arch/mips/src/pic32mx/pic32mx-lowconsole.c @@ -326,9 +326,9 @@ void pic32mx_uartconfigure(uintptr_t uart_base, uint32_t baudrate, * Name: pic32mx_consoleinit * * Description: - * Initialize a low-level console for debug output. This function is called - * very early in the initialization sequence to configure the serial console - * UART (only). + * Initialize a low-level console for debug output. This function is + * called very early in the initialization sequence to configure the + * serial console UART (only). * ****************************************************************************/ diff --git a/arch/mips/src/pic32mx/pic32mx-usbdev.c b/arch/mips/src/pic32mx/pic32mx-usbdev.c index ba04317407..46cfe1f19c 100644 --- a/arch/mips/src/pic32mx/pic32mx-usbdev.c +++ b/arch/mips/src/pic32mx/pic32mx-usbdev.c @@ -73,6 +73,7 @@ /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ + /* Configuration ************************************************************/ #ifndef CONFIG_USBDEV_EP0_MAXSIZE @@ -90,6 +91,7 @@ #define CONFIG_USBDEV_NOWRITEAHEAD 1 /* Fixes some problems with IN transfers */ /* Interrupts ***************************************************************/ + /* Initial interrupt sets */ #ifdef CONFIG_USB_SOFINTS @@ -105,6 +107,7 @@ USB_INT_TRN | USB_INT_IDLE | USB_INT_STALL) /* Endpoints ****************************************************************/ + /* Endpoint identifiers. The PIC32MX supports up to 16 mono-directional or 8 * bidirectional endpoints. However, when you take into account PMA buffer * usage (see below) and the fact that EP0 is bidirectional, then there is @@ -176,6 +179,7 @@ #define RESTART_DELAY (150 * CLOCKS_PER_SEC / 1000) /* USB trace ****************************************************************/ + /* Trace error codes */ #define PIC32MX_TRACEERR_ALLOCFAIL 0x0001 @@ -270,6 +274,7 @@ #endif /* Debug ********************************************************************/ + /* CONFIG_PIC32MX_USBDEV_REGDEBUG enables dumping of all low-level register * access and BDT accesses. Normally, this generates so much debug output * that USB may not even be functional. @@ -437,108 +442,108 @@ static void pic32mx_putreg(uint16_t val, uint32_t addr); /* Suspend/Resume Helpers ***************************************************/ -static void pic32mx_suspend(struct pic32mx_usbdev_s *priv); -static void pic32mx_resume(struct pic32mx_usbdev_s *priv); +static void pic32mx_suspend(struct pic32mx_usbdev_s *priv); +static void pic32mx_resume(struct pic32mx_usbdev_s *priv); /* Request Queue Management *************************************************/ static struct pic32mx_req_s *pic32mx_remfirst(struct pic32mx_queue_s *queue); static struct pic32mx_req_s *pic32mx_remlast(struct pic32mx_queue_s *queue); -static void pic32mx_addlast(struct pic32mx_queue_s *queue, +static void pic32mx_addlast(struct pic32mx_queue_s *queue, struct pic32mx_req_s *req); -static void pic32mx_addfirst(struct pic32mx_queue_s *queue, +static void pic32mx_addfirst(struct pic32mx_queue_s *queue, struct pic32mx_req_s *req); /* Request Helpers **********************************************************/ -static void pic32mx_reqreturn(struct pic32mx_ep_s *privep, +static void pic32mx_reqreturn(struct pic32mx_ep_s *privep, struct pic32mx_req_s *privreq, int16_t result); -static void pic32mx_reqcomplete(struct pic32mx_ep_s *privep, +static void pic32mx_reqcomplete(struct pic32mx_ep_s *privep, int16_t result); -static void pic32mx_epwrite(struct pic32mx_ep_s *privep, +static void pic32mx_epwrite(struct pic32mx_ep_s *privep, volatile struct usbotg_bdtentry_s *bdt, const uint8_t *src, uint32_t nbytes); -static void pic32mx_wrcomplete(struct pic32mx_usbdev_s *priv, +static void pic32mx_wrcomplete(struct pic32mx_usbdev_s *priv, struct pic32mx_ep_s *privep); -static void pic32mx_rqrestart(int argc, uint32_t arg1, ...); -static void pic32mx_delayedrestart(struct pic32mx_usbdev_s *priv, +static void pic32mx_rqrestart(int argc, uint32_t arg1, ...); +static void pic32mx_delayedrestart(struct pic32mx_usbdev_s *priv, uint8_t epno); -static void pic32mx_rqstop(struct pic32mx_ep_s *privep); -static int pic32mx_wrstart(struct pic32mx_usbdev_s *priv, +static void pic32mx_rqstop(struct pic32mx_ep_s *privep); +static int pic32mx_wrstart(struct pic32mx_usbdev_s *priv, struct pic32mx_ep_s *privep); -static int pic32mx_wrrequest(struct pic32mx_usbdev_s *priv, +static int pic32mx_wrrequest(struct pic32mx_usbdev_s *priv, struct pic32mx_ep_s *privep); -static int pic32mx_rdcomplete(struct pic32mx_usbdev_s *priv, +static int pic32mx_rdcomplete(struct pic32mx_usbdev_s *priv, struct pic32mx_ep_s *privep); -static int pic32mx_ep0rdsetup(struct pic32mx_usbdev_s *priv, +static int pic32mx_ep0rdsetup(struct pic32mx_usbdev_s *priv, uint8_t *dest, int readlen); -static int pic32mx_rdsetup(struct pic32mx_ep_s *privep, uint8_t *dest, +static int pic32mx_rdsetup(struct pic32mx_ep_s *privep, uint8_t *dest, int readlen); -static int pic32mx_rdrequest(struct pic32mx_usbdev_s *priv, +static int pic32mx_rdrequest(struct pic32mx_usbdev_s *priv, struct pic32mx_ep_s *privep); -static void pic32mx_cancelrequests(struct pic32mx_ep_s *privep, +static void pic32mx_cancelrequests(struct pic32mx_ep_s *privep, int16_t result); /* Interrupt level processing ***********************************************/ -static void pic32mx_dispatchrequest(struct pic32mx_usbdev_s *priv); -static void pic32mx_ep0stall(struct pic32mx_usbdev_s *priv); -static void pic32mx_eptransfer(struct pic32mx_usbdev_s *priv, uint8_t epno, +static void pic32mx_dispatchrequest(struct pic32mx_usbdev_s *priv); +static void pic32mx_ep0stall(struct pic32mx_usbdev_s *priv); +static void pic32mx_eptransfer(struct pic32mx_usbdev_s *priv, uint8_t epno, uint16_t ustat); -static void pic32mx_ep0nextsetup(struct pic32mx_usbdev_s *priv); -static void pic32mx_ep0rdcomplete(struct pic32mx_usbdev_s *priv); -static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv); -static void pic32mx_ep0outcomplete(struct pic32mx_usbdev_s *priv); -static void pic32mx_ep0incomplete(struct pic32mx_usbdev_s *priv); -static void pic32mx_ep0transfer(struct pic32mx_usbdev_s *priv, +static void pic32mx_ep0nextsetup(struct pic32mx_usbdev_s *priv); +static void pic32mx_ep0rdcomplete(struct pic32mx_usbdev_s *priv); +static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv); +static void pic32mx_ep0outcomplete(struct pic32mx_usbdev_s *priv); +static void pic32mx_ep0incomplete(struct pic32mx_usbdev_s *priv); +static void pic32mx_ep0transfer(struct pic32mx_usbdev_s *priv, uint16_t ustat); -static int pic32mx_interrupt(int irq, void *context, FAR void *arg); +static int pic32mx_interrupt(int irq, void *context, FAR void *arg); /* Endpoint helpers *********************************************************/ static inline struct pic32mx_ep_s * - pic32mx_epreserve(struct pic32mx_usbdev_s *priv, uint8_t epset); + pic32mx_epreserve(struct pic32mx_usbdev_s *priv, uint8_t epset); static inline void - pic32mx_epunreserve(struct pic32mx_usbdev_s *priv, + pic32mx_epunreserve(struct pic32mx_usbdev_s *priv, struct pic32mx_ep_s *privep); -static void pic32mx_ep0configure(struct pic32mx_usbdev_s *priv); +static void pic32mx_ep0configure(struct pic32mx_usbdev_s *priv); /* Endpoint operations ******************************************************/ -static int pic32mx_epconfigure(struct usbdev_ep_s *ep, +static int pic32mx_epconfigure(struct usbdev_ep_s *ep, const struct usb_epdesc_s *desc, bool last); -static int pic32mx_epdisable(struct usbdev_ep_s *ep); +static int pic32mx_epdisable(struct usbdev_ep_s *ep); static struct usbdev_req_s * - pic32mx_epallocreq(struct usbdev_ep_s *ep); -static void pic32mx_epfreereq(struct usbdev_ep_s *ep, + pic32mx_epallocreq(struct usbdev_ep_s *ep); +static void pic32mx_epfreereq(struct usbdev_ep_s *ep, struct usbdev_req_s *); -static int pic32mx_epsubmit(struct usbdev_ep_s *ep, +static int pic32mx_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req); -static int pic32mx_epcancel(struct usbdev_ep_s *ep, +static int pic32mx_epcancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req); -static int pic32mx_epbdtstall(struct usbdev_ep_s *ep, bool resume, +static int pic32mx_epbdtstall(struct usbdev_ep_s *ep, bool resume, bool epin); -static int pic32mx_epstall(struct usbdev_ep_s *ep, bool resume); +static int pic32mx_epstall(struct usbdev_ep_s *ep, bool resume); /* USB device controller operations *****************************************/ static struct usbdev_ep_s * - pic32mx_allocep(struct usbdev_s *dev, uint8_t epno, bool in, + pic32mx_allocep(struct usbdev_s *dev, uint8_t epno, bool in, uint8_t eptype); -static void pic32mx_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep); -static int pic32mx_getframe(struct usbdev_s *dev); -static int pic32mx_wakeup(struct usbdev_s *dev); -static int pic32mx_selfpowered(struct usbdev_s *dev, bool selfpowered); +static void pic32mx_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep); +static int pic32mx_getframe(struct usbdev_s *dev); +static int pic32mx_wakeup(struct usbdev_s *dev); +static int pic32mx_selfpowered(struct usbdev_s *dev, bool selfpowered); /* Initialization/Reset *****************************************************/ -static void pic32mx_reset(struct pic32mx_usbdev_s *priv); -static void pic32mx_attach(struct pic32mx_usbdev_s *priv); -static void pic32mx_detach(struct pic32mx_usbdev_s *priv); -static void pic32mx_swreset(struct pic32mx_usbdev_s *priv); -static void pic32mx_hwreset(struct pic32mx_usbdev_s *priv); -static void pic32mx_stateinit(struct pic32mx_usbdev_s *priv); -static void pic32mx_hwshutdown(struct pic32mx_usbdev_s *priv); +static void pic32mx_reset(struct pic32mx_usbdev_s *priv); +static void pic32mx_attach(struct pic32mx_usbdev_s *priv); +static void pic32mx_detach(struct pic32mx_usbdev_s *priv); +static void pic32mx_swreset(struct pic32mx_usbdev_s *priv); +static void pic32mx_hwreset(struct pic32mx_usbdev_s *priv); +static void pic32mx_stateinit(struct pic32mx_usbdev_s *priv); +static void pic32mx_hwshutdown(struct pic32mx_usbdev_s *priv); /**************************************************************************** * Private Data @@ -575,8 +580,8 @@ static const struct usbdev_ops_s g_devops = * * The BDT is addressed in the hardware as follows: * - * Bits 9-31: These come the BDT address bits written into the BDTP3, BDTP2 - * and BDTP1 registers + * Bits 9-31: These come the BDT address bits written into the BDTP3, + * BDTP2 and BDTP1 registers * Bits 5-8: The endpoint number * Bit 4: Direction (0=IN/Tx, 1 = OUT/Rx) * Bit 3: PPBI, the ping point buffer index bit. @@ -617,10 +622,10 @@ static uint16_t pic32mx_getreg(uint32_t addr) { if (count == 0xffffffff || ++count > 3) { - if (count == 4) - { - reginfo("...\n"); - } + if (count == 4) + { + reginfo("...\n"); + } return val; } @@ -630,20 +635,20 @@ static uint16_t pic32mx_getreg(uint32_t addr) else { - /* Did we print "..." for the previous value? */ + /* Did we print "..." for the previous value? */ - if (count > 3) - { - /* Yes.. then show how many times the value repeated */ + if (count > 3) + { + /* Yes.. then show how many times the value repeated */ - reginfo("[repeats %d more times]\n", count-3); - } + reginfo("[repeats %d more times]\n", count - 3); + } - /* Save the new address, value, and count */ + /* Save the new address, value, and count */ - prevaddr = addr; - preval = val; - count = 1; + prevaddr = addr; + preval = val; + count = 1; } /* Show the register value read */ @@ -673,6 +678,7 @@ static void pic32mx_putreg(uint16_t val, uint32_t addr) /**************************************************************************** * Request Helpers ****************************************************************************/ + /**************************************************************************** * Name: pic32mx_remfirst ****************************************************************************/ @@ -695,7 +701,6 @@ static struct pic32mx_req_s *pic32mx_remfirst(struct pic32mx_queue_s *queue) return ret; } - /**************************************************************************** * Name: pic32mx_remlast ****************************************************************************/ @@ -736,7 +741,8 @@ static struct pic32mx_req_s *pic32mx_remlast(struct pic32mx_queue_s *queue) * Name: pic32mx_addlast ****************************************************************************/ -static void pic32mx_addlast(struct pic32mx_queue_s *queue, struct pic32mx_req_s *req) +static void pic32mx_addlast(struct pic32mx_queue_s *queue, + struct pic32mx_req_s *req) { req->flink = NULL; if (!queue->head) @@ -755,13 +761,15 @@ static void pic32mx_addlast(struct pic32mx_queue_s *queue, struct pic32mx_req_s * Name: pic32mx_addfirst ****************************************************************************/ -static void pic32mx_addfirst(struct pic32mx_queue_s *queue, struct pic32mx_req_s *req) +static void pic32mx_addfirst(struct pic32mx_queue_s *queue, + struct pic32mx_req_s *req) { req->flink = queue->head; if (!queue->head) { queue->tail = req; } + queue->head = req; } @@ -876,8 +884,8 @@ static void pic32mx_wrcomplete(struct pic32mx_usbdev_s *priv, int epno; /* Check the request at the head of the endpoint's active request queue. - * Since we got here from a write completion event, the active request queue - * should not be empty. + * Since we got here from a write completion event, the active request + * queue should not be empty. */ privreq = pic32mx_rqhead(&privep->active); @@ -901,11 +909,11 @@ static void pic32mx_wrcomplete(struct pic32mx_usbdev_s *priv, bdtinfo("EP%d BDT IN [%p] {%08x, %08x}\n", epno, bdtin, bdtin->status, bdtin->addr); - /* We should own the BDT that just completed. But NULLify the entire BDT IN. - * Why? So that we can tell later that the BDT available. No, it is not - * sufficient to look at the UOWN bit. If UOWN==0, then the transfer has - * been completed BUT it may not yet have been processed. But a completely - * NULLified BDT is a sure indication + /* We should own the BDT that just completed. But NULLify the entire BDT + * IN. Why? So that we can tell later that the BDT available. No, it is + * not sufficient to look at the UOWN bit. If UOWN==0, then the transfer + * has been completed BUT it may not yet have been processed. But a + * completely NULLified BDT is a sure indication */ DEBUGASSERT((bdtin->status & USB_BDT_UOWN) == USB_BDT_COWN); @@ -943,11 +951,13 @@ static void pic32mx_wrcomplete(struct pic32mx_usbdev_s *priv, * the class driver. */ - usbtrace(TRACE_COMPLETE(USB_EPNO(privep->ep.eplog)), privreq->req.xfrd); + usbtrace(TRACE_COMPLETE(USB_EPNO(privep->ep.eplog)), + privreq->req.xfrd); pic32mx_reqcomplete(privep, OK); - /* Special case writes to endpoint zero. If there is no transfer in - * progress, then we need to configure to received the next SETUP packet. + /* Special case writes to endpoint zero. If there is no transfer in + * progress, then we need to configure to received the next SETUP + * packet. */ if (USB_EPNO(privep->ep.eplog) == 0) @@ -999,7 +1009,9 @@ static void pic32mx_rqrestart(int argc, uint32_t arg1, ...) privep->stalled = false; privep->txnullpkt = false; - /* Check the request at the head of the endpoint's pending request queue */ + /* Check the request at the head of the endpoint's + * pending request queue + */ privreq = pic32mx_rqhead(&privep->pend); if (privreq) @@ -1021,7 +1033,8 @@ static void pic32mx_rqrestart(int argc, uint32_t arg1, ...) * Name: pic32mx_delayedrestart ****************************************************************************/ -static void pic32mx_delayedrestart(struct pic32mx_usbdev_s *priv, uint8_t epno) +static void pic32mx_delayedrestart(struct pic32mx_usbdev_s *priv, + uint8_t epno) { /* Add endpoint to the set of endpoints that need to be restarted */ @@ -1265,7 +1278,8 @@ static int pic32mx_wrstart(struct pic32mx_usbdev_s *priv, * Name: pic32mx_wrrequest ****************************************************************************/ -static int pic32mx_wrrequest(struct pic32mx_usbdev_s *priv, struct pic32mx_ep_s *privep) +static int pic32mx_wrrequest(struct pic32mx_usbdev_s *priv, + struct pic32mx_ep_s *privep) { int ret; @@ -1333,17 +1347,18 @@ static int pic32mx_rdcomplete(struct pic32mx_usbdev_s *priv, /* Get the length of the data received from the BDT. */ - privreq->req.xfrd = (bdtout->status & USB_BDT_BYTECOUNT_MASK) >> USB_BDT_BYTECOUNT_SHIFT; + privreq->req.xfrd = + (bdtout->status & USB_BDT_BYTECOUNT_MASK) >> USB_BDT_BYTECOUNT_SHIFT; /* Complete the transfer and return the request to the class driver. */ usbtrace(TRACE_COMPLETE(USB_EPNO(privep->ep.eplog)), privreq->req.xfrd); pic32mx_reqcomplete(privep, OK); - /* Nullify the BDT entry that just completed. Why? So that we can tell later - * that the BDT has been processed. No, it is not sufficient to look at the - * UOWN bit. If UOWN==0, then the transfer has been completed BUT it may not - * yet have been processed. + /* Nullify the BDT entry that just completed. Why? So that we can tell + * later that the BDT has been processed. No, it is not sufficient to + * look at the UOWN bit. If UOWN==0, then the transfer has been completed + * BUT it may not yet have been processed. */ bdtout->status = 0; @@ -1461,7 +1476,7 @@ static int pic32mx_ep0rdsetup(struct pic32mx_usbdev_s *priv, uint8_t *dest, privep->rxdata1 = 1; } - /* Set the data pointer, data length, and enable the endpoint */ + /* Set the data pointer, data length, and enable the endpoint */ bdtout->addr = (uint8_t *)PHYS_ADDR(dest); status |= ((uint32_t)readlen << USB_BDT_BYTECOUNT_SHIFT); @@ -1481,7 +1496,8 @@ static int pic32mx_ep0rdsetup(struct pic32mx_usbdev_s *priv, uint8_t *dest, * Name: pic32mx_rdsetup ****************************************************************************/ -static int pic32mx_rdsetup(struct pic32mx_ep_s *privep, uint8_t *dest, int readlen) +static int pic32mx_rdsetup(struct pic32mx_ep_s *privep, + uint8_t *dest, int readlen) { volatile struct usbotg_bdtentry_s *bdtout; uint32_t status; @@ -1541,8 +1557,8 @@ static int pic32mx_rdsetup(struct pic32mx_ep_s *privep, uint8_t *dest, int readl usbtrace(TRACE_READ(USB_EPNO(privep->ep.eplog)), readlen); - /* Clear status bits (making sure that UOWN is cleared before doing anything - * else). + /* Clear status bits (making sure that UOWN is cleared before doing + * anything else). */ bdtout->status = 0; @@ -1598,8 +1614,9 @@ static int pic32mx_rdrequest(struct pic32mx_usbdev_s *priv, usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_EPOUTQEMPTY), USB_EPNO(privep->ep.eplog)); - /* Special case reads from to endpoint zero. If there is no transfer in - * progress, then we need to configure to received the next SETUP packet. + /* Special case reads from to endpoint zero. If there is no transfer + * in progress, then we need to configure to received the next SETUP + * packet. */ if (USB_EPNO(privep->ep.eplog) == 0 && @@ -1659,19 +1676,22 @@ static int pic32mx_rdrequest(struct pic32mx_usbdev_s *priv, * Name: pic32mx_cancelrequests ****************************************************************************/ -static void pic32mx_cancelrequests(struct pic32mx_ep_s *privep, int16_t result) +static void pic32mx_cancelrequests(struct pic32mx_ep_s *privep, + int16_t result) { struct pic32mx_req_s *privreq; while ((privreq = pic32mx_remfirst(&privep->active))) { - usbtrace(TRACE_COMPLETE(USB_EPNO(privep->ep.eplog)), privreq->req.xfrd); + usbtrace(TRACE_COMPLETE(USB_EPNO(privep->ep.eplog)), + privreq->req.xfrd); pic32mx_reqreturn(privep, privreq, result); } while ((privreq = pic32mx_remfirst(&privep->pend))) { - usbtrace(TRACE_COMPLETE(USB_EPNO(privep->ep.eplog)), privreq->req.xfrd); + usbtrace(TRACE_COMPLETE(USB_EPNO(privep->ep.eplog)), + privreq->req.xfrd); pic32mx_reqreturn(privep, privreq, result); } } @@ -1679,6 +1699,7 @@ static void pic32mx_cancelrequests(struct pic32mx_ep_s *privep, int16_t result) /**************************************************************************** * Interrupt Level Processing ****************************************************************************/ + /**************************************************************************** * Name: pic32mx_dispatchrequest ****************************************************************************/ @@ -1767,8 +1788,8 @@ static void pic32mx_eptransfer(struct pic32mx_usbdev_s *priv, uint8_t epno, usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_EPINDONE), ustat); - /* An outgoing IN packet has completed. Update the number of bytes transferred - * and check for completion of the transfer. + /* An outgoing IN packet has completed. Update the number of bytes + * transferred and check for completion of the transfer. */ pic32mx_wrcomplete(priv, privep); @@ -1795,10 +1816,10 @@ static void pic32mx_ep0nextsetup(struct pic32mx_usbdev_s *priv) volatile struct usbotg_bdtentry_s *bdt = priv->eplist[EP0].bdtout; uint32_t bytecount; - /* This operation should be performed no more than once per OUT transaction. - * priv->ep0done is set to zero at the beginning of processing of each EP0 - * transfer. It is set the first time that this function runs after the EP0 - * transfer. + /* This operation should be performed no more than once per OUT + * transaction. priv->ep0done is set to zero at the beginning of + * processing of each EP0 transfer. It is set the first time that + * this function runs after the EP0 transfer. */ if (!priv->ep0done) @@ -1827,10 +1848,10 @@ static void pic32mx_ep0rdcomplete(struct pic32mx_usbdev_s *priv) uint32_t physaddr; uint32_t bytecount; - /* This operation should be performed no more than once per OUT transaction. - * priv->ep0done is set to zero at the beginning of processing of each EP0 - * transfer. It is set the first time that this function runs after the EP0 - * transfer. + /* This operation should be performed no more than once per OUT + * transaction. priv->ep0done is set to zero at the beginning of processing + * of each EP0 transfer. It is set the first time that this function runs + * after the EP0 transfer. */ if (!priv->ep0done) @@ -1908,7 +1929,8 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv) if ((priv->ctrl.type & USB_REQ_TYPE_MASK) != USB_REQ_TYPE_STANDARD) { - usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_NOSTDREQ), priv->ctrl.type); + usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_NOSTDREQ), + priv->ctrl.type); /* Let the class implementation handle all non-standar requests */ @@ -1931,7 +1953,8 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv) * len: 2; data = status */ - usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_GETSTATUS), priv->ctrl.type); + usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_GETSTATUS), + priv->ctrl.type); if (len.w != 2 || (priv->ctrl.type & USB_REQ_DIR_IN) == 0 || index.b[MSB] != 0 || value.w != 0) { @@ -1945,10 +1968,13 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv) case USB_REQ_RECIPIENT_ENDPOINT: { epno = USB_EPNO(index.b[LSB]); - usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_EPGETSTATUS), epno); + usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_EPGETSTATUS), + epno); if (epno >= PIC32MX_NENDPOINTS) { - usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_BADEPGETSTATUS), epno); + usbtrace( + TRACE_DEVERROR(PIC32MX_TRACEERR_BADEPGETSTATUS), + epno); priv->ctrlstate = CTRLSTATE_STALL; } else @@ -1982,20 +2008,23 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv) case USB_REQ_RECIPIENT_DEVICE: { - if (index.w == 0) + if (index.w == 0) { - usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_DEVGETSTATUS), 0); + usbtrace( + TRACE_INTDECODE(PIC32MX_TRACEINTID_DEVGETSTATUS), 0); /* Features: Remote Wakeup=YES; selfpowered=? */ response.w = 0; - response.b[LSB] = (priv->selfpowered << USB_FEATURE_SELFPOWERED) | - (priv->rwakeup << USB_FEATURE_REMOTEWAKEUP); + response.b[LSB] = + (priv->selfpowered << USB_FEATURE_SELFPOWERED) | + (priv->rwakeup << USB_FEATURE_REMOTEWAKEUP); nbytes = 2; /* Response size: 2 bytes */ } else { - usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_BADDEVGETSTATUS), 0); + usbtrace( + TRACE_DEVERROR(PIC32MX_TRACEERR_BADDEVGETSTATUS), 0); priv->ctrlstate = CTRLSTATE_STALL; } } @@ -2003,7 +2032,8 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv) case USB_REQ_RECIPIENT_INTERFACE: { - usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_IFGETSTATUS), 0); + usbtrace( + TRACE_INTDECODE(PIC32MX_TRACEINTID_IFGETSTATUS), 0); response.w = 0; nbytes = 2; /* Response size: 2 bytes */ } @@ -2028,8 +2058,10 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv) * len: zero, data = none */ - usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_CLEARFEATURE), priv->ctrl.type); - if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE) + usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_CLEARFEATURE), + priv->ctrl.type); + if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == + USB_REQ_RECIPIENT_DEVICE) { /* Disable B device from performing HNP */ @@ -2065,13 +2097,16 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv) } else { - /* Let the class implementation handle all other device features */ + /* Let the class implementation handle + * all other device features + */ pic32mx_dispatchrequest(priv); dispatched = true; } } - else if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_ENDPOINT) + else if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == + USB_REQ_RECIPIENT_ENDPOINT) { epno = USB_EPNO(index.b[LSB]); if (epno > 0 && epno < PIC32MX_NENDPOINTS && index.b[MSB] == 0 && @@ -2084,7 +2119,8 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv) } else { - usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_BADCLEARFEATURE), 0); + usbtrace( + TRACE_DEVERROR(PIC32MX_TRACEERR_BADCLEARFEATURE), 0); priv->ctrlstate = CTRLSTATE_STALL; } } @@ -2106,9 +2142,11 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv) * len: 0; data = none */ - usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_SETFEATURE), priv->ctrl.type); + usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_SETFEATURE), + priv->ctrl.type); - if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE) + if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == + USB_REQ_RECIPIENT_DEVICE) { /* Enable B device to perform HNP */ @@ -2149,13 +2187,16 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv) } else { - /* Let the class implementation handle all other device features */ + /* Let the class implementation handle + * all other device features + */ pic32mx_dispatchrequest(priv); dispatched = true; } } - else if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_ENDPOINT) + else if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == + USB_REQ_RECIPIENT_ENDPOINT) { /* Handler recipient=endpoint */ @@ -2176,7 +2217,9 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv) } else { - /* The class driver handles all recipients except recipient=endpoint */ + /* The class driver handles all recipients + * except recipient=endpoint + */ pic32mx_dispatchrequest(priv); dispatched = true; @@ -2192,18 +2235,20 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv) * len: 0; data = none */ - usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_EP0SETUPSETADDRESS), value.w); - if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) != USB_REQ_RECIPIENT_DEVICE || - index.w != 0 || len.w != 0 || value.w > 127) + usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_EP0SETUPSETADDRESS), + value.w); + if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) != + USB_REQ_RECIPIENT_DEVICE || index.w != 0 || + len.w != 0 || value.w > 127) { usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_BADSETADDRESS), 0); priv->ctrlstate = CTRLSTATE_STALL; } else { - /* Note that setting of the device address will be deferred. A zero-length - * packet will be sent and the device address will be set when the zero- - * length packet transfer completes. + /* Note that setting of the device address will be deferred. + * A zero-length packet will be sent and the device address + * will be set when the zero- length packet transfer completes. */ priv->devstate = DEVSTATE_ADDRPENDING; @@ -2217,6 +2262,7 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv) * index: 0 or language ID; * len: descriptor len; data = descriptor */ + case USB_REQ_SETDESCRIPTOR: /* type: host-to-device; recipient = device * value: descriptor type and index @@ -2225,10 +2271,14 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv) */ { - usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_GETSETDESC), priv->ctrl.type); - if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE) + usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_GETSETDESC), + priv->ctrl.type); + if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == + USB_REQ_RECIPIENT_DEVICE) { - /* The request seems valid... let the class implementation handle it */ + /* The request seems valid... + * let the class implementation handle it + */ pic32mx_dispatchrequest(priv); dispatched = true; @@ -2249,11 +2299,15 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv) */ { - usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_GETCONFIG), priv->ctrl.type); - if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE && - value.w == 0 && index.w == 0 && len.w == 1) + usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_GETCONFIG), + priv->ctrl.type); + if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == + USB_REQ_RECIPIENT_DEVICE && value.w == 0 && + index.w == 0 && len.w == 1) { - /* The request seems valid... let the class implementation handle it */ + /* The request seems valid... + * let the class implementation handle it + */ pic32mx_dispatchrequest(priv); dispatched = true; @@ -2274,11 +2328,14 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv) */ { - usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_SETCONFIG), priv->ctrl.type); - if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE && - index.w == 0 && len.w == 0) + usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_SETCONFIG), + priv->ctrl.type); + if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == + USB_REQ_RECIPIENT_DEVICE && index.w == 0 && len.w == 0) { - /* The request seems valid... let the class implementation handle it */ + /* The request seems valid... + * let the class implementation handle it + */ pic32mx_dispatchrequest(priv); dispatched = true; @@ -2297,6 +2354,7 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv) * index: interface; * len: 1; data = alt interface */ + case USB_REQ_SETINTERFACE: /* type: host-to-device; recipient = interface * value: alternate setting @@ -2307,7 +2365,8 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv) { /* Let the class implementation handle the request */ - usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_GETSETIF), priv->ctrl.type); + usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_GETSETIF), + priv->ctrl.type); pic32mx_dispatchrequest(priv); dispatched = true; } @@ -2327,7 +2386,8 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv) default: { - usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDCTRLREQ), priv->ctrl.req); + usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDCTRLREQ), + priv->ctrl.req); priv->ctrlstate = CTRLSTATE_STALL; } break; @@ -2345,25 +2405,26 @@ resume_packet_processing: /* At this point, the request has been handled and there are three possible * outcomes: * - * 1. The setup request was successfully handled above and a response packet - * must be sent (may be a zero length packet). + * 1. The setup request was successfully handled above and a response + * packet must be sent (may be a zero length packet). * 2. The request was successfully handled by the class implementation. In - * case, the EP0 IN response has already been queued and the local variable - * 'dispatched' will be set to true and ctrlstate != CTRLSTATE_STALL; - * 3. An error was detected in either the above logic or by the class implementation - * logic. In either case, priv->state will be set CTRLSTATE_STALL - * to indicate this case. + * case, the EP0 IN response has already been queued and the local + * variable 'dispatched' will be set to true and + * ctrlstate != CTRLSTATE_STALL + * 3. An error was detected in either the above logic or by the class + * implementation logic. In either case, priv->state will be set + * CTRLSTATE_STALL to indicate this case. * * NOTE: Non-standard requests are a special case. They are handled by the - * class implementation and this function returned early above, skipping this - * logic altogether. + * class implementation and this function returned early above, skipping + * this logic altogether. */ if (!dispatched && (priv->ctrlstate != CTRLSTATE_STALL)) { - /* The SETUP command was not dispatched to the class driver and the SETUP - * command did not cause a stall. We will respond. First, restrict the - * data length to the length requested in the setup packet + /* The SETUP command was not dispatched to the class driver and the + * SETUP command did not cause a stall. We will respond. First, + * restrict the data length to the length requested in the setup packet */ if (nbytes > len.w) @@ -2377,9 +2438,10 @@ resume_packet_processing: priv->ctrlstate = CTRLSTATE_WAITSETUP; } - /* Did we stall? This might have occurred from the above logic OR the stall - * condition may have been set less obviously in pic32mx_dispatchrequest(). - * In either case, we handle the stall condition the same. + /* Did we stall? This might have occurred from the above logic OR the + * stall condition may have been set less obviously in + * pic32mx_dispatchrequest(). In either case, we handle the stall condition + * the same. * * However, bad things happen if we try to stall a SETUP packet. So lets * not. If we wait a bit, things will recover. Hmmm.. If we completed @@ -2387,10 +2449,10 @@ resume_packet_processing: * could stall the endpoint and perhaps speed things up a bit???. */ - /* Set up the BDT to accept the next setup command. */ + /* Set up the BDT to accept the next setup command. */ - pic32mx_ep0nextsetup(priv); - priv->ctrlstate = CTRLSTATE_WAITSETUP; + pic32mx_ep0nextsetup(priv); + priv->ctrlstate = CTRLSTATE_WAITSETUP; } /**************************************************************************** @@ -2459,7 +2521,7 @@ static void pic32mx_ep0incomplete(struct pic32mx_usbdev_s *priv) { DEBUGASSERT(bdtlast == &g_bdt[EP0_IN_ODD]); ep0->bdtin = &g_bdt[EP0_IN_EVEN]; - } + } /* Look at the saved SETUP command. Was it a SET ADDRESS request? * If so, then now is the time to set the address. @@ -2494,7 +2556,8 @@ static void pic32mx_ep0incomplete(struct pic32mx_usbdev_s *priv) else { - usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDSTATE), priv->ctrlstate); + usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDSTATE), + priv->ctrlstate); priv->ctrlstate = CTRLSTATE_STALL; } } @@ -2532,21 +2595,22 @@ static void pic32mx_ep0outcomplete(struct pic32mx_usbdev_s *priv) case CTRLSTATE_WAITSETUP: { /* In this case the last OUT transaction must have been a status - * stage of a CTRLSTATE_WRREQUEST: Prepare EP0 OUT for the next SETUP - * transaction. + * stage of a CTRLSTATE_WRREQUEST: Prepare EP0 OUT for the next + * SETUP transaction. */ pic32mx_ep0nextsetup(priv); } break; - /* Unexpected state OR host aborted the OUT transfer before it completed, - * STALL the endpoint in either case + /* Unexpected state OR host aborted the OUT transfer before it + * completed, STALL the endpoint in either case */ default: { - usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDSTATE), priv->ctrlstate); + usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDSTATE), + priv->ctrlstate); priv->ctrlstate = CTRLSTATE_STALL; } break; @@ -2557,7 +2621,8 @@ static void pic32mx_ep0outcomplete(struct pic32mx_usbdev_s *priv) * Name: pic32mx_ep0transfer ****************************************************************************/ -static void pic32mx_ep0transfer(struct pic32mx_usbdev_s *priv, uint16_t ustat) +static void pic32mx_ep0transfer(struct pic32mx_usbdev_s *priv, + uint16_t ustat) { volatile struct usbotg_bdtentry_s *bdt; @@ -2587,7 +2652,8 @@ static void pic32mx_ep0transfer(struct pic32mx_usbdev_s *priv, uint16_t ustat) /* Check the current EP0 OUT buffer contains a SETUP packet */ - if (((bdt->status & USB_BDT_PID_MASK) >> USB_BDT_PID_SHIFT) == USB_PID_SETUP_TOKEN) + if (((bdt->status & USB_BDT_PID_MASK) >> USB_BDT_PID_SHIFT) == + USB_PID_SETUP_TOKEN) { /* Check if the SETUP transaction data went into the priv->ctrl * buffer. If not, then we will need to copy it. @@ -2604,7 +2670,8 @@ static void pic32mx_ep0transfer(struct pic32mx_usbdev_s *priv, uint16_t ustat) /* Handle the control OUT transfer */ - usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_EP0SETUPDONE), bdt->status); + usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_EP0SETUPDONE), + bdt->status); pic32mx_ep0setup(priv); } else @@ -2633,7 +2700,8 @@ static void pic32mx_ep0transfer(struct pic32mx_usbdev_s *priv, uint16_t ustat) { /* Stall EP0 */ - usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_EP0SETUPSTALLED), priv->ctrlstate); + usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_EP0SETUPSTALLED), + priv->ctrlstate); pic32mx_epstall(&priv->eplist[EP0].ep, false); } } @@ -2658,7 +2726,8 @@ static int pic32mx_interrupt(int irq, void *context, FAR void *arg) /* Get the set of pending USB and OTG interrupts interrupts */ usbir = pic32mx_getreg(PIC32MX_USB_IR) & pic32mx_getreg(PIC32MX_USB_IE); - otgir = pic32mx_getreg(PIC32MX_USBOTG_IR) & pic32mx_getreg(PIC32MX_USBOTG_IE); + otgir = pic32mx_getreg(PIC32MX_USBOTG_IR) & + pic32mx_getreg(PIC32MX_USBOTG_IE); usbtrace(TRACE_INTENTRY(PIC32MX_TRACEINTID_INTERRUPT), usbir | otgir); #ifdef CONFIG_USBOTG @@ -2669,7 +2738,7 @@ static int pic32mx_interrupt(int irq, void *context, FAR void *arg) { /* Check if the 1 millisecond timer has expired */ - if (otgir & OTG_INT_T1MSEC) != 0) + if ((otgir & OTG_INT_T1MSEC) != 0) { usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_T1MSEC), otgir); @@ -2680,9 +2749,9 @@ static int pic32mx_interrupt(int irq, void *context, FAR void *arg) # warning "Missing logic" } - /* Clear Interrupt 1 msec timer Flag */ + /* Clear Interrupt 1 msec timer Flag */ - pic32mx_putreg(USBOTG_INT_T1MSEC, PIC32MX_USBOTG_IR); + pic32mx_putreg(USBOTG_INT_T1MSEC, PIC32MX_USBOTG_IR); } } #endif @@ -2695,7 +2764,7 @@ static int pic32mx_interrupt(int irq, void *context, FAR void *arg) pic32mx_putreg(USB_INT_ALL, PIC32MX_USB_IR); - /* Make sure that the USE reset and IDLE detect interrupts are enabled */ + /* Make sure that USE reset and IDLE detect interrupts are enabled */ regval = pic32mx_getreg(PIC32MX_USB_IE); regval |= (USB_INT_URST | USB_INT_IDLE); @@ -2709,7 +2778,7 @@ static int pic32mx_interrupt(int irq, void *context, FAR void *arg) #ifdef CONFIG_USBOTG /* Check if the ID Pin Changed State */ - if (otgir & USBOTG_INT_ID) != 0) + if ((otgir & USBOTG_INT_ID) != 0) { usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_OTGID), otgir); @@ -2732,13 +2801,14 @@ static int pic32mx_interrupt(int irq, void *context, FAR void *arg) pic32mx_resume(priv); } - /* It is pointless to continue servicing if the device is in suspend mode. */ + /* It is pointless to continue servicing if the device is in suspend. */ if ((pic32mx_getreg(PIC32MX_USB_PWRC) & USB_PWRC_USUSPEND) != 0) { /* Just clear the interrupt and return */ - usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_SUSPENDED), pic32mx_getreg(PIC32MX_USB_PWRC)); + usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_SUSPENDED), + pic32mx_getreg(PIC32MX_USB_PWRC)); goto interrupt_exit; } @@ -2763,7 +2833,7 @@ static int pic32mx_interrupt(int irq, void *context, FAR void *arg) priv->devstate = DEVSTATE_DEFAULT; #ifdef CONFIG_USBOTG - /* Disable and deactivate HNP */ + /* Disable and deactivate HNP */ #warning Missing Logic #endif /* Acknowledge the reset interrupt */ @@ -2801,9 +2871,9 @@ static int pic32mx_interrupt(int irq, void *context, FAR void *arg) } #endif - /* Service stall interrupts */ + /* Service stall interrupts */ - if ((usbir & USB_INT_STALL) != 0) + if ((usbir & USB_INT_STALL) != 0) { usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_STALL), usbir); @@ -2835,7 +2905,8 @@ static int pic32mx_interrupt(int irq, void *context, FAR void *arg) { /* Just clear the interrupt and return */ - usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_WAITRESET), priv->devstate); + usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_WAITRESET), + priv->devstate); goto interrupt_exit; } @@ -2854,7 +2925,9 @@ static int pic32mx_interrupt(int irq, void *context, FAR void *arg) { uint8_t epno; - /* Check the pending interrupt register. Is token processing complete. */ + /* Check the pending interrupt register. + * Is token processing complete. + */ if ((pic32mx_getreg(PIC32MX_USB_IR) & USB_INT_TRN) != 0) { @@ -2877,9 +2950,9 @@ static int pic32mx_interrupt(int irq, void *context, FAR void *arg) } else { - /* USTAT FIFO must be empty. */ + /* USTAT FIFO must be empty. */ - break; + break; } } } @@ -2897,6 +2970,7 @@ interrupt_exit: /**************************************************************************** * Suspend/Resume Helpers ****************************************************************************/ + /**************************************************************************** * Name: pic32mx_suspend ****************************************************************************/ @@ -3003,6 +3077,7 @@ static void pic32mx_resume(struct pic32mx_usbdev_s *priv) /**************************************************************************** * Endpoint Helpers ****************************************************************************/ + /**************************************************************************** * Name: pic32mx_epreserve ****************************************************************************/ @@ -3048,7 +3123,8 @@ pic32mx_epreserve(struct pic32mx_usbdev_s *priv, uint8_t epset) ****************************************************************************/ static inline void -pic32mx_epunreserve(struct pic32mx_usbdev_s *priv, struct pic32mx_ep_s *privep) +pic32mx_epunreserve(struct pic32mx_usbdev_s *priv, + struct pic32mx_ep_s *privep) { irqstate_t flags = enter_critical_section(); priv->epavail |= PIC32MX_ENDP_BIT(USB_EPNO(privep->ep.eplog)); @@ -3108,6 +3184,7 @@ static void pic32mx_ep0configure(struct pic32mx_usbdev_s *priv) /**************************************************************************** * Endpoint operations ****************************************************************************/ + /**************************************************************************** * Name: pic32mx_epconfigure ****************************************************************************/ @@ -3164,7 +3241,7 @@ static int pic32mx_epconfigure(struct usbdev_ep_s *ep, break; default: - usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_BADEPTYPE), (uint16_t)desc->type); + usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_BADEPTYPE), desc->type); return -EINVAL; } @@ -3230,7 +3307,7 @@ static int pic32mx_epconfigure(struct usbdev_ep_s *ep, DEBUGASSERT(maxpacket <= PIC32MX_MAXPACKET_SIZE); ep->maxpacket = maxpacket; - /* Set the full, logic EP number (that includes direction encoded in bit 7) */ + /* Set the full, logic EP number (includes direction encoded in bit 7) */ if (epin) { @@ -3307,6 +3384,7 @@ static struct usbdev_req_s *pic32mx_epallocreq(struct usbdev_ep_s *ep) return NULL; } #endif + usbtrace(TRACE_EPALLOCREQ, USB_EPNO(ep->eplog)); privreq = (struct pic32mx_req_s *)kmm_malloc(sizeof(struct pic32mx_req_s)); @@ -3324,7 +3402,8 @@ static struct usbdev_req_s *pic32mx_epallocreq(struct usbdev_ep_s *ep) * Name: pic32mx_epfreereq ****************************************************************************/ -static void pic32mx_epfreereq(struct usbdev_ep_s *ep, struct usbdev_req_s *req) +static void pic32mx_epfreereq(struct usbdev_ep_s *ep, + struct usbdev_req_s *req) { struct pic32mx_req_s *privreq = (struct pic32mx_req_s *)req; @@ -3335,6 +3414,7 @@ static void pic32mx_epfreereq(struct usbdev_ep_s *ep, struct usbdev_req_s *req) return; } #endif + usbtrace(TRACE_EPFREEREQ, USB_EPNO(ep->eplog)); kmm_free(privreq); @@ -3369,7 +3449,8 @@ static int pic32mx_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req) #ifdef CONFIG_DEBUG_FEATURES if (!priv->driver) { - usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_NOTCONFIGURED), priv->usbdev.speed); + usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_NOTCONFIGURED), + priv->usbdev.speed); uerr("ERROR: driver=%p\n", priv->driver); return -ESHUTDOWN; } @@ -3544,7 +3625,7 @@ static int pic32mx_epbdtstall(struct usbdev_ep_s *ep, bool resume, bool epin) if (epno == 0 && !epin) { - uint32_t bytecount = (USB_SIZEOF_CTRLREQ << USB_BDT_BYTECOUNT_SHIFT); + uint32_t bytecount = USB_SIZEOF_CTRLREQ << USB_BDT_BYTECOUNT_SHIFT; uint32_t physaddr = PHYS_ADDR(&priv->ctrl); /* Configure the other BDT to receive a SETUP command. */ @@ -3580,9 +3661,9 @@ static int pic32mx_epbdtstall(struct usbdev_ep_s *ep, bool resume, bool epin) epno, epin ? "IN" : "OUT", otherbdt, otherbdt->status, otherbdt->addr); - /* Restart any queued requests (after a delay so that we can be assured - * that the hardware has recovered from the stall -- I don't know of any - * other way to assure this.). + /* Restart any queued requests (after a delay so that we can be + * assured that the hardware has recovered from the stall -- + * I don't know of any other way to assure this.). */ pic32mx_delayedrestart(priv, epno); @@ -3660,7 +3741,8 @@ static int pic32mx_epstall(struct usbdev_ep_s *ep, bool resume) /* Set the EP0 control state appropriately */ - privep->dev->ctrlstate = resume ? CTRLSTATE_WAITSETUP : CTRLSTATE_STALLED; + privep->dev->ctrlstate = + resume ? CTRLSTATE_WAITSETUP : CTRLSTATE_STALLED; } /* Otherwise, select the BDT for the endpoint direction */ @@ -3679,12 +3761,14 @@ static int pic32mx_epstall(struct usbdev_ep_s *ep, bool resume) /**************************************************************************** * Device Controller Operations ****************************************************************************/ + /**************************************************************************** * Name: pic32mx_allocep ****************************************************************************/ -static struct usbdev_ep_s *pic32mx_allocep(struct usbdev_s *dev, uint8_t epno, - bool epin, uint8_t eptype) +static struct usbdev_ep_s *pic32mx_allocep(struct usbdev_s *dev, + uint8_t epno, bool epin, + uint8_t eptype) { struct pic32mx_usbdev_s *priv = (struct pic32mx_usbdev_s *)dev; struct pic32mx_ep_s *privep = NULL; @@ -3707,8 +3791,9 @@ static struct usbdev_ep_s *pic32mx_allocep(struct usbdev_s *dev, uint8_t epno, if (epno > 0) { - /* Otherwise, we will return the endpoint structure only for the requested - * 'logical' endpoint. All of the other checks will still be performed. + /* Otherwise, we will return the endpoint structure only for the + * requested 'logical' endpoint. All of the other checks will still be + * performed. * * First, verify that the logical endpoint is in the range supported by * by the hardware. @@ -3861,6 +3946,7 @@ static int pic32mx_selfpowered(struct usbdev_s *dev, bool selfpowered) /**************************************************************************** * Initialization/Reset ****************************************************************************/ + /**************************************************************************** * Name: pic32mx_reset * @@ -4020,7 +4106,8 @@ static void pic32mx_detach(struct pic32mx_usbdev_s *priv) /* Check if the ID Pin Changed State */ - if ((pic32mx_getreg(PIC32MX_USBOTG_IR) & pic32mx_getreg(PIC32MX_USBOTG_IE) & USBOTG_INT_ID) != 0) + if ((pic32mx_getreg(PIC32MX_USBOTG_IR) & + pic32mx_getreg(PIC32MX_USBOTG_IE) & USBOTG_INT_ID) != 0) { /* Re-detect & Initialize */ #warning "Missing logic" @@ -4127,9 +4214,9 @@ static void pic32mx_hwreset(struct pic32mx_usbdev_s *priv) */ physaddr = PHYS_ADDR(g_bdt); - pic32mx_putreg((uint16_t)((physaddr >> 24) & USB_BDTP3_MASK), PIC32MX_USB_BDTP3); - pic32mx_putreg((uint16_t)((physaddr >> 16) & USB_BDTP2_MASK), PIC32MX_USB_BDTP2); - pic32mx_putreg((uint16_t)((physaddr >> 8) & USB_BDTP1_MASK), PIC32MX_USB_BDTP1); + pic32mx_putreg((physaddr >> 24) & USB_BDTP3_MASK, PIC32MX_USB_BDTP3); + pic32mx_putreg((physaddr >> 16) & USB_BDTP2_MASK, PIC32MX_USB_BDTP2); + pic32mx_putreg((physaddr >> 8) & USB_BDTP1_MASK, PIC32MX_USB_BDTP1); /* Assert reset request to all of the Ping Pong buffer pointers. This * will reset all Even/Odd buffer pointers to the EVEN BD banks. @@ -4243,6 +4330,7 @@ static void pic32mx_hwshutdown(struct pic32mx_usbdev_s *priv) /**************************************************************************** * Public Functions ****************************************************************************/ + /**************************************************************************** * Name: up_usbinitialize * @@ -4272,7 +4360,7 @@ void up_usbinitialize(void) pic32mx_stateinit(priv); - /* Then perform a few one-time initialization operstions. First, initialize + /* Then perform a few one-time initialization operstions. First, initialize * the watchdog timer that is used to perform a delayed queue restart * after recovering from a stall. */ @@ -4396,7 +4484,8 @@ int usbdev_register(struct usbdevclass_driver_s *driver) DEBUGASSERT(priv->devstate == DEVSTATE_DETACHED); pic32mx_reset(priv); - } + } + return ret; } @@ -4449,7 +4538,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) up_disable_irq(PIC32MX_IRQSRC_USB); /* Put the hardware in an inactive state. Then bring the hardware back up - * in the reset state (this is probably not necessary, the pic32mx_hwreset() + * in the reset state (this is probably not necessary, the pic32mx_hwreset * call above was probably sufficient). */ diff --git a/arch/mips/src/pic32mz/pic32mz-gpio.c b/arch/mips/src/pic32mz/pic32mz-gpio.c index eca7088feb..b7da1ac2a0 100644 --- a/arch/mips/src/pic32mz/pic32mz-gpio.c +++ b/arch/mips/src/pic32mz/pic32mz-gpio.c @@ -61,6 +61,7 @@ /**************************************************************************** * Public Data ****************************************************************************/ + /* This table can be used to map a port number to a IOPORT base address. For * example, an index of zero would correspond to IOPORTA, one with IOPORTB, * etc. @@ -143,12 +144,14 @@ static inline unsigned int pic32mz_slewrate(pinset_t pinset) static inline unsigned int pic32mz_slewratecon0(pinset_t pinset) { - return (pic32mz_slewrate(pinset) & GPIO_SR_CON0_MASK) >> GPIO_SR_CON0_SHIFT; + return (pic32mz_slewrate(pinset) & GPIO_SR_CON0_MASK) >> + GPIO_SR_CON0_SHIFT; } static inline unsigned int pic32mz_slewratecon1(pinset_t pinset) { - return (pic32mz_slewrate(pinset) & GPIO_SR_CON1_MASK) >> GPIO_SR_CON1_SHIFT; + return (pic32mz_slewrate(pinset) & GPIO_SR_CON1_MASK) >> + GPIO_SR_CON1_SHIFT; } /**************************************************************************** @@ -206,7 +209,7 @@ int pic32mz_configgpio(pinset_t cfgset) putreg32(mask, base + PIC32MZ_IOPORT_ANSELCLR_OFFSET); - /* It is an output; clear the corresponding bit in the TRIS register */ + /* It is an output; clear the corresponding bit in TRIS register */ putreg32(mask, base + PIC32MZ_IOPORT_TRISCLR_OFFSET); @@ -235,7 +238,7 @@ int pic32mz_configgpio(pinset_t cfgset) } else { - /* It is an input; set the corresponding bit in the TRIS register. */ + /* It is an input; set the corresponding bit in TRIS register. */ putreg32(mask, base + PIC32MZ_IOPORT_TRISSET_OFFSET); putreg32(mask, base + PIC32MZ_IOPORT_ODCCLR_OFFSET); diff --git a/boards/arm/cxd56xx/drivers/audio/cxd56_audio_analog.c b/boards/arm/cxd56xx/drivers/audio/cxd56_audio_analog.c index e8046ae870..64b5aa499f 100644 --- a/boards/arm/cxd56xx/drivers/audio/cxd56_audio_analog.c +++ b/boards/arm/cxd56xx/drivers/audio/cxd56_audio_analog.c @@ -163,7 +163,8 @@ CXD56_AUDIO_ECODE cxd56_audio_analog_poweroff(void) return ret; } -CXD56_AUDIO_ECODE cxd56_audio_analog_poweron_input(FAR cxd56_audio_mic_gain_t *gain) +CXD56_AUDIO_ECODE +cxd56_audio_analog_poweron_input(FAR cxd56_audio_mic_gain_t *gain) { CXD56_AUDIO_ECODE ret = CXD56_AUDIO_ECODE_OK; @@ -276,7 +277,8 @@ CXD56_AUDIO_ECODE cxd56_audio_analog_disable_output(void) return ret; } -CXD56_AUDIO_ECODE cxd56_audio_analog_set_micgain(FAR cxd56_audio_mic_gain_t *gain) +CXD56_AUDIO_ECODE +cxd56_audio_analog_set_micgain(FAR cxd56_audio_mic_gain_t *gain) { CXD56_AUDIO_ECODE ret = CXD56_AUDIO_ECODE_OK; diff --git a/boards/arm/lpc214x/mcu123-lpc214x/src/lpc2148_spi1.c b/boards/arm/lpc214x/mcu123-lpc214x/src/lpc2148_spi1.c index 2dc6d8c81e..24f4f08f11 100644 --- a/boards/arm/lpc214x/mcu123-lpc214x/src/lpc2148_spi1.c +++ b/boards/arm/lpc214x/mcu123-lpc214x/src/lpc2148_spi1.c @@ -142,7 +142,11 @@ static const struct spi_ops_s g_spiops = .registercallback = 0, /* Not implemented */ }; -static struct spi_dev_s g_spidev = {&g_spiops}; +static struct spi_dev_s g_spidev = +{ + &g_spiops +}; + static sem_t g_exclsem = SEM_INITIALIZER(1); /* For mutually exclusive access */ /**************************************************************************** @@ -303,8 +307,8 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, static uint8_t spi_status(FAR struct spi_dev_s *dev, uint32_t devid) { - /* I don't think there is anyway to determine these things on the mcu123.com - * board. + /* I don't think there is anyway to determine these things on the + * mcu123.com board. */ spiinfo("Return SPI_STATUS_PRESENT\n"); @@ -441,9 +445,9 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, } /* There is a race condition where TFE may go true just before - * RNE goes true and this loop terminates prematurely. The nasty little - * delay in the following solves that (it could probably be tuned - * to improve performance). + * RNE goes true and this loop terminates prematurely. The nasty + * little delay in the following solves that (it could probably + * be tuned to improve performance). */ else if ((sr & LPC214X_SPI1SR_TFE) != 0) @@ -479,7 +483,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nwords) { - FAR uint8_t *ptr = (FAR uint8_t*)buffer; + FAR uint8_t *ptr = (FAR uint8_t *)buffer; uint32_t rxpending = 0; /* While there is remaining to be sent @@ -504,7 +508,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, rxpending++; } - /* Now, read the RX data from the RX FIFO while the RX FIFO is not empty */ + /* Now, read RX data from the RX FIFO while RX FIFO is not empty */ spiinfo("RX: rxpending: %d\n", rxpending); while (getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE) diff --git a/boards/arm/str71x/olimex-strp711/src/str71_spi.c b/boards/arm/str71x/olimex-strp711/src/str71_spi.c index a05e02d91d..0f57330bef 100644 --- a/boards/arm/str71x/olimex-strp711/src/str71_spi.c +++ b/boards/arm/str71x/olimex-strp711/src/str71_spi.c @@ -233,8 +233,8 @@ * P1.10/USBCLK 10/14 WP P1.10 input * P1.15/HTXD 13/15 CP P1.15 input * - * Use of SPI1 doesn't conflict with anything. WP conflicts USB; CP conflicts - * with HTXD. + * Use of SPI1 doesn't conflict with anything. WP conflicts USB; + * CP conflicts with HTXD. */ /* MMC/SD additional pins */ @@ -441,7 +441,10 @@ static const struct spi_ops_s g_spiops = #ifdef CONFIG_STR71X_BSPI0 static struct str71x_spidev_s g_spidev0 = { - .spidev = { &g_spiops }, + .spidev = + { + &g_spiops + }, .spibase = STR71X_BSPI0_BASE, .csbit = ENC_GPIO0_CS, .exclsem = SEM_INITIALIZER(1) @@ -451,7 +454,10 @@ static struct str71x_spidev_s g_spidev0 = #ifdef CONFIG_STR71X_BSPI1 static struct str71x_spidev_s g_spidev1 = { - .spidev = { &g_spiops }, + .spidev = + { + &g_spiops + }, .spibase = STR71X_BSPI1_BASE, .csbit = MMCSD_GPIO0_CS, .exclsem = SEM_INITIALIZER(1) @@ -528,23 +534,32 @@ static inline void spi_drain(FAR struct str71x_spidev_s *priv) #if CONFIG_STR714X_BSPI0_TXFIFO_DEPTH > 1 /* Wait while the TX FIFO is full */ - while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFF) != 0); + while (spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFF) + { + } #else /* Wait until the TX FIFO is empty */ - while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFE) == 0); + while (!(spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFE)) + { + } #endif + /* Write 0xff to the TX FIFO */ spi_putreg(priv, STR71X_BSPI_TXR_OFFSET, 0xff00); /* Wait for the TX FIFO empty */ - while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFNE) != 0); + while (spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFNE) + { + } /* Wait for the RX FIFO not empty */ - while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_RFNE) == 0); + while (!(spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_RFNE)) + { + } /* Then read and discard bytes until the RX FIFO is empty */ @@ -552,7 +567,7 @@ static inline void spi_drain(FAR struct str71x_spidev_s *priv) { spi_getreg(priv, STR71X_BSPI_RXR_OFFSET); } - while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_RFNE) != 0); + while (spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_RFNE); } /**************************************************************************** @@ -793,11 +808,15 @@ static uint32_t spi_send(FAR struct spi_dev_s *dev, uint32_t wd) #if CONFIG_STR714X_BSPI0_TXFIFO_DEPTH > 1 /* Wait while the TX FIFO is full */ - while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFF) != 0); + while (spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFF) + { + } #else /* Wait until the TX FIFO is empty */ - while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFE) == 0); + while (!(spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFE)) + { + } #endif /* Write the byte to the TX FIFO */ @@ -806,7 +825,9 @@ static uint32_t spi_send(FAR struct spi_dev_s *dev, uint32_t wd) /* Wait for the RX FIFO not empty */ - while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_RFNE) == 0); + while (!(spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_RFNE)) + { + } /* Get the received value from the RX FIFO and return it */ @@ -825,14 +846,16 @@ static uint32_t spi_send(FAR struct spi_dev_s *dev, uint32_t wd) * buflen - the length of data to send from the buffer in number of words. * The wordsize is determined by the number of bits-per-word * selected for the SPI interface. If nbits <= 8, the data is - * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's + * packed into uint8_t's; if nbits >8, the data is packed into + * uint16_t's * * Returned Value: * None * ****************************************************************************/ -static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t buflen) +static void spi_sndblock(FAR struct spi_dev_s *dev, + FAR const void *buffer, size_t buflen) { FAR struct str71x_spidev_s *priv = (FAR struct str71x_spidev_s *)dev; FAR const uint8_t *ptr = (FAR const uint8_t *)buffer; @@ -846,7 +869,8 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size { /* While the TX FIFO is not full and there are bytes left to send */ - while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFF) == 0 && buflen > 0) + while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & + STR71X_BSPICSR2_TFF) == 0 && buflen > 0) { /* Send the data */ @@ -882,7 +906,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size csr2 = spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET); } } - while ((csr2 & STR71X_BSPICSR2_RFNE) != 0 || (csr2 & STR71X_BSPICSR2_TFNE) == 0); + while ((csr2 & STR71X_BSPICSR2_RFNE) || !(csr2 & STR71X_BSPICSR2_TFNE)); } /**************************************************************************** @@ -910,7 +934,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t buflen) { FAR struct str71x_spidev_s *priv = (FAR struct str71x_spidev_s *)dev; - FAR uint8_t *ptr = (FAR uint8_t*)buffer; + FAR uint8_t *ptr = (FAR uint8_t *)buffer; uint32_t fifobytes = 0; DEBUGASSERT(priv && priv->spibase); @@ -927,17 +951,18 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, * and (3) there are more bytes to be sent. */ - while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFF) == 0 && - (fifobytes < CONFIG_STR714X_BSPI0_TXFIFO_DEPTH) && buflen > 0) + while (spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFF + && fifobytes < CONFIG_STR714X_BSPI0_TXFIFO_DEPTH && buflen > 0) { spi_putreg(priv, STR71X_BSPI_TXR_OFFSET, 0xff00); buflen--; fifobytes++; } - /* Now, read the RX data from the RX FIFO while the RX FIFO is not empty */ + /* Now, read RX data from RX FIFO while RX FIFO is not empty */ - while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_RFNE) != 0) + while (spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) + & STR71X_BSPICSR2_RFNE) { *ptr++ = (uint8_t)(spi_getreg(priv, STR71X_BSPI_RXR_OFFSET) >> 8); fifobytes--; diff --git a/drivers/mmcsd/mmcsd_spi.c b/drivers/mmcsd/mmcsd_spi.c index b0ad4cf591..f108bd0745 100644 --- a/drivers/mmcsd/mmcsd_spi.c +++ b/drivers/mmcsd/mmcsd_spi.c @@ -944,7 +944,7 @@ static int mmcsd_getcardinfo(FAR struct mmcsd_slot_s *slot, uint8_t *buffer, return -EIO; } - /* Try up to 8 times to find the start of block (or until an error occurs) */ + /* Try up to 8 times to find the start of block or until an error occurs */ for (i = 0; i < 8; i++) { @@ -1427,7 +1427,7 @@ static ssize_t mmcsd_write(FAR struct inode *inode, if (nsectors == 1) { - /* Send CMD24 (WRITE_BLOCK) and verify that good R1 status is returned */ + /* Send CMD24(WRITE_BLOCK) and verify that good R1 is returned */ response = mmcsd_sendcmd(slot, &g_cmd24, offset); if (response != MMCSD_SPIR1_OK) @@ -1720,7 +1720,7 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot) result = mmcsd_sendcmd(slot, &g_cmd8, 0x1aa); if (result == MMCSD_SPIR1_IDLESTATE) { - /* Verify the operating voltage and that the 0xaa was correctly echoed */ + /* Verify the operating voltage and 0xaa was correctly echoed */ if (((slot->r7 & MMCSD_SPIR7_VOLTAGE_MASK) == MMCSD_SPIR7_VOLTAGE_27) && diff --git a/drivers/wireless/gs2200m.c b/drivers/wireless/gs2200m.c index 2c565b6531..912f18a3eb 100644 --- a/drivers/wireless/gs2200m.c +++ b/drivers/wireless/gs2200m.c @@ -38,7 +38,7 @@ * * See "GS2200MS2W Adapter Command Reference Guide" for the explanation * of AT commands. You can find the document at: - * https://www.telit.com/m2m-iot-products/wifi-bluetooth-modules/wi-fi-gs2200m/ + * https://telit.com/m2m-iot-products/wifi-bluetooth-modules/wi-fi-gs2200m/ * ****************************************************************************/ diff --git a/drivers/wireless/ieee80211/bcm43xxx/mmc_sdio.c b/drivers/wireless/ieee80211/bcm43xxx/mmc_sdio.c index 3724bfda9d..ce7f41daa8 100644 --- a/drivers/wireless/ieee80211/bcm43xxx/mmc_sdio.c +++ b/drivers/wireless/ieee80211/bcm43xxx/mmc_sdio.c @@ -77,7 +77,7 @@ begin_packed_struct struct sdio_cmd53 uint32_t rw_flag : 1; } end_packed_struct; -begin_packed_struct struct sdio_resp_R5 +begin_packed_struct struct sdio_resp_r5 { uint32_t data : 8; struct @@ -131,7 +131,7 @@ int sdio_io_rw_direct(FAR struct sdio_dev_s *dev, bool write, uint8_t inb, uint8_t *outb) { union sdio_cmd5x arg; - struct sdio_resp_R5 resp; + struct sdio_resp_r5 resp; uint32_t data; int ret; @@ -194,7 +194,7 @@ int sdio_io_rw_extended(FAR struct sdio_dev_s *dev, bool write, unsigned int blocklen, unsigned int nblocks) { union sdio_cmd5x arg; - struct sdio_resp_R5 resp; + struct sdio_resp_r5 resp; uint32_t data; int ret; sdio_eventset_t wkupevent; diff --git a/drivers/wireless/lpwan/sx127x/sx127x.c b/drivers/wireless/lpwan/sx127x/sx127x.c index be02f1b608..27e4cc942d 100644 --- a/drivers/wireless/lpwan/sx127x/sx127x.c +++ b/drivers/wireless/lpwan/sx127x/sx127x.c @@ -409,10 +409,10 @@ static int sx127x_preamble_get(FAR struct sx127x_dev_s *dev); static int sx127x_opmode_set(FAR struct sx127x_dev_s *dev, uint8_t opmode); static uint8_t sx127x_opmode_get(FAR struct sx127x_dev_s *dev); static int sx127x_opmode_init(FAR struct sx127x_dev_s *dev, uint8_t opmode); -static int sx127x_syncword_set(FAR struct sx127x_dev_s *dev, FAR uint8_t *sw, - uint8_t len); -static void sx127x_syncword_get(FAR struct sx127x_dev_s *dev, FAR uint8_t *sw, - FAR uint8_t *len); +static int sx127x_syncword_set(FAR struct sx127x_dev_s *dev, + FAR uint8_t *sw, uint8_t len); +static void sx127x_syncword_get(FAR struct sx127x_dev_s *dev, + FAR uint8_t *sw, FAR uint8_t *len); #ifdef CONFIG_DEBUG_WIRELESS_INFO static void sx127x_dumpregs(FAR struct sx127x_dev_s *dev); #else @@ -1311,7 +1311,7 @@ static int sx127x_lora_isr0_process(FAR struct sx127x_dev_s *dev) case SX127X_OPMODE_RX: case SX127X_OPMODE_RXSINGLE: { - /* REVISIT: Always check PAYLOADCRCERR, even if CRCONPAYLOAD not set */ + /* REVISIT: Always check PAYLOADCRCERR even CRCONPAYLOAD not set */ if ((irq & SX127X_LRM_IRQ_PAYLOADCRCERR) != 0) { @@ -1752,8 +1752,8 @@ static ssize_t sx127x_rxfifo_get(FAR struct sx127x_dev_s *dev, /* Get packet header */ - pkt = (struct sx127x_read_hdr_s *)(dev->rx_buffer + - dev->nxt_read * SX127X_RXFIFO_ITEM_SIZE); + pkt = (struct sx127x_read_hdr_s *) + (dev->rx_buffer + dev->nxt_read * SX127X_RXFIFO_ITEM_SIZE); /* Packet length is data length + header length */ @@ -1763,7 +1763,8 @@ static ssize_t sx127x_rxfifo_get(FAR struct sx127x_dev_s *dev, for (i = 0; i < pktlen && i < SX127X_RXFIFO_ITEM_SIZE; i += 1) { - buffer[i] = dev->rx_buffer[dev->nxt_read * SX127X_RXFIFO_ITEM_SIZE + i]; + buffer[i] = + dev->rx_buffer[dev->nxt_read * SX127X_RXFIFO_ITEM_SIZE + i]; } dev->nxt_read = (dev->nxt_read + 1) % CONFIG_LPWAN_SX127X_RXFIFO_LEN; @@ -2111,8 +2112,8 @@ static int sx127x_fskook_opmode_init(FAR struct sx127x_dev_s *dev, * - RX trigger on PreableDetect */ - setbits = (SX127X_FOM_RXCFG_AGCAUTOON | SX127X_FOM_RXCFG_AFCAUTOON | - SX127X_FOM_RXCFG_TRG_PREDET); + setbits = (SX127X_FOM_RXCFG_AGCAUTOON | SX127X_FOM_RXCFG_AFCAUTOON + | SX127X_FOM_RXCFG_TRG_PREDET); sx127x_writeregbyte(dev, SX127X_FOM_RXCFG, setbits); @@ -2204,7 +2205,8 @@ errout: * ****************************************************************************/ -static int sx127x_fskook_rxbw_set(FAR struct sx127x_dev_s *dev, uint8_t rx_bw) +static int sx127x_fskook_rxbw_set(FAR struct sx127x_dev_s *dev, + uint8_t rx_bw) { DEBUGASSERT(dev->modulation == SX127X_MODULATION_FSK || dev->modulation == SX127X_MODULATION_OOK); @@ -2568,9 +2570,9 @@ static void sx127x_fskook_init(FAR struct sx127x_dev_s *dev) */ setbits = 0; - setbits |= (dev->fskook.fixlen == true ? 0 : SX127X_FOM_PKTCFG1_PCKFORMAT); - setbits |= (dev->crcon == true ? SX127X_FOM_PKTCFG1_CRCON : 0); - clrbits = (SX127X_FOM_PKTCFG1_PCKFORMAT | SX127X_FOM_PKTCFG1_CRCON); + setbits |= dev->fskook.fixlen == true ? 0 : SX127X_FOM_PKTCFG1_PCKFORMAT; + setbits |= dev->crcon == true ? SX127X_FOM_PKTCFG1_CRCON : 0; + clrbits = SX127X_FOM_PKTCFG1_PCKFORMAT | SX127X_FOM_PKTCFG1_CRCON; /* Write packet mode settings 1 */ @@ -3303,7 +3305,7 @@ static void sx127x_lora_init(FAR struct sx127x_dev_s *dev) /* Modem PHY config 2: * - RXCRCON - * NOTE: this works differently for implicit header and explicit header! + * NOTE: this works differently for implicit header and explicit header * - packet mode */ @@ -3498,8 +3500,8 @@ static int sx127x_lora_preamble_get(FAR struct sx127x_dev_s *dev) * Name: sx127x_syncword_get ****************************************************************************/ -static void sx127x_syncword_get(FAR struct sx127x_dev_s *dev, FAR uint8_t *sw, - FAR uint8_t *len) +static void sx127x_syncword_get(FAR struct sx127x_dev_s *dev, + FAR uint8_t *sw, FAR uint8_t *len) { dev->ops.syncword_get(dev, sw, len); } @@ -3508,8 +3510,8 @@ static void sx127x_syncword_get(FAR struct sx127x_dev_s *dev, FAR uint8_t *sw, * Name: sx127x_syncword_set ****************************************************************************/ -static int sx127x_syncword_set(FAR struct sx127x_dev_s *dev, FAR uint8_t *sw, - uint8_t len) +static int sx127x_syncword_set(FAR struct sx127x_dev_s *dev, + FAR uint8_t *sw, uint8_t len) { return dev->ops.syncword_set(dev, sw, len); } diff --git a/fs/partition/fs_ptable.c b/fs/partition/fs_ptable.c index 8d2cf5ad4a..7ea64bf4f3 100644 --- a/fs/partition/fs_ptable.c +++ b/fs/partition/fs_ptable.c @@ -84,7 +84,8 @@ static int read_partition_block(FAR struct partition_state_s *state, { if (state->blk) { - return state->blk->u.i_bops->read(state->blk, buffer, startblock, nblocks); + return state->blk->u.i_bops->read(state->blk, + buffer, startblock, nblocks); } else { diff --git a/include/nuttx/sdio.h b/include/nuttx/sdio.h index e232b51227..977df5bd5b 100644 --- a/include/nuttx/sdio.h +++ b/include/nuttx/sdio.h @@ -640,13 +640,13 @@ * ****************************************************************************/ -#define SDIO_RECVR1(dev,cmd,R1) ((dev)->recv_r1(dev,cmd,R1)) /* 48-bit */ -#define SDIO_RECVR2(dev,cmd,R2) ((dev)->recv_r2(dev,cmd,R2)) /* 136-bit */ -#define SDIO_RECVR3(dev,cmd,R3) ((dev)->recv_r3(dev,cmd,R3)) /* 48-bit */ -#define SDIO_RECVR4(dev,cmd,R4) ((dev)->recv_r4(dev,cmd,R4)) /* 48-bit */ -#define SDIO_RECVR5(dev,cmd,R5) ((dev)->recv_r5(dev,cmd,R5)) /* 48-bit */ -#define SDIO_RECVR6(dev,cmd,R6) ((dev)->recv_r6(dev,cmd,R6)) /* 48-bit */ -#define SDIO_RECVR7(dev,cmd,R7) ((dev)->recv_r7(dev,cmd,R7)) /* 48-bit */ +#define SDIO_RECVR1(dev,cmd,r1) ((dev)->recv_r1(dev,cmd,r1)) /* 48-bit */ +#define SDIO_RECVR2(dev,cmd,r2) ((dev)->recv_r2(dev,cmd,r2)) /* 136-bit */ +#define SDIO_RECVR3(dev,cmd,r3) ((dev)->recv_r3(dev,cmd,r3)) /* 48-bit */ +#define SDIO_RECVR4(dev,cmd,r4) ((dev)->recv_r4(dev,cmd,r4)) /* 48-bit */ +#define SDIO_RECVR5(dev,cmd,r5) ((dev)->recv_r5(dev,cmd,r5)) /* 48-bit */ +#define SDIO_RECVR6(dev,cmd,r6) ((dev)->recv_r6(dev,cmd,r6)) /* 48-bit */ +#define SDIO_RECVR7(dev,cmd,r7) ((dev)->recv_r7(dev,cmd,r7)) /* 48-bit */ /**************************************************************************** * Name: SDIO_WAITENABLE diff --git a/wireless/ieee802154/mac802154_get_mhrlen.c b/wireless/ieee802154/mac802154_get_mhrlen.c index a710e33a82..88b2187fea 100644 --- a/wireless/ieee802154/mac802154_get_mhrlen.c +++ b/wireless/ieee802154/mac802154_get_mhrlen.c @@ -54,7 +54,18 @@ #include /**************************************************************************** - * Public MAC Functions + * Private Data + ****************************************************************************/ + +/* Map between ieee802154_addrmode_e enum and actual address length */ + +static const uint8_t mac802154_addr_length[4] = +{ + 0, 0, 2, 8 +}; + +/**************************************************************************** + * Public Functions ****************************************************************************/ /**************************************************************************** @@ -72,8 +83,9 @@ int mac802154_get_mhrlen(MACHANDLE mac, (FAR struct ieee802154_privmac_s *)mac; int ret = 3; /* Always frame control (2 bytes) and seq. num (1 byte) */ - /* Check to make sure both the dest address and the source address are not set - * to NONE */ + /* Check to make sure both the dest address and the source address are not + * set to NONE + */ if (meta->destaddr.mode == IEEE802154_ADDRMODE_NONE && meta->srcmode == IEEE802154_ADDRMODE_NONE) @@ -81,7 +93,9 @@ int mac802154_get_mhrlen(MACHANDLE mac, return -EINVAL; } - /* The source address can only be set to NONE if the device is the PAN coord */ + /* The source address can only be set to NONE + * if the device is the PAN coord + */ if (meta->srcmode == IEEE802154_ADDRMODE_NONE && priv->devmode != IEEE802154_DEVMODE_PANCOORD) @@ -95,10 +109,10 @@ int mac802154_get_mhrlen(MACHANDLE mac, /* Add the source address length */ - ret += mac802154_addr_length[ meta->srcmode]; + ret += mac802154_addr_length[meta->srcmode]; - /* If both destination and source addressing information is present, the MAC - * sublayer shall compare the destination and source PAN identifiers. + /* If both destination and source addressing information is present, the + * MAC sublayer shall compare the destination and source PAN identifiers. * [1] pg. 41. */ @@ -117,8 +131,8 @@ int mac802154_get_mhrlen(MACHANDLE mac, } } - /* If we are here, PAN ID compression is off, so include the dest and source - * PAN ID if the respective address is included + /* If we are here, PAN ID compression is off, so include the dest and + * source PAN ID if the respective address is included */ if (meta->srcmode != IEEE802154_ADDRMODE_NONE) diff --git a/wireless/ieee802154/mac802154_internal.h b/wireless/ieee802154/mac802154_internal.h index d6b3cd56e5..718723f08b 100644 --- a/wireless/ieee802154/mac802154_internal.h +++ b/wireless/ieee802154/mac802154_internal.h @@ -67,6 +67,7 @@ ****************************************************************************/ /* Configuration ************************************************************/ + /* If processing is not done at the interrupt level, then work queue support * is required. */ @@ -85,15 +86,7 @@ #endif /**************************************************************************** - * Private Data - ****************************************************************************/ - -/* Map between ieee802154_addrmode_e enum and actual address length */ - -static const uint8_t mac802154_addr_length[4] = {0, 0, 2, 8}; - -/**************************************************************************** - * Private Types + * Public Types ****************************************************************************/ struct mac802154_radiocb_s @@ -102,11 +95,12 @@ struct mac802154_radiocb_s FAR struct ieee802154_privmac_s *priv; }; -/* Enumeration for representing what operation the MAC layer is currently doing. - * There can only be one command being handled at any given time, but certain - * operations such as association requires more than one command to be sent. - * Therefore, the need to track not only what command is currently active, but - * also, what overall operation the command is apart of is necessary. +/* Enumeration for representing what operation the MAC layer is currently + * doing. There can only be one command being handled at any given time, but + * certain operations such as association requires more than one command to + * be sent. Therefore, the need to track not only what command is currently + * active, but also, what overall operation the command is apart of is + * necessary. */ enum mac802154_operation_e @@ -126,7 +120,7 @@ enum mac802154_operation_e struct ieee802154_privmac_s { - /*************************** General Fields *********************************/ + /*************************** General Fields *******************************/ FAR struct ieee802154_radio_s *radio; /* Contained IEEE802.15.4 radio dev */ FAR struct mac802154_maccb_s *cb; /* Head of a list of MAC callbacks */ @@ -136,12 +130,13 @@ struct ieee802154_privmac_s uint8_t nclients; /* Number of notification clients */ /* Only support a single command at any given time. As of now I see no - * condition where you need to have more than one command frame simultaneously + * condition where you need to have more than one command frame + * simultaneously */ sem_t opsem; /* Exclusive operations */ - /******************* Fields related to MAC operations ***********************/ + /******************* Fields related to MAC operations *********************/ enum mac802154_operation_e curr_op; /* The current overall operation */ enum ieee802154_cmdid_e curr_cmd; /* Type of the current cmd */ @@ -149,7 +144,7 @@ struct ieee802154_privmac_s uint8_t nrxusers; struct work_s macop_work; - /******************* Fields related to SCAN operation ***********************/ + /******************* Fields related to SCAN operation *********************/ uint8_t scanindex; uint8_t edlist[15]; @@ -159,13 +154,14 @@ struct ieee802154_privmac_s struct ieee802154_scan_req_s currscan; uint32_t scansymdur; - /******************* Fields related to notifications ************************/ + /******************* Fields related to notifications **********************/ sq_queue_t primitive_queue; /* Queue of primitives to pass via notify() - * callback to registered receivers */ - struct work_s notifwork; /* For deferring notifications to LPWORK queue*/ + * callback to registered receivers + */ + struct work_s notifwork; /* For deferring notifications to LPWORK queue */ - /******************* Tx descriptor queues and pools *************************/ + /******************* Tx descriptor queues and pools ***********************/ struct ieee802154_txdesc_s txdesc_pool[CONFIG_MAC802154_NTXDESC]; sem_t txdesc_sem; @@ -181,12 +177,13 @@ struct ieee802154_privmac_s sq_queue_t csma_queue; sq_queue_t gts_queue; - /* Support a singly linked list of transactions that will be sent indirectly. - * This list should only be used by a MAC acting as a coordinator. These - * transactions will stay here until the data is extracted by the destination - * device sending a Data Request MAC command or if too much time passes. This - * list should also be used to populate the address list of the outgoing - * beacon frame. + /* Support a singly linked list of transactions that will be sent + * indirectly. This list should only be used by a MAC acting as a + * coordinator. These transactions will stay here until the data + * is extracted by the destination device sending a Data Request + * MAC command or if too much time passes. This list should also + * be used to populate the address list of the outgoing beacon + * frame. */ sq_queue_t indirect_queue; @@ -195,15 +192,15 @@ struct ieee802154_privmac_s sq_queue_t dataind_queue; - /************* Fields related to addressing and coordinator *****************/ + /************* Fields related to addressing and coordinator ***************/ - /* Holds all address information (Extended, Short, and PAN ID) for the MAC. */ + /* Holds all address information (Extended, Short, and PAN ID) for MAC */ struct ieee802154_addr_s addr; struct ieee802154_pandesc_s pandesc; - /*************** Fields related to beacon-enabled networks ******************/ + /*************** Fields related to beacon-enabled networks ****************/ /* Holds attributes pertaining to the superframe specification */ @@ -220,7 +217,7 @@ struct ieee802154_privmac_s uint8_t beaconpayload[IEEE802154_MAX_BEACON_PAYLOAD_LEN]; uint8_t beaconpayloadlength; - /****************** Fields related to offloading work ***********************/ + /****************** Fields related to offloading work *********************/ /* Work structures for offloading aynchronous work */ @@ -229,7 +226,7 @@ struct ieee802154_privmac_s struct work_s purge_work; struct work_s timer_work; - /****************** Uncategorized MAC PIB attributes ***********************/ + /****************** Uncategorized MAC PIB attributes **********************/ /* The maximum time to wait either for a frame intended as a response to a * data request frame or for a broadcast frame following a beacon with the @@ -249,9 +246,9 @@ struct ieee802154_privmac_s uint8_t dsn; /* Seq. num added to tx data or MAC frame */ - /* The maximum time, in multiples of aBaseSuperframeDuration, a device shall - * wait for a response command frame to be available following a request - * command frame. [1] 128. + /* The maximum time, in multiples of aBaseSuperframeDuration, a device + * shall wait for a response command frame to be available following a + * request command frame. [1] 128. */ uint8_t resp_waittime; @@ -279,7 +276,7 @@ struct ieee802154_privmac_s /* Start of 32-bit bitfield */ - /* The offset, measured is symbols, between the symbol boundary at which the + /* The offset, measured is symbols, between the symbol boundary at which * MLME captures the timestamp of each transmitted and received frame, and * the onset of the first symbol past the SFD, namely the first symbol of * the frames [1] pg. 129. @@ -313,6 +310,7 @@ struct ieee802154_privmac_s uint8_t max_csmabackoffs : 3; /* Max num backoffs for CSMA algorithm * before declaring ch access failure */ uint8_t maxretries : 3; /* Max # of retries allowed after tx fail */ + /* End of 8-bit bitfield. */ /* Start of 8-bit bitfield */ @@ -321,8 +319,6 @@ struct ieee802154_privmac_s /* End of 8-bit bitfield. */ - - /* TODO: Add Security-related MAC PIB attributes */ }; @@ -524,7 +520,7 @@ void mac802154_notify(FAR struct ieee802154_privmac_s *priv, ((GETHOST16(ptr, index) & IEEE802154_GTSDIR_MASK) >> \ IEEE802154_GTSDIR_SHIFT_MASK) -/* Helper macros for setting/receiving bits for Pending Address Specification */ +/* Helper macros for setting/receiving bits for Pending Address */ #define IEEE802154_GETNPENDSADDR(ptr, index) \ ((GETHOST16(ptr, index) & IEEE802154_PENDADDR_NSADDR) >> \ @@ -562,8 +558,9 @@ static inline int mac802154_takesem(sem_t *sem, bool allowinterrupt) #define mac802154_lock(dev, allowinterrupt) \ mac802154_lockpriv(dev, allowinterrupt, __FUNCTION__) -static inline int mac802154_lockpriv(FAR struct ieee802154_privmac_s *dev, - bool allowinterrupt, FAR const char *funcname) +static inline int +mac802154_lockpriv(FAR struct ieee802154_privmac_s *dev, + bool allowinterrupt, FAR const char *funcname) { int ret; @@ -585,8 +582,9 @@ static inline int mac802154_lockpriv(FAR struct ieee802154_privmac_s *dev, return ret; } -static inline void mac802154_txdesc_free(FAR struct ieee802154_privmac_s *priv, - FAR struct ieee802154_txdesc_s *txdesc) +static inline void +mac802154_txdesc_free(FAR struct ieee802154_privmac_s *priv, + FAR struct ieee802154_txdesc_s *txdesc) { sq_addlast((FAR sq_entry_t *)txdesc, &priv->txdesc_queue); mac802154_givesem(&priv->txdesc_sem); @@ -603,8 +601,8 @@ static inline void mac802154_txdesc_free(FAR struct ieee802154_privmac_s *priv, * ****************************************************************************/ -static inline uint32_t mac802154_symtoticks(FAR struct ieee802154_privmac_s *priv, - uint32_t symbols) +static inline uint32_t +mac802154_symtoticks(FAR struct ieee802154_privmac_s *priv, uint32_t symbols) { union ieee802154_attr_u attrval; uint32_t ret; @@ -621,18 +619,18 @@ static inline uint32_t mac802154_symtoticks(FAR struct ieee802154_privmac_s *pri ret = ((uint64_t)attrval.phy.symdur_picosec * symbols) / (1000 * 1000); - /* This method should only be used for things that can be late. For instance, - * it's always okay to wait a little longer before disabling your receiver. - * Therefore, we force the tick count to round up. + /* This method should only be used for things that can be late. For + * instance, it's always okay to wait a little longer before disabling + * your receiver. Therefore, we force the tick count to round up. */ if (ret % USEC_PER_TICK == 0) { - ret = ret/USEC_PER_TICK; + ret = ret / USEC_PER_TICK; } else { - ret = ret/USEC_PER_TICK; + ret = ret / USEC_PER_TICK; ret++; } @@ -652,12 +650,15 @@ static inline uint32_t mac802154_symtoticks(FAR struct ieee802154_privmac_s *pri * ****************************************************************************/ -static inline void mac802154_timerstart(FAR struct ieee802154_privmac_s *priv, +static inline void +mac802154_timerstart(FAR struct ieee802154_privmac_s *priv, uint32_t numsymbols, worker_t worker) { DEBUGASSERT(work_available(&priv->timer_work)); - /* Schedule the work, converting the number of symbols to the number of CPU ticks */ + /* Schedule the work + * converting the number of symbols to the number of CPU ticks + */ work_queue(HPWORK, &priv->timer_work, worker, priv, mac802154_symtoticks(priv, numsymbols)); @@ -674,14 +675,16 @@ static inline void mac802154_timerstart(FAR struct ieee802154_privmac_s *priv, * ****************************************************************************/ -static inline int mac802154_timercancel(FAR struct ieee802154_privmac_s *priv) +static inline int +mac802154_timercancel(FAR struct ieee802154_privmac_s *priv) { work_cancel(HPWORK, &priv->timer_work); wlinfo("Timer cancelled\n"); return OK; } -static inline void mac802154_rxenable(FAR struct ieee802154_privmac_s *priv) +static inline void +mac802154_rxenable(FAR struct ieee802154_privmac_s *priv) { priv->nrxusers++; @@ -694,7 +697,8 @@ static inline void mac802154_rxenable(FAR struct ieee802154_privmac_s *priv) } } -static inline void mac802154_rxdisable(FAR struct ieee802154_privmac_s *priv) +static inline void +mac802154_rxdisable(FAR struct ieee802154_privmac_s *priv) { priv->nrxusers--; @@ -707,54 +711,61 @@ static inline void mac802154_rxdisable(FAR struct ieee802154_privmac_s *priv) } } -static inline void mac802154_setchannel(FAR struct ieee802154_privmac_s *priv, - uint8_t channel) +static inline void +mac802154_setchannel(FAR struct ieee802154_privmac_s *priv, + uint8_t channel) { priv->radio->setattr(priv->radio, IEEE802154_ATTR_PHY_CHAN, (FAR const union ieee802154_attr_u *)&channel); } -static inline void mac802154_setchpage(FAR struct ieee802154_privmac_s *priv, - uint8_t chpage) +static inline void +mac802154_setchpage(FAR struct ieee802154_privmac_s *priv, + uint8_t chpage) { priv->radio->setattr(priv->radio, IEEE802154_ATTR_PHY_CURRENT_PAGE, (FAR const union ieee802154_attr_u *)&chpage); } -static inline void mac802154_setpanid(FAR struct ieee802154_privmac_s *priv, - const uint8_t *panid) +static inline void +mac802154_setpanid(FAR struct ieee802154_privmac_s *priv, + FAR const uint8_t *panid) { IEEE802154_PANIDCOPY(priv->addr.panid, panid); priv->radio->setattr(priv->radio, IEEE802154_ATTR_MAC_PANID, (FAR const union ieee802154_attr_u *)panid); } -static inline void mac802154_setsaddr(FAR struct ieee802154_privmac_s *priv, - const uint8_t *saddr) +static inline void +mac802154_setsaddr(FAR struct ieee802154_privmac_s *priv, + FAR const uint8_t *saddr) { IEEE802154_SADDRCOPY(priv->addr.saddr, saddr); priv->radio->setattr(priv->radio, IEEE802154_ATTR_MAC_SADDR, (FAR const union ieee802154_attr_u *)saddr); } -static inline void mac802154_setcoordsaddr(FAR struct ieee802154_privmac_s *priv, - const uint8_t *saddr) +static inline void +mac802154_setcoordsaddr(FAR struct ieee802154_privmac_s *priv, + FAR const uint8_t *saddr) { IEEE802154_SADDRCOPY(priv->pandesc.coordaddr.saddr, saddr); priv->radio->setattr(priv->radio, IEEE802154_ATTR_MAC_COORD_SADDR, (FAR const union ieee802154_attr_u *)saddr); } -static inline void mac802154_setcoordeaddr(FAR struct ieee802154_privmac_s *priv, - const uint8_t *eaddr) +static inline void +mac802154_setcoordeaddr(FAR struct ieee802154_privmac_s *priv, + FAR const uint8_t *eaddr) { IEEE802154_EADDRCOPY(priv->pandesc.coordaddr.eaddr, eaddr); priv->radio->setattr(priv->radio, IEEE802154_ATTR_MAC_COORD_EADDR, (FAR const union ieee802154_attr_u *)eaddr); } -static inline void mac802154_setcoordaddr(FAR struct ieee802154_privmac_s *priv, - FAR const struct ieee802154_addr_s *addr) +static inline void +mac802154_setcoordaddr(FAR struct ieee802154_privmac_s *priv, + FAR const struct ieee802154_addr_s *addr) { memcpy(&priv->pandesc.coordaddr, addr, sizeof(struct ieee802154_addr_s)); priv->radio->setattr(priv->radio, IEEE802154_ATTR_MAC_COORD_EADDR, @@ -763,8 +774,8 @@ static inline void mac802154_setcoordaddr(FAR struct ieee802154_privmac_s *priv, (FAR const union ieee802154_attr_u *)addr->saddr); } -static inline void mac802154_setrxonidle(FAR struct ieee802154_privmac_s *priv, - bool rxonidle) +static inline void +mac802154_setrxonidle(FAR struct ieee802154_privmac_s *priv, bool rxonidle) { priv->rxonidle = rxonidle; if (priv->rxonidle) @@ -780,8 +791,8 @@ static inline void mac802154_setrxonidle(FAR struct ieee802154_privmac_s *priv, (FAR const union ieee802154_attr_u *)&rxonidle); } -static inline void mac802154_setdevmode(FAR struct ieee802154_privmac_s *priv, - uint8_t mode) +static inline void +mac802154_setdevmode(FAR struct ieee802154_privmac_s *priv, uint8_t mode) { priv->devmode = mode; priv->radio->setattr(priv->radio, IEEE802154_ATTR_MAC_DEVMODE,