boards: spresense: Introduce ramconfig-new.ld for the system bus
Summary: - In order to support the atomic instructions by ldrex/strex instruction in NuttX SMP, the data or later sections are mapped to the system bus. Impact: - Bootloader for Spresense SDK 2.1.0 or later must be installed - Loops per msec must be adjusted - Physical address for DMA must be converted with CXD56_PHYSADDR Testing: - Will be tested with later commits Signed-off-by: Kazuya Hioki <Kazuya.Hioki@sony.com> Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
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@ -19,6 +19,10 @@ as the more advanced NuttX based SDK.
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Refer to https://developer.sony.com/develop/spresense/ for further information
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about this board.
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NOTICE:
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To run the nuttx, bootloader for Spresense SDK 2.1.0 or later must be installed.
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Configuration sub-directories
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-----------------------------
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@ -36,9 +40,7 @@ Configuration sub-directories
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smp
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This is a configuration to run Spresense in SMP mode. To use this
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configuration, bootloader for Spresense SDK 1.5.0 or later must be
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installed.
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This is a configuration to run Spresense in SMP mode.
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wifi
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@ -25,7 +25,11 @@ include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
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# Setup for the kind of memory that we are executing from
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LDSCRIPT = ramconfig.ld
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ifeq ($(CONFIG_CXD56_USE_SYSBUS), y)
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LDSCRIPT = ramconfig-new.ld
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else
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LDSCRIPT = ramconfig.ld
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endif
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ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
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ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
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112
boards/arm/cxd56xx/spresense/scripts/ramconfig-new.ld
Normal file
112
boards/arm/cxd56xx/spresense/scripts/ramconfig-new.ld
Normal file
@ -0,0 +1,112 @@
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/****************************************************************************
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* boards/arm/cxd56xx/spresense/scripts/ramconfig-new.ld
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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MEMORY
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{
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ram (rwx) : ORIGIN = 0x0d000000, LENGTH = 1536K
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}
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OUTPUT_ARCH(arm)
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ENTRY(__start) /* Treat __start as the anchor for dead code stripping */
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EXTERN(_vectors) /* Force the vectors to be included in the output */
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EXTERN(__stack) /* Force the __stack to be included in the output */
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SECTIONS
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{
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.text : {
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_stext = ABSOLUTE(.);
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*(.vectors)
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*(.text .text.*)
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*(.fixup)
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*(.gnu.warning)
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*(.rodata .rodata.*)
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*(.gnu.linkonce.t.*)
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*(.glue_7)
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*(.glue_7t)
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*(.got)
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*(.gcc_except_table)
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*(.gnu.linkonce.r.*)
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_image_modlist_base = .;
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KEEP(*(.modulelist))
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_image_modlist_limit = .;
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_etext = ABSOLUTE(.);
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} > ram
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.init_section : {
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_sinit = ABSOLUTE(.);
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KEEP(*(.init_array .init_array.*))
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_einit = ABSOLUTE(.);
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} > ram
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.ARM.extab : {
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*(.ARM.extab*)
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} > ram
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__exidx_start = ABSOLUTE(.);
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.ARM.exidx : {
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*(.ARM.exidx*)
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} > ram
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__exidx_end = ABSOLUTE(.);
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_eronly = ABSOLUTE(.);
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/* Map .data and .bss sections to system bus */
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. = ALIGN(16);
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. |= 0x20000000;
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.data . : ALIGN(16) {
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_sdata = ABSOLUTE(.);
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*(.data .data.*)
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*(.gnu.linkonce.d.*)
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CONSTRUCTORS
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. = ALIGN(4);
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_edata = ABSOLUTE(.);
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} AT > ram
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.bss . : { /* BSS */
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_sbss = ABSOLUTE(.);
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*(.bss .bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = ABSOLUTE(.);
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} AT > ram
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/* __stack symbol is referred from mkspk tool
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* and means the end address of heap region */
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PROVIDE(__stack = ORIGIN(ram) + LENGTH(ram) + 0x20000000);
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__stack -= DEFINED(__reserved_ramsize) ? __reserved_ramsize : 0;
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ASSERT(_ebss < __stack, "Error: Out of memory")
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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}
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