A10: Fix DDR mapping

arch/arm/src/a1x/Kconfig

@@ -333,4 +333,51 @@ config A1X_BOOT_USB
 	bool "USB"
 
 endchoice # Boot device
+
+config A1X_DDR_MAPOFFSET
+	int "Installed SDRAM offset"
+	default 0
+	---help---
+		The size of the installed SRAM memory is required in order to
+		properly configure memory mapping.  The mapping will begin at the
+		start of SDRAM plus A1X_DDR_MAPOFFSET and extend for DDR_MAPSIZE
+		bytes.  NOTE typically A1X_MAP_OFFSET is zero and A1X_DDR_MAPSIZE is
+		the full, installed size of the DRAM.  But these values can be
+		modified to set aside memory at the beginning or end of SRAM that is
+		unmapped (or mapped differently).  NOTE also that this value relates
+		closely to other settings:
+
+			RAM_START and RAM_VSTART give this physical and virtual addresses
+			of the start of usable memory (begining with .text).  NOTE that
+			this may not necessarily be the actual start of the mapped SDRAM
+			region.  It will be larger if NuttX begins at an offset from
+			beginning of mapped SDRAM (which is the normal case).
+
+			RAM_SIZE gives the size of the .text, .data, and .bss sections
+			plus the size of the available heap.  NOTE that RAM_SIZE may not
+			include all of SDRAM up to the end of mapped region.
+
+config A1X_DDR_MAPSIZE
+	int "Installed SDRAM size"
+	default 1073741824
+	---help---
+		The size of the installed SRAM memory is required in order to
+		properly configure memory mapping.  The mapping will begin at the
+		start of SDRAM plus A1X_DDR_MAPOFFSET and extend for DDR_MAPSIZE
+		bytes.  NOTE typically A1X_MAP_OFFSET is zero and A1X_DDR_MAPSIZE is
+		the full, installed size of the DRAM.  But these values can be
+		modified to set aside memory at the beginning or end of SRAM that is
+		unmapped (or mapped differently).  NOTE also that this value relates
+		closely to other settings:
+
+			RAM_START and RAM_VSTART give this physical and virtual addresses
+			of the start of usable memory (begining with .text).  NOTE that
+			this may not necessarily be the actual start of the mapped SDRAM
+			region.  It will be larger if NuttX begins at an offset from
+			beginning of mapped SDRAM (which is the normal case).
+
+			RAM_SIZE gives the size of the .text, .data, and .bss sections
+			plus the size of the available heap.  NOTE that RAM_SIZE may not
+			include all of SDRAM up to the end of mapped region.
+
 endif # ARCH_CHIP_A1X

arch/arm/src/a1x/a1x_boot.c

@@ -110,7 +110,7 @@ static const struct section_mapping_s section_mapping[] =
   { A1X_DE_PSECTION,      A1X_DE_VSECTION,
     A1X_DE_MMUFLAGS,      A1X_DE_NSECTIONS
   },
-  { A1X_DDR_PSECTION,     A1X_DDR_VSECTION,
+  { A1X_DDR_MAPPADDR,     A1X_DDR_MAPVADDR,
     A1X_DDR_MMUFLAGS,     A1X_DDR_NSECTIONS
   },
   { A1X_BROM_PSECTION,    A1X_BROM_VSECTION,

arch/arm/src/a1x/chip/a10_memorymap.h

@@ -257,7 +257,8 @@
 
 /* Force configured sizes that might exceed 2GB to be unsigned long */
 
-#define A1X_DDR_SIZE         MKULONG(CONFIG_A1X_DDR_SIZE)
+#define A1X_DDR_MAPOFFSET    MKULONG(CONFIG_A1X_DDR_MAPOFFSET)
+#define A1X_DDR_MAPSIZE      MKULONG(CONFIG_A1X_DDR_MAPSIZE)
 #define A1X_DDR_HEAP_OFFSET  MKULONG(CONFIG_A1X_DDR_HEAP_OFFSET)
 #define A1X_DDR_HEAP_SIZE    MKULONG(CONFIG_A1X_DDR_HEAP_SIZE)
 
@@ -280,7 +281,7 @@
 #define A1X_PERIPH_NSECTIONS _NSECTIONS(A1X_PERIPH_SIZE)
 #define A1X_SRAMC_NSECTIONS  _NSECTIONS(A1X_SRAMC_SIZE)
 #define A1X_DE_NSECTIONS     _NSECTIONS(A1X_DE_SIZE)
-#define A1X_DDR_NSECTIONS    _NSECTIONS(CONFIG_RAM_SIZE)
+#define A1X_DDR_NSECTIONS    _NSECTIONS(A1X_DDR_MAPSIZE)
 #define A1X_BROM_NSECTIONS   _NSECTIONS(A1X_BROM_SIZE)
 
 /* Section MMU Flags */
@@ -410,6 +411,11 @@
 
 #define A1X_BROM_VADDR       (A1X_BROM_VSECTION+A1X_BROM_OFFSET)
 
+/* Offset SDRAM address */
+
+#define A1X_DDR_MAPPADDR     (A1X_DDR_PSECTION+A1X_DDR_MAPOFFSET)
+#define A1X_DDR_MAPVADDR     (A1X_DDR_VSECTION+A1X_DDR_MAPOFFSET)
+
 /* NuttX virtual base address
  *
  * The boot logic will create a temporarily mapping based on where NuttX is
@@ -545,10 +551,10 @@
 
 /* Paging L2 page table offset/size */
 
-#define PGTABLE_START_PADDR       (A1X_DDR_PSECTION+CONFIG_RAM_SIZE)
+#define PGTABLE_L2_START_PADDR    (A1X_DDR_PSECTION+A1X_DDR_MAPOFFSET+A1X_DDR_MAPSIZE)
 #define PGTABLE_BROM_OFFSET       0x3ffc
 
-#define PGTABLE_L2_OFFSET         ((PGTABLE_START_PADDR >> 18) & ~3)
+#define PGTABLE_L2_OFFSET         ((PGTABLE_L2_START_PADDR >> 18) & ~3)
 #define PGTABLE_L2_SIZE           (PGTABLE_BROM_OFFSET - PGTABLE_L2_OFFSET)
 
 /* Paging L2 page table base addresses

configs/pcduino-a10/nsh/defconfig

@@ -196,6 +196,8 @@ CONFIG_A1X_UART0=y
 # CONFIG_A1X_BOOT_SPINOR is not set
 CONFIG_A1X_BOOT_SDCARD=y
 # CONFIG_A1X_BOOT_USB is not set
+CONFIG_A1X_DDR_MAPOFFSET=0
+CONFIG_A1X_DDR_MAPSIZE=1073741824
 
 #
 # Architecture Options
@@ -263,6 +265,7 @@ CONFIG_NSH_MMCSDMINOR=0
 #
 # CONFIG_BOARD_INITIALIZE is not set
 CONFIG_MSEC_PER_TICK=10
+# CONFIG_SYSTEM_TIME64 is not set
 CONFIG_RR_INTERVAL=200
 # CONFIG_SCHED_INSTRUMENTATION is not set
 CONFIG_TASK_NAME_SIZE=32