xtensa/esp32s3: Add basic support to SPI

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

arch/xtensa/src/esp32s3/Kconfig

@@ -306,6 +306,10 @@ config ESP32S3_TIMER
 	bool
 	default n
 
+config ESP32S3_SPI
+	bool
+	default n
+
 config ESP32S3_WDT
 	bool
 	default n
@@ -314,6 +318,18 @@ config ESP32S3_SPIRAM
 	bool "SPI RAM Support"
 	default n
 
+config ESP32S3_SPI2
+	bool "SPI 2"
+	default n
+	select ESP32S3_SPI
+	select SPI
+
+config ESP32S3_SPI3
+	bool "SPI 3"
+	default n
+	select ESP32S3_SPI
+	select SPI
+
 config ESP32S3_UART0
 	bool "UART 0"
 	default n
@@ -517,6 +533,72 @@ config ESP32S3_GPIO_IRQ
 	---help---
 		Enable support for interrupting GPIO pins.
 
+menu "SPI configuration"
+	depends on ESP32S3_SPI
+
+config ESP32S3_SPI_SWCS
+	bool "SPI software CS"
+	default n
+	---help---
+		Use SPI software CS.
+
+config ESP32S3_SPI_UDCS
+	bool "User defined CS"
+	default n
+	depends on ESP32S3_SPI_SWCS
+	---help---
+		Use user-defined CS.
+
+if ESP32S3_SPI2
+
+config ESP32S3_SPI2_CSPIN
+	int "SPI2 CS Pin"
+	default 10
+	range 0 48
+
+config ESP32S3_SPI2_CLKPIN
+	int "SPI2 CLK Pin"
+	default 12
+	range 0 48
+
+config ESP32S3_SPI2_MOSIPIN
+	int "SPI2 MOSI Pin"
+	default 11
+	range 0 48
+
+config ESP32S3_SPI2_MISOPIN
+	int "SPI2 MISO Pin"
+	default 13
+	range 0 48
+
+endif # ESP32S3_SPI2
+
+if ESP32S3_SPI3
+
+config ESP32S3_SPI3_CSPIN
+	int "SPI3 CS Pin"
+	default 10
+	range 0 48
+
+config ESP32S3_SPI3_CLKPIN
+	int "SPI3 CLK Pin"
+	default 6
+	range 0 48
+
+config ESP32S3_SPI3_MOSIPIN
+	int "SPI3 MOSI Pin"
+	default 7
+	range 0 48
+
+config ESP32S3_SPI3_MISOPIN
+	int "SPI3 MISO Pin"
+	default 2
+	range 0 48
+
+endif # ESP32S3_SPI3
+
+endmenu # SPI configuration
+
 menu "UART Configuration"
 	depends on ESP32S3_UART
 

arch/xtensa/src/esp32s3/Make.defs

@@ -122,6 +122,10 @@ ifeq ($(CONFIG_ESP32S3_RT_TIMER),y)
 CHIP_CSRCS += esp32s3_rt_timer.c
 endif
 
+ifeq ($(CONFIG_ESP32S3_SPI),y)
+CHIP_CSRCS += esp32s3_spi.c
+endif
+
 ifeq ($(CONFIG_ESP32S3_SPIFLASH),y)
 CHIP_CSRCS += esp32s3_spiflash.c
 ifeq ($(CONFIG_ESP32S3_MTD),y)

arch/xtensa/src/esp32s3/esp32s3_spi.h

@@ -0,0 +1,150 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32s3/esp32s3_spi.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_SPI_H
+#define __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_SPI_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+#ifdef CONFIG_ESP32S3_SPI
+
+#include <nuttx/spi/spi.h>
+
+#ifdef CONFIG_ESP32S3_SPI2
+#  define ESP32S3_SPI2 2
+#endif
+
+#ifdef CONFIG_ESP32S3_SPI3
+#  define ESP32S3_SPI3 3
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32s3_spibus_initialize
+ *
+ * Description:
+ *   Initialize the selected SPI bus.
+ *
+ * Input Parameters:
+ *   port     - Port number (for hardware that has multiple SPI interfaces)
+ *
+ * Returned Value:
+ *   Valid SPI device structure reference on success; NULL on failure
+ *
+ ****************************************************************************/
+
+struct spi_dev_s *esp32s3_spibus_initialize(int port);
+
+/****************************************************************************
+ * Name:  esp32s3_spi[2|3]_select and esp32s3_spi[2|3]_status
+ *
+ * Description:
+ *   The external functions, esp32s3_spi[2|3]_select,
+ *   esp32s3_spi[2|3]_status, and esp32s3_spi[2|3]_cmddata must be provided
+ *   by board-specific logic.
+ *   These are implementations of the select, status, and cmddata methods of
+ *   the SPI interface defined by struct spi_ops_s (include/nuttx/spi/spi.h).
+ *   All other methods (including esp32s3_spibus_initialize()) are provided
+ *   by common ESP32-S3 logic. To use this common SPI logic on your board:
+ *
+ *   1. Provide logic in esp32s3_board_initialize() to configure SPI chip
+ *      select pins.
+ *   2. Provide esp32s3_spi[2|3]_select() and esp32s3_spi[2|3]_status()
+ *      functions in your board-specific logic. These functions will perform
+ *      chip selection and status operations using GPIOs in the way your
+ *      board is configured.
+ *   3. If CONFIG_SPI_CMDDATA is defined in your NuttX configuration file,
+ *      then provide esp32s3_spi[2|3]_cmddata() functions in your
+ *      board-specific logic. These functions will perform cmd/data selection
+ *      operations using GPIOs in the way your board is configured.
+ *   4. Add a call to esp32s3_spibus_initialize() in your low level
+ *      application initialization logic.
+ *   5. The handle returned by esp32s3_spibus_initialize() may then be used
+ *      to bind the SPI driver to higher level logic (e.g., calling
+ *      mmcsd_spislotinitialize(), for example, will bind the SPI driver to
+ *      the SPI MMC/SD driver).
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32S3_SPI2
+void esp32s3_spi2_select(struct spi_dev_s *dev, uint32_t devid,
+                         bool selected);
+uint8_t esp32s3_spi2_status(struct spi_dev_s *dev, uint32_t devid);
+int esp32s3_spi2_cmddata(struct spi_dev_s *dev,
+                         uint32_t devid,
+                         bool cmd);
+#endif
+
+#ifdef CONFIG_ESP32S3_SPI3
+void esp32s3_spi3_select(struct spi_dev_s *dev, uint32_t devid,
+                         bool selected);
+uint8_t esp32s3_spi3_status(struct spi_dev_s *dev, uint32_t devid);
+int esp32s3_spi3_cmddata(struct spi_dev_s *dev,
+                         uint32_t devid,
+                         bool cmd);
+#endif
+
+/****************************************************************************
+ * Name: esp32s3_spibus_uninitialize
+ *
+ * Description:
+ *   Uninitialize an SPI bus.
+ *
+ * Input Parameters:
+ *   dev      - Device-specific state data
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success.  Otherwise -1 (ERROR).
+ *
+ ****************************************************************************/
+
+int esp32s3_spibus_uninitialize(struct spi_dev_s *dev);
+
+#endif /* CONFIG_ESP32S3_SPI */
+
+#ifdef __cplusplus
+}
+#endif
+#undef EXTERN
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_SPI_H */

arch/xtensa/src/esp32s3/hardware/esp32s3_pinmap.h

@@ -48,4 +48,17 @@
 #define UART1_IOMUX_RTSPIN      (19)
 #define UART1_IOMUX_CTSPIN      (20)
 
+/* SPI2 */
+
+#define SPI2_IOMUX_MISOPIN      (13)
+#define SPI2_IOMUX_MOSIPIN      (11)
+#define SPI2_IOMUX_CLKPIN       (12)
+#define SPI2_IOMUX_CSPIN        (10)
+#define SPI2_IOMUX_WPPIN        (14)
+#define SPI2_IOMUX_HDPIN        (9)
+
+/* SPI3 */
+
+/* SPI3 have no iomux pins */
+
 #endif /* __ARCH_XTENSA_SRC_ESP32S3_HARDWARE_ESP32S3_PINMAP_H */

arch/xtensa/src/esp32s3/hardware/esp32s3_soc.h

@@ -95,6 +95,8 @@
 #define DR_REG_I2C1_EXT_BASE                    0x60027000
 #define DR_REG_SDMMC_BASE                       0x60028000
 
+#define REG_SPI_BASE(i)                         (DR_REG_SPI2_BASE + (((i) > 3) ? ((((i) - 2) * 0x1000) + 0x10000) : (((i) - 2) * 0x1000)))
+
 #define DR_REG_PERI_BACKUP_BASE                 0x6002A000
 
 #define DR_REG_TWAI_BASE                        0x6002B000

boards/xtensa/esp32s3/esp32s3-devkit/src/Make.defs

@@ -37,6 +37,10 @@ ifeq ($(CONFIG_ARCH_BUTTONS),y)
 CSRCS += esp32s3_buttons.c
 endif
 
+ifeq ($(CONFIG_ESP32S3_SPI),y)
+CSRCS += esp32s3_board_spi.c
+endif
+
 SCRIPTIN = $(SCRIPTDIR)$(DELIM)esp32s3.template.ld
 SCRIPTOUT = $(SCRIPTDIR)$(DELIM)esp32s3_out.ld
 

boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3_board_spi.c

@@ -0,0 +1,125 @@
+/****************************************************************************
+ * boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3_board_spi.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+
+#include <nuttx/spi/spi.h>
+
+#include "esp32s3_gpio.h"
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32s3_spi2_status
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32S3_SPI2
+
+uint8_t esp32s3_spi2_status(struct spi_dev_s *dev, uint32_t devid)
+{
+  uint8_t status = 0;
+
+  return status;
+}
+
+#endif
+
+/****************************************************************************
+ * Name: esp32s3_spi2_cmddata
+ ****************************************************************************/
+
+#if defined(CONFIG_ESP32S3_SPI2) && defined(CONFIG_SPI_CMDDATA)
+
+int esp32s3_spi2_cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd)
+{
+  if (devid == SPIDEV_DISPLAY(0))
+    {
+      /*  This is the Data/Command control pad which determines whether the
+       *  data bits are data or a command.
+       */
+
+      esp32s3_gpiowrite(CONFIG_ESP32S3_SPI2_MISOPIN, !cmd);
+
+      return OK;
+    }
+
+  spiinfo("devid: %" PRIu32 " CMD: %s\n", devid, cmd ? "command" :
+          "data");
+
+  return -ENODEV;
+}
+
+#endif
+
+/****************************************************************************
+ * Name: esp32s3_spi3_status
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32S3_SPI3
+
+uint8_t esp32s3_spi3_status(struct spi_dev_s *dev, uint32_t devid)
+{
+  uint8_t status = 0;
+
+  return status;
+}
+
+#endif
+
+/****************************************************************************
+ * Name: esp32s3_spi3_cmddata
+ ****************************************************************************/
+
+#if defined(CONFIG_ESP32S3_SPI3) && defined(CONFIG_SPI_CMDDATA)
+
+int esp32s3_spi3_cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd)
+{
+  if (devid == SPIDEV_DISPLAY(0))
+    {
+      /*  This is the Data/Command control pad which determines whether the
+       *  data bits are data or a command.
+       */
+
+      esp32s3_gpiowrite(CONFIG_ESP32S3_SPI3_MISOPIN, !cmd);
+
+      return OK;
+    }
+
+  spiinfo("devid: %" PRIu32 " CMD: %s\n", devid, cmd ? "command" :
+          "data");
+
+  return -ENODEV;
+}
+
+#endif