diff --git a/configs/sam4e-ek/README.txt b/configs/sam4e-ek/README.txt
index edde6027ca..65430455c5 100644
--- a/configs/sam4e-ek/README.txt
+++ b/configs/sam4e-ek/README.txt
@@ -16,6 +16,7 @@ Contents
   - NXFLAT Toolchain
   - Atmel Studio 6.1
   - Loading Code with J-Link
+  - Loading Code OpenOCD
   - Writing to FLASH using SAM-BA
   - LEDs
   - Serial Console
@@ -251,8 +252,8 @@ Atmel Studio 6.1
     STATUS: At this point, Atmel Studio 6.1 claims that my object files are
     not readable.  A little more needs to be done to wring out this procedure.
 
-Loading Code into SRAM with J-Link
-==================================
+Loading Code with J-Link
+========================
 
   Loading code with the Segger tools and GDB
   ------------------------------------------
@@ -282,6 +283,44 @@ Loading Code into SRAM with J-Link
   GPNVM1 settings and flash lock bits?  In any event, the GDB server works
   great for debugging after writing the program to FLASH using SAM-BA.
 
+Loading Code OpenOCD
+====================
+
+  OpenOCD scripts are available in the configs/sam4e-ek/tools directory.
+  These scripts were used with OpenOCD 0.8.0.  If you use a version after
+  OpenOCD 0.8.0, then you should comment out the following lines in the
+  openocd.cfg file:
+
+    # set CHIPNAME SAM4E16E
+    # source [find target/at91sam4sXX.cfg]
+
+  And uncomment this line:
+
+    source [find board/atmel_sam4e_ek.cfg]
+
+  This have been reported to work under Linux, but I have not been
+  successful using it under Windows OpenOCD 0.8.0 iwht libUSB.  I get
+
+    Open On-Chip Debugger 0.8.0 (2014-04-28-08:42)
+    ...
+    Error: libusb_open() failed with LIBUSB_ERROR_NOT_SUPPORTED
+    Error: Cannot find jlink Interface! Please check connection and permissions.
+    ...
+
+  This is telling me that the Segger J-Link USB driver is incompatible
+  with libUSB.  It may be necessary to replace the Segger J-Link driver
+  with the driver from libusb-win32-device-bin on sourceforge. 
+  
+    - Go into Control Panel/System/Device Manager and update the J-Link
+      driver to point at the new jlink.inf file made with the
+      libusb-win32/bin inf-wizard.   Browse to the unsigned driver
+      pointed to by the inf, libusb0.dll from the libusb-win32-device-bin
+      distribution to complete the installation.
+
+    - The Segger driver appeared under "Universal Serial Bus Controllers"
+      in Device Manager (winXP) while the libusb-win32 driver appears as
+      new top level Dev Mgr category "LibUSB-Win32 Devices".
+
 Writing to FLASH using SAM-BA
 =============================
 
diff --git a/configs/sam4e-ek/tools/gdb.ini b/configs/sam4e-ek/tools/gdb.ini
new file mode 100755
index 0000000000..374051facf
--- /dev/null
+++ b/configs/sam4e-ek/tools/gdb.ini
@@ -0,0 +1,7 @@
+target remote localhost:3333
+file nuttx
+b os_start
+mon at91sam4 gpnvm set 1
+load
+mon reset init
+continue
diff --git a/configs/sam4e-ek/tools/openocd.cfg b/configs/sam4e-ek/tools/openocd.cfg
new file mode 100755
index 0000000000..19d372eb59
--- /dev/null
+++ b/configs/sam4e-ek/tools/openocd.cfg
@@ -0,0 +1,64 @@
+# This is an SAM4E-EK board with a single SAM4E16 chip.
+# http://www.atmel.com/tools/sam4e-ek.aspx
+#
+# Tested with OpenOCD 0.8.0
+
+source [find interface/jlink.cfg]
+
+# chip name
+set CHIPNAME SAM4E16E
+
+# Versions of OpenOCD after have atmel_sam4e_ek.cfg
+# source [find board/atmel_sam4e_ek.cfg]
+source [find target/at91sam4sXX.cfg]
+
+# SAM4E chip has only NRST signal
+# SAM4E-EK board has only nSRST. nTRST is connected to +3V3 by pull-up.
+reset_config srst_only
+
+$_TARGETNAME configure -event gdb-attach {
+reset init
+}
+
+$_TARGETNAME configure -event reset-init {
+sam4e_pll_init
+}
+
+$_TARGETNAME configure -event reset-start {
+adapter_khz 500
+}
+
+$_TARGETNAME configure -event reset-end {
+adapter_khz 10000
+flash probe 0
+}
+
+proc sam4e_pll_init {} {
+# Same sequence from ASF/pmc.c
+
+mww 0x400E0A00 0x04000500 ;# FLASH 6 WS
+
+# Initialize main oscillator
+mww 0x400E0420 0x00373E09 ;# CKGR_MOR
+sleep 10
+
+# Switch to 3-20MHz Xtal oscillator
+mww 0x400E0420 0x01373E09 ;# CKGR_MOR
+sleep 10
+
+# Disable PLL first
+mww 0x400E0428 0x20000000 ;# CKGR_PLLAR
+sleep 10
+
+# PLLA 240 MHz
+mww 0x400E0428 0x20133F01 ;# CKGR_PLLAR
+sleep 10
+
+# PRES CLK_2, MAINCK -> MCK = 120 MHz
+mww 0x400E0430 0x00000011 ;# PMC_MCKR
+sleep 10
+
+# PRES CLK_2, PLLACK
+mww 0x400E0430 0x00000012 ;# PMC_MCKR
+sleep 10
+}