EFM32 DMA: Cosmetic changes to debug instrumentatin and comments
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@ -282,7 +282,7 @@ void weak_function up_dmainitialize(void)
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g_dmach[i].chan = i;
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}
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/* Enable clock to the DMA module. DMA is clocked by HFCORECLK. */
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/* Enable clocking to the DMA module. DMA is clocked by HFCORECLK. */
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regval = getreg32(EFM32_CMU_HFCORECLKEN0);
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regval |= CMU_HFCORECLKEN0_DMA;
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@ -383,17 +383,12 @@ DMA_HANDLE efm32_dmachannel(void)
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sem_post(&g_dmac.exclsem);
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/* Show the result of the allocation */
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if (dmach)
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{
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dmavdbg("Allocated DMA channel %d\n", dmach->chan);
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}
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else
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{
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dmadbg("ERROR: Failed allocate DMA channel\n");
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}
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/* Since we have reserved a DMA descriptor by taking a count from chansem,
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* it would be a serious logic failure if we could not find a free channel
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* for our use.
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*/
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DEBUGASSERT(dmach);
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return (DMA_HANDLE)dmach;
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}
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@ -495,12 +490,12 @@ void efm32_rxdmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
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desc->dstend = (uint32_t *)(maddr + nbytes - xfersize);
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/* No source increment, destination increments according to transfer size.
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* No privileges. Arbitrate after each transfer.
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* No privileges. Arbitrate after each transfer. Default priority.
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*/
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regval = DMA_CTRL_SRC_INC_NONE | DMA_CTRL_DST_PROT_NON_PRIVILEGED |
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DMA_CTRL_SRC_PROT_NON_PRIVILEGED | DMA_CTRL_R_POWER_1 |
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(0 << _DMA_CTRL_NEXT_USEBURST_SHIFT) | _DMA_CTRL_CYCLE_CTRL_BASIC;
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DMA_CTRL_SRC_PROT_NON_PRIVILEGED | DMA_CTRL_R_POWER_1 |
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(0 << _DMA_CTRL_NEXT_USEBURST_SHIFT) | _DMA_CTRL_CYCLE_CTRL_BASIC;
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switch (shift)
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{
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@ -580,8 +575,8 @@ void efm32_txdmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
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desc->srcend = (uint32_t *)(maddr + nbytes - xfersize);
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desc->dstend = (uint32_t *)paddr;
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/* No source increment, destination increments according to transfer size.
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* No privileges. Arbitrate after each transfer.
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/* No destination increment, source increments according to transfer size.
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* No privileges. Arbitrate after each transfer. Default priority.
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*/
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regval = DMA_CTRL_DST_INC_NONE | DMA_CTRL_DST_PROT_NON_PRIVILEGED |
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