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Merge branch 'irqattach'

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This commit is contained in:
Gregory Nutt 2017-02-28 09:39:37 -06:00
commit d5580fe94d
500 changed files with 2431 additions and 4861 deletions
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103
arch/arm/src/a1x/a1x_serial.c
View File

@ -93,7 +93,6 @@ struct up_dev_s
uint32_t uartbase; /* Base address of UART registers */
uint32_t baud; /* Configured baud */
uint32_t ier; /* Saved IER value */
xcpt_t handler; /* UART interrupt handler */
uint8_t irq; /* IRQ associated with this UART */
uint8_t parity; /* 0=none, 1=odd, 2=even */
uint8_t bits; /* Number of bits (7 or 8) */
@ -108,31 +107,7 @@ static int up_setup(struct uart_dev_s *dev);
static void up_shutdown(struct uart_dev_s *dev);
static int up_attach(struct uart_dev_s *dev);
static void up_detach(struct uart_dev_s *dev);
static int uart_interrupt(struct uart_dev_s *dev);
#ifdef CONFIG_A1X_UART0
static int uart0_interrupt(int irq, void *context);
#endif
#ifdef CONFIG_A1X_UART1
static int uart1_interrupt(int irq, void *context);
#endif
#ifdef CONFIG_A1X_UART2
static int uart2_interrupt(int irq, void *context);
#endif
#ifdef CONFIG_A1X_UART3
static int uart3_interrupt(int irq, void *context);
#endif
#ifdef CONFIG_A1X_UART4
static int uart4_interrupt(int irq, void *context);
#endif
#ifdef CONFIG_A1X_UART5
static int uart5_interrupt(int irq, void *context);
#endif
#ifdef CONFIG_A1X_UART6
static int uart6_interrupt(int irq, void *context);
#endif
#ifdef CONFIG_A1X_UART7
static int uart7_interrupt(int irq, void *context);
#endif
static int uart_interrupt(int irq, void *context, void *arg);
static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
static int up_receive(struct uart_dev_s *dev, uint32_t *status);
static void up_rxint(struct uart_dev_s *dev, bool enable);
@ -214,7 +189,6 @@ static struct up_dev_s g_uart0priv =
{
.uartbase = A1X_UART0_VADDR,
.baud = CONFIG_UART0_BAUD,
.handler = uart0_interrupt,
.irq = A1X_IRQ_UART0,
.parity = CONFIG_UART0_PARITY,
.bits = CONFIG_UART0_BITS,
@ -245,7 +219,6 @@ static struct up_dev_s g_uart1priv =
{
.uartbase = A1X_UART1_VADDR,
.baud = CONFIG_UART1_BAUD,
.handler = uart1_interrupt,
.irq = A1X_IRQ_UART1,
.parity = CONFIG_UART1_PARITY,
.bits = CONFIG_UART1_BITS,
@ -276,7 +249,6 @@ static struct up_dev_s g_uart2priv =
{
.uartbase = A1X_UART2_VADDR,
.baud = CONFIG_UART2_BAUD,
.handler = uart2_interrupt,
.irq = A1X_IRQ_UART2,
.parity = CONFIG_UART2_PARITY,
.bits = CONFIG_UART2_BITS,
@ -307,7 +279,6 @@ static struct up_dev_s g_uart3priv =
{
.uartbase = A1X_UART3_VADDR,
.baud = CONFIG_UART3_BAUD,
.handler = uart3_interrupt,
.irq = A1X_IRQ_UART3,
.parity = CONFIG_UART3_PARITY,
.bits = CONFIG_UART3_BITS,
@ -338,7 +309,6 @@ static struct up_dev_s g_uart4priv =
{
.uartbase = A1X_UART4_VADDR,
.baud = CONFIG_UART4_BAUD,
.handler = uart4_interrupt,
.irq = A1X_IRQ_UART4,
.parity = CONFIG_UART4_PARITY,
.bits = CONFIG_UART4_BITS,
@ -369,7 +339,6 @@ static struct up_dev_s g_uart5priv =
{
.uartbase = A1X_UART5_VADDR,
.baud = CONFIG_UART5_BAUD,
.handler = uart5_interrupt,
.irq = A1X_IRQ_UART5,
.parity = CONFIG_UART5_PARITY,
.bits = CONFIG_UART5_BITS,
@ -400,7 +369,6 @@ static struct up_dev_s g_uart6priv =
{
.uartbase = A1X_UART6_VADDR,
.baud = CONFIG_UART6_BAUD,
.handler = uart6_interrupt,
.irq = A1X_IRQ_UART6,
.parity = CONFIG_UART6_PARITY,
.bits = CONFIG_UART6_BITS,
@ -431,7 +399,6 @@ static struct up_dev_s g_uart7priv =
{
.uartbase = A1X_UART7_VADDR,
.baud = CONFIG_UART7_BAUD,
.handler = uart7_interrupt,
.irq = A1X_IRQ_UART7,
.parity = CONFIG_UART7_PARITY,
.bits = CONFIG_UART7_BITS,
@ -1068,7 +1035,7 @@ static int up_attach(struct uart_dev_s *dev)
/* Attach and enable the IRQ */
ret = irq_attach(priv->irq, priv->handler);
ret = irq_attach(priv->irq, uart_interrupt, priv);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
@ -1110,12 +1077,14 @@ static void up_detach(struct uart_dev_s *dev)
*
****************************************************************************/
static int uart_interrupt(struct uart_dev_s *dev)
static int uart_interrupt(int irq, void *context, void *arg)
{
struct up_dev_s *priv;
uint32_t status;
int passes;
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
struct up_dev_s *priv = (struct up_dev_s *)arg;
uint32_t status;
int passes;
DEBUGASSERT(dev != NULL && dev->priv != NULL);
priv = (struct up_dev_s *)dev->priv;
/* Loop until there are no characters to be transferred or,
@ -1201,62 +1170,6 @@ static int uart_interrupt(struct uart_dev_s *dev)
return OK;
}
#ifdef CONFIG_A1X_UART0
static int uart0_interrupt(int irq, void *context)
{
return uart_interrupt(&g_uart0port);
}
#endif
#ifdef CONFIG_A1X_UART1
static int uart1_interrupt(int irq, void *context)
{
return uart_interrupt(&g_uart1port);
}
#endif
#ifdef CONFIG_A1X_UART2
static int uart2_interrupt(int irq, void *context)
{
return uart_interrupt(&g_uart2port);
}
#endif
#ifdef CONFIG_A1X_UART3
static int uart3_interrupt(int irq, void *context)
{
return uart_interrupt(&g_uart3port);
}
#endif
#ifdef CONFIG_A1X_UART4
static int uart4_interrupt(int irq, void *context)
{
return uart_interrupt(&g_uart4port);
}
#endif
#ifdef CONFIG_A1X_UART5
static int uart5_interrupt(int irq, void *context)
{
return uart_interrupt(&g_uart5port);
}
#endif
#ifdef CONFIG_A1X_UART6
static int uart6_interrupt(int irq, void *context)
{
return uart_interrupt(&g_uart6port);
}
#endif
#ifdef CONFIG_A1X_UART7
static int uart7_interrupt(int irq, void *context)
{
return uart_interrupt(&g_uart7port);
}
#endif
/****************************************************************************
* Name: up_ioctl
*

4
arch/arm/src/a1x/a1x_timerisr.c
View File

@ -82,7 +82,7 @@
*
****************************************************************************/
static int a1x_timerisr(int irq, uint32_t *regs)
static int a1x_timerisr(int irq, uint32_t *regs, void *arg)
{
/* Only a TIMER0 interrupt is expected here */
@ -138,7 +138,7 @@ void arm_timer_initialize(void)
/* Attach the timer interrupt vector */
(void)irq_attach(A1X_IRQ_TIMER0, (xcpt_t)a1x_timerisr);
(void)irq_attach(A1X_IRQ_TIMER0, (xcpt_t)a1x_timerisr, NULL);
/* Enable interrupts from the TIMER 0 port */

4
arch/arm/src/armv6-m/up_hardfault.c
View File

@ -75,7 +75,7 @@
*
****************************************************************************/
int up_hardfault(int irq, FAR void *context)
int up_hardfault(int irq, FAR void *context, FAR void *arg)
{
uint32_t *regs = (uint32_t *)context;
@ -115,7 +115,7 @@ int up_hardfault(int irq, FAR void *context)
if (insn == INSN_SVC0)
{
hfinfo("Forward SVCall\n");
return up_svcall(irq, context);
return up_svcall(irq, context, NULL);
}
}

2
arch/arm/src/armv6-m/up_svcall.c
View File

@ -130,7 +130,7 @@ static void dispatch_syscall(void)
*
****************************************************************************/
int up_svcall(int irq, FAR void *context)
int up_svcall(int irq, FAR void *context, FAR void *arg)
{
uint32_t *regs = (uint32_t *)context;
uint32_t cmd;

2
arch/arm/src/armv7-a/arm_cpupause.c
View File

@ -202,7 +202,7 @@ int up_cpu_paused(int cpu)
*
****************************************************************************/
int arm_pause_handler(int irq, FAR void *context)
int arm_pause_handler(int irq, FAR void *context, FAR void *arg)
{
int cpu = this_cpu();

2
arch/arm/src/armv7-a/arm_cpustart.c
View File

@ -103,7 +103,7 @@ static inline void arm_registerdump(FAR struct tcb_s *tcb)
*
****************************************************************************/
int arm_start_handler(int irq, FAR void *context)
int arm_start_handler(int irq, FAR void *context, FAR void *arg)
{
FAR struct tcb_s *tcb = this_task();

4
arch/arm/src/armv7-a/arm_gicv2.c
View File

@ -124,8 +124,8 @@ void arm_gic0_initialize(void)
#ifdef CONFIG_SMP
/* Attach SGI interrupt handlers. This attaches the handler for all CPUs. */
DEBUGVERIFY(irq_attach(GIC_IRQ_SGI1, arm_start_handler));
DEBUGVERIFY(irq_attach(GIC_IRQ_SGI2, arm_pause_handler));
DEBUGVERIFY(irq_attach(GIC_IRQ_SGI1, arm_start_handler, NULL));
DEBUGVERIFY(irq_attach(GIC_IRQ_SGI2, arm_pause_handler, NULL));
#endif
arm_gic_dump("Exit arm_gic0_initialize", true, 0);

4
arch/arm/src/armv7-a/gic.h
View File

@ -759,7 +759,7 @@ uint32_t *arm_decodeirq(uint32_t *regs);
****************************************************************************/
#ifdef CONFIG_SMP
int arm_start_handler(int irq, FAR void *context);
int arm_start_handler(int irq, FAR void *context, FAR void *arg);
#endif
/****************************************************************************
@ -783,7 +783,7 @@ int arm_start_handler(int irq, FAR void *context);
****************************************************************************/
#ifdef CONFIG_SMP
int arm_pause_handler(int irq, FAR void *context);
int arm_pause_handler(int irq, FAR void *context, FAR void *arg);
#endif
/****************************************************************************

4
arch/arm/src/armv7-m/up_hardfault.c
View File

@ -80,7 +80,7 @@
*
****************************************************************************/
int up_hardfault(int irq, FAR void *context)
int up_hardfault(int irq, FAR void *context, FAR void *arg)
{
#if defined(CONFIG_DEBUG_HARDFAULT) || !defined(CONFIG_ARMV7M_USEBASEPRI)
uint32_t *regs = (uint32_t *)context;
@ -124,7 +124,7 @@ int up_hardfault(int irq, FAR void *context)
if (insn == INSN_SVC0)
{
hfalert("Forward SVCall\n");
return up_svcall(irq, context);
return up_svcall(irq, context, arg);
}
}
#endif

2
arch/arm/src/armv7-m/up_memfault.c
View File

@ -77,7 +77,7 @@
*
****************************************************************************/
int up_memfault(int irq, FAR void *context)
int up_memfault(int irq, FAR void *context, FAR void *arg)
{
/* Dump some memory management fault info */

2
arch/arm/src/armv7-m/up_svcall.c
View File

@ -125,7 +125,7 @@ static void dispatch_syscall(void)
*
****************************************************************************/
int up_svcall(int irq, FAR void *context)
int up_svcall(int irq, FAR void *context, FAR void *arg)
{
uint32_t *regs = (uint32_t *)context;
uint32_t cmd;

6
arch/arm/src/c5471/c5471_ethernet.c
View File

@ -401,7 +401,7 @@ static void c5471_txstatus(struct c5471_driver_s *priv);
static void c5471_txdone(struct c5471_driver_s *priv);
static void c5471_interrupt_work(FAR void *arg);
static int c5471_interrupt(int irq, FAR void *context);
static int c5471_interrupt(int irq, FAR void *context, FAR void *arg);
/* Watchdog timer expirations */
@ -1634,7 +1634,7 @@ static void c5471_interrupt_work(FAR void *arg)
*
****************************************************************************/
static int c5471_interrupt(int irq, FAR void *context)
static int c5471_interrupt(int irq, FAR void *context, FAR void *arg)
{
#if CONFIG_C5471_NET_NINTERFACES == 1
register struct c5471_driver_s *priv = &g_c5471[0];
@ -2449,7 +2449,7 @@ void up_netinitialize(void)
{
/* Attach the IRQ to the driver */
if (irq_attach(C5471_IRQ_ETHER, c5471_interrupt))
if (irq_attach(C5471_IRQ_ETHER, c5471_interrupt, NULL))
{
/* We could not attach the ISR to the ISR */

21
arch/arm/src/c5471/c5471_serial.c
View File

@ -108,7 +108,7 @@ static int up_setup(struct uart_dev_s *dev);
static void up_shutdown(struct uart_dev_s *dev);
static int up_attach(struct uart_dev_s *dev);
static void up_detach(struct uart_dev_s *dev);
static int up_interrupt(int irq, void *context);
static int up_interrupt(int irq, void *context, void *arg);
static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
static int up_receive(struct uart_dev_s *dev, unsigned int *status);
static void up_rxint(struct uart_dev_s *dev, bool enable);
@ -491,7 +491,7 @@ static int up_attach(struct uart_dev_s *dev)
/* Attach and enable the IRQ */
ret = irq_attach(priv->irq, up_interrupt);
ret = irq_attach(priv->irq, up_interrupt, dev);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
@ -534,24 +534,13 @@ static void up_detach(struct uart_dev_s *dev)
*
****************************************************************************/
static int up_interrupt(int irq, void *context)
static int up_interrupt(int irq, void *context, void *arg)
{
struct uart_dev_s *dev = NULL;
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
struct up_dev_s *priv;
volatile uint32_t cause;
if (g_irdapriv.irq == irq)
{
dev = &g_irdaport;
}
else if (g_modempriv.irq == irq)
{
dev = &g_modemport;
}
else
{
PANIC();
}
DEBUGASSERT(dev != NULL && dev->priv != NULL);
priv = (struct up_dev_s *)dev->priv;
cause = up_inserial(priv, UART_ISR_OFFS) & 0x0000003f;

4
arch/arm/src/c5471/c5471_timerisr.c
View File

@ -82,7 +82,7 @@
*
****************************************************************************/
static int c5471_timerisr(int irq, uint32_t *regs)
static int c5471_timerisr(int irq, uint32_t *regs, FAR void *arg)
{
/* Process timer interrupt */
@ -118,6 +118,6 @@ void arm_timer_initialize(void)
/* Attach and enable the timer interrupt */
irq_attach(C5471_IRQ_SYSTIMER, (xcpt_t)c5471_timerisr);
irq_attach(C5471_IRQ_SYSTIMER, (xcpt_t)c5471_timerisr, NULL);
up_enable_irq(C5471_IRQ_SYSTIMER);
}

6
arch/arm/src/c5471/c5471_watchdog.c
View File

@ -95,7 +95,7 @@
static inline unsigned int wdt_prescaletoptv(unsigned int prescale);
static int wdt_setusec(uint32_t usec);
static int wdt_interrupt(int irq, void *context);
static int wdt_interrupt(int irq, void *context, FAR void *arg);
static int wdt_open(struct file *filep);
static int wdt_close(struct file *filep);
@ -232,7 +232,7 @@ static int wdt_setusec(uint32_t usec)
* Name: wdt_interrupt
****************************************************************************/
static int wdt_interrupt(int irq, void *context)
static int wdt_interrupt(int irq, void *context, FAR void *arg)
{
wdinfo("expired\n");
@ -382,7 +382,7 @@ int up_wdtinit(void)
/* Request the interrupt. */
ret = irq_attach(C5471_IRQ_WATCHDOG, wdt_interrupt);
ret = irq_attach(C5471_IRQ_WATCHDOG, wdt_interrupt, NULL);
if (ret)
{
unregister_driver("/dev/wdt");

6
arch/arm/src/common/up_internal.h
View File

@ -374,13 +374,13 @@ uint32_t *up_doirq(int irq, uint32_t *regs);
/* Exception Handlers */
int up_svcall(int irq, FAR void *context);
int up_hardfault(int irq, FAR void *context);
int up_svcall(int irq, FAR void *context, FAR void *arg);
int up_hardfault(int irq, FAR void *context, FAR void *arg);
# if defined(CONFIG_ARCH_CORTEXM3) || defined(CONFIG_ARCH_CORTEXM4) || \
defined(CONFIG_ARCH_CORTEXM7)
int up_memfault(int irq, FAR void *context);
int up_memfault(int irq, FAR void *context, FAR void *arg);
# endif /* CONFIG_ARCH_CORTEXM3,4,7 */

24
arch/arm/src/dm320/dm320_serial.c
View File

@ -1,8 +1,7 @@
/****************************************************************************
* arch/arm/src/dm320/dm320_serial.c
* arch/arm/src/chip/dm320_serial.c
*
* Copyright (C) 2007-2009, 2012-2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2007-2009, 2012-2013, 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -89,7 +88,7 @@ static int up_setup(struct uart_dev_s *dev);
static void up_shutdown(struct uart_dev_s *dev);
static int up_attach(struct uart_dev_s *dev);
static void up_detach(struct uart_dev_s *dev);
static int up_interrupt(int irq, void *context);
static int up_interrupt(int irq, void *context, void *arg);
static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
static int up_receive(struct uart_dev_s *dev, uint32_t *status);
static void up_rxint(struct uart_dev_s *dev, bool enable);
@ -430,7 +429,7 @@ static int up_attach(struct uart_dev_s *dev)
/* Attach and enable the IRQ */
ret = irq_attach(priv->irq, up_interrupt);
ret = irq_attach(priv->irq, up_interrupt, dev);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
@ -472,25 +471,14 @@ static void up_detach(struct uart_dev_s *dev)
*
****************************************************************************/
static int up_interrupt(int irq, void *context)
static int up_interrupt(int irq, void *context, void *arg)
{
struct uart_dev_s *dev = NULL;
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
struct up_dev_s *priv;
uint16_t status;
int passes = 0;
if (g_uart1priv.irq == irq)
{
dev = &g_uart1port;
}
else if (g_uart0priv.irq == irq)
{
dev = &g_uart0port;
}
else
{
PANIC();
}
DEBUGASSERT(dev != NULL && dev->priv != NULL);
priv = (struct up_dev_s *)dev->priv;
/* Loop until there are no characters to be transferred or,

4
arch/arm/src/dm320/dm320_timerisr.c
View File

@ -109,7 +109,7 @@
*
****************************************************************************/
static int dm320_timerisr(int irq, uint32_t *regs)
static int dm320_timerisr(int irq, uint32_t *regs, FAR void *arg)
{
/* Process timer interrupt */
@ -147,7 +147,7 @@ void arm_timer_initialize(void)
/* Attach and enable the timer interrupt */
irq_attach(DM320_IRQ_SYSTIMER, (xcpt_t)dm320_timerisr);
irq_attach(DM320_IRQ_SYSTIMER, (xcpt_t)dm320_timerisr, NULL);
up_enable_irq(DM320_IRQ_SYSTIMER);
}

12
arch/arm/src/dm320/dm320_usbdev.c
View File

@ -309,8 +309,8 @@ static void dm320_dispatchrequest(struct dm320_usbdev_s *priv,
const struct usb_ctrlreq_s *ctrl);
static inline void dm320_ep0setup(struct dm320_usbdev_s *priv);
static inline uint32_t dm320_highestpriinterrupt(int intstatus);
static int dm320_ctlrinterrupt(int irq, FAR void *context);
static int dm320_attachinterrupt(int irq, FAR void *context);
static int dm320_ctlrinterrupt(int irq, FAR void *context, FAR void *arg);
static int dm320_attachinterrupt(int irq, FAR void *context, FAR void *arg);
/* Initialization operations */
@ -1513,7 +1513,7 @@ static inline uint32_t dm320_highestpriinterrupt(int intstatus)
*
****************************************************************************/
static int dm320_ctlrinterrupt(int irq, FAR void *context)
static int dm320_ctlrinterrupt(int irq, FAR void *context, FAR void *arg)
{
struct dm320_usbdev_s *priv = &g_usbdev;
struct dm320_ep_s *privep ;
@ -1680,7 +1680,7 @@ static int dm320_ctlrinterrupt(int irq, FAR void *context)
*
****************************************************************************/
static int dm320_attachinterrupt(int irq, FAR void *context)
static int dm320_attachinterrupt(int irq, FAR void *context, FAR void *arg)
{
struct dm320_usbdev_s *priv = &g_usbdev;
uint16_t gio;
@ -2438,7 +2438,7 @@ void up_usbinitialize(void)
/* Attach host attach GIO interrupt */
if (irq_attach(IRQ_USBATTACH, dm320_attachinterrupt) != 0)
if (irq_attach(IRQ_USBATTACH, dm320_attachinterrupt, NULL) != 0)
{
usbtrace(TRACE_DEVERROR(DM320_TRACEERR_ATTACHIRQREG), 0);
goto errout;
@ -2448,7 +2448,7 @@ void up_usbinitialize(void)
* enabled when the driver is bound
*/
if (irq_attach(DM320_IRQ_USB1, dm320_ctlrinterrupt) != 0)
if (irq_attach(DM320_IRQ_USB1, dm320_ctlrinterrupt, NULL) != 0)
{
usbtrace(TRACE_DEVERROR(DM320_TRACEERR_COREIRQREG), 0);
goto errout;

6
arch/arm/src/efm32/efm32_adc.c
View File

@ -123,7 +123,7 @@ static void adc_hw_reset(struct efm32_dev_s *priv, bool reset);
/* ADC Interrupt Handler */
static int adc_interrupt(FAR struct adc_dev_s *dev);
static int adc_interrupt(int irq, FAR void * context, FAR struct adc_dev_s *dev);
/* ADC Driver Methods */
@ -1072,7 +1072,7 @@ static int adc_setup(FAR struct adc_dev_s *dev)
/* Attach the ADC interrupt */
ret = irq_attach(priv->irq, priv->isr);
ret = irq_attach(priv->irq, priv->isr, dev);
if (ret == OK)
{
/* Make sure that the ADC device is in the powered up, reset state */
@ -1180,7 +1180,7 @@ static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg)
*
****************************************************************************/
static int adc_interrupt(FAR struct adc_dev_s *dev)
static int adc_interrupt(int irq, FAR void * context, FAR struct adc_dev_s *dev)
{
FAR struct efm32_dev_s *priv = (FAR struct efm32_dev_s *)dev->ad_priv;
uint32_t adcsr;

4
arch/arm/src/efm32/efm32_dma.c
View File

@ -204,7 +204,7 @@ efm32_get_descriptor(struct dma_channel_s *dmach, bool alt)
*
****************************************************************************/
static int efm32_dmac_interrupt(int irq, void *context)
static int efm32_dmac_interrupt(int irq, void *context, FAR void *arg)
{
struct dma_channel_s *dmach;
unsigned int chndx;
@ -297,7 +297,7 @@ void weak_function up_dmainitialize(void)
/* Attach DMA interrupt vector */
(void)irq_attach(EFM32_IRQ_DMA, efm32_dmac_interrupt);
(void)irq_attach(EFM32_IRQ_DMA, efm32_dmac_interrupt, NULL);
/* Enable the DMA controller */

8
arch/arm/src/efm32/efm32_gpioirq.c
View File

@ -133,7 +133,7 @@ static int efm32_gpio_interrupt(uint32_t mask, void *context)
*
************************************************************************************/
static int efm32_even_interrupt(int irq, void *context)
static int efm32_even_interrupt(int irq, void *context, FAR void *arg)
{
return efm32_gpio_interrupt(0x00005555, context);
}
@ -146,7 +146,7 @@ static int efm32_even_interrupt(int irq, void *context)
*
************************************************************************************/
static int efm32_odd_interrupt(int irq, void *context)
static int efm32_odd_interrupt(int irq, void *context, FAR void *arg)
{
return efm32_gpio_interrupt(0x0000aaaa, context);
}
@ -173,8 +173,8 @@ void efm32_gpioirqinitialize(void)
/* Attach the even and odd interrupt handlers */
DEBUGVERIFY(irq_attach(EFM32_IRQ_GPIO_EVEN, efm32_even_interrupt));
DEBUGVERIFY(irq_attach(EFM32_IRQ_GPIO_ODD, efm32_odd_interrupt));
DEBUGVERIFY(irq_attach(EFM32_IRQ_GPIO_EVEN, efm32_even_interrupt, NULL));
DEBUGVERIFY(irq_attach(EFM32_IRQ_GPIO_ODD, efm32_odd_interrupt, NULL));
/* Enable GPIO even and odd interrupts at the NVIC */

12
arch/arm/src/efm32/efm32_i2c.c
View File

@ -220,7 +220,7 @@ struct efm32_i2c_config_s
uint32_t scl_pin; /* GPIO configuration for SCL as SCL */
uint32_t sda_pin; /* GPIO configuration for SDA as SDA */
#ifndef CONFIG_I2C_POLLED
int (*isr) (int, void *); /* Interrupt handler */
int (*isr) (int, void *, void *); /* Interrupt handler */
uint32_t irq; /* Event IRQ */
#endif
};
@ -298,10 +298,10 @@ static int efm32_i2c_isr(struct efm32_i2c_priv_s *priv);
#ifndef CONFIG_I2C_POLLED
#ifdef CONFIG_EFM32_I2C0
static int efm32_i2c0_isr(int irq, void *context);
static int efm32_i2c0_isr(int irq, void *context, FAR void *arg);
#endif
#ifdef CONFIG_EFM32_I2C1
static int efm32_i2c1_isr(int irq, void *context);
static int efm32_i2c1_isr(int irq, void *context, FAR void *arg);
#endif
#endif /* !CONFIG_I2C_POLLED */
@ -1290,7 +1290,7 @@ done:
****************************************************************************/
#ifdef CONFIG_EFM32_I2C0
static int efm32_i2c0_isr(int irq, void *context)
static int efm32_i2c0_isr(int irq, void *context, FAR void *arg)
{
return efm32_i2c_isr(&efm32_i2c0_priv);
}
@ -1305,7 +1305,7 @@ static int efm32_i2c0_isr(int irq, void *context)
****************************************************************************/
#ifdef CONFIG_EFM32_I2C1
static int efm32_i2c1_isr(int irq, void *context)
static int efm32_i2c1_isr(int irq, void *context, FAR void *arg)
{
return efm32_i2c_isr(&efm32_i2c1_priv);
}
@ -1389,7 +1389,7 @@ static int efm32_i2c_init(FAR struct efm32_i2c_priv_s *priv)
/* Attach ISRs */
#ifndef CONFIG_I2C_POLLED
irq_attach(priv->config->irq, priv->config->isr);
irq_attach(priv->config->irq, priv->config->isr, NULL);
up_enable_irq(priv->config->irq);
#endif

32
arch/arm/src/efm32/efm32_irq.c
View File

@ -163,7 +163,7 @@ static void efm32_dumpnvic(const char *msg, int irq)
****************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
static int efm32_nmi(int irq, FAR void *context)
static int efm32_nmi(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! NMI received\n");
@ -171,7 +171,7 @@ static int efm32_nmi(int irq, FAR void *context)
return 0;
}
static int efm32_busfault(int irq, FAR void *context)
static int efm32_busfault(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
@ -179,7 +179,7 @@ static int efm32_busfault(int irq, FAR void *context)
return 0;
}
static int efm32_usagefault(int irq, FAR void *context)
static int efm32_usagefault(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
@ -187,7 +187,7 @@ static int efm32_usagefault(int irq, FAR void *context)
return 0;
}
static int efm32_pendsv(int irq, FAR void *context)
static int efm32_pendsv(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! PendSV received\n");
@ -195,7 +195,7 @@ static int efm32_pendsv(int irq, FAR void *context)
return 0;
}
static int efm32_dbgmonitor(int irq, FAR void *context)
static int efm32_dbgmonitor(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! Debug Monitor received\n");
@ -203,7 +203,7 @@ static int efm32_dbgmonitor(int irq, FAR void *context)
return 0;
}
static int efm32_reserved(int irq, FAR void *context)
static int efm32_reserved(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! Reserved interrupt\n");
@ -382,8 +382,8 @@ void up_irqinitialize(void)
* under certain conditions.
*/
irq_attach(EFM32_IRQ_SVCALL, up_svcall);
irq_attach(EFM32_IRQ_HARDFAULT, up_hardfault);
irq_attach(EFM32_IRQ_SVCALL, up_svcall, NULL);
irq_attach(EFM32_IRQ_HARDFAULT, up_hardfault, NULL);
/* Set the priority of the SVCall interrupt */
@ -396,22 +396,22 @@ void up_irqinitialize(void)
*/
#ifdef CONFIG_ARM_MPU
irq_attach(EFM32_IRQ_MEMFAULT, up_memfault);
irq_attach(EFM32_IRQ_MEMFAULT, up_memfault, NULL);
up_enable_irq(EFM32_IRQ_MEMFAULT);
#endif
/* Attach all other processor exceptions (except reset and sys tick) */
#ifdef CONFIG_DEBUG_FEATURES
irq_attach(EFM32_IRQ_NMI, efm32_nmi);
irq_attach(EFM32_IRQ_NMI, efm32_nmi, NULL);
#ifndef CONFIG_ARM_MPU
irq_attach(EFM32_IRQ_MEMFAULT, up_memfault);
irq_attach(EFM32_IRQ_MEMFAULT, up_memfault, NULL);
#endif
irq_attach(EFM32_IRQ_BUSFAULT, efm32_busfault);
irq_attach(EFM32_IRQ_USAGEFAULT, efm32_usagefault);
irq_attach(EFM32_IRQ_PENDSV, efm32_pendsv);
irq_attach(EFM32_IRQ_DBGMONITOR, efm32_dbgmonitor);
irq_attach(EFM32_IRQ_RESERVED, efm32_reserved);
irq_attach(EFM32_IRQ_BUSFAULT, efm32_busfault, NULL);
irq_attach(EFM32_IRQ_USAGEFAULT, efm32_usagefault, NULL);
irq_attach(EFM32_IRQ_PENDSV, efm32_pendsv, NULL);
irq_attach(EFM32_IRQ_DBGMONITOR, efm32_dbgmonitor, NULL);
irq_attach(EFM32_IRQ_RESERVED, efm32_reserved, NULL);
#endif
efm32_dumpnvic("initial", NR_VECTORS);

35
arch/arm/src/efm32/efm32_leserial.c
View File

@ -134,7 +134,6 @@
struct efm32_config_s
{
uintptr_t uartbase; /* Base address of UART registers */
xcpt_t handler; /* Interrupt handler */
uint32_t baud; /* Configured baud */
uint8_t irq; /* IRQ associated with this LEUART (for enable) */
uint8_t parity; /* 0=none, 1=odd, 2=even */
@ -163,13 +162,7 @@ static int efm32_setup(struct uart_dev_s *dev);
static void efm32_shutdown(struct uart_dev_s *dev);
static int efm32_attach(struct uart_dev_s *dev);
static void efm32_detach(struct uart_dev_s *dev);
static int efm32_interrupt(struct uart_dev_s *dev);
#if defined(CONFIG_EFM32_LEUART0)
static int efm32_leuart0_interrupt(int irq, void *context);
#endif
#if defined(CONFIG_EFM32_LEUART1)
static int efm32_leuart1_interrupt(int irq, void *context);
#endif
static int efm32_interrupt(int irq, void *context, FAR void *arg);
static int efm32_ioctl(struct file *filep, int cmd, unsigned long arg);
static int efm32_receive(struct uart_dev_s *dev, uint32_t *status);
static void efm32_rxint(struct uart_dev_s *dev, bool enable);
@ -219,7 +212,6 @@ static char g_leuart1txbuffer[CONFIG_LEUART1_TXBUFSIZE];
static const struct efm32_config_s g_leuart0config =
{
.uartbase = EFM32_LEUART0_BASE,
.handler = efm32_leuart0_interrupt,
.baud = CONFIG_LEUART0_BAUD,
.irq = EFM32_IRQ_LEUART0,
.parity = CONFIG_LEUART0_PARITY,
@ -255,7 +247,6 @@ static struct uart_dev_s g_leuart0port =
static struct efm32_config_s g_leuart1config =
{
.uartbase = EFM32_LEUART1_BASE,
.handler = efm32_leuart1_interrupt,
.baud = CONFIG_LEUART1_BAUD,
.irq = EFM32_IRQ_LEUART1,
.parity = CONFIG_LEUART1_PARITY,
@ -429,7 +420,7 @@ static int efm32_attach(struct uart_dev_s *dev)
* disabled in the C2 register.
*/
ret = irq_attach(config->irq, config->handler);
ret = irq_attach(config->irq, efm32_interrupt, dev);
if (ret >= 0)
{
up_enable_irq(config->irq);
@ -471,12 +462,14 @@ static void efm32_detach(struct uart_dev_s *dev)
*
****************************************************************************/
static int efm32_interrupt(struct uart_dev_s *dev)
static int efm32_interrupt(int irq, void *context, FAR void *arg)
{
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
struct efm32_leuart_s *priv;
uint32_t intflags;
DEBUGASSERT(priv);
DEBUGASSERT(dev != NULL && dev->priv != NULL);
priv = (struct efm32_leuart_s *)dev->priv;
/* Read the interrupt flags register */
@ -534,20 +527,6 @@ static int efm32_interrupt(struct uart_dev_s *dev)
return OK;
}
#if defined(CONFIG_EFM32_LEUART0)
static int efm32_leuart0_interrupt(int irq, void *context)
{
return efm32_interrupt(&g_leuart0port);
}
#endif
#if defined(CONFIG_EFM32_LEUART1)
static int efm32_leuart1_interrupt(int irq, void *context)
{
return efm32_interrupt(&g_leuart1port);
}
#endif
/****************************************************************************
* Name: efm32_ioctl
*

98
arch/arm/src/efm32/efm32_pwm.c
View File

@ -133,19 +133,7 @@ static int pwm_timer(FAR struct efm32_pwmtimer_s *priv,
defined(CONFIG_EFM32_TIMER2_PWM) || \
defined(CONFIG_EFM32_TIMER3_PWM) \
)
static int pwm_interrupt(struct efm32_pwmtimer_s *priv);
#if defined(CONFIG_EFM32_TIMER0_PWM)
static int pwm_timer0_interrupt(int irq, void *context);
#endif
#if defined(CONFIG_EFM32_TIMER1_PWM)
static int pwm_timer1_interrupt(int irq, void *context);
#endif
#if defined(CONFIG_EFM32_TIMER2_PWM)
static int pwm_timer2_interrupt(int irq, void *context);
#endif
#if defined(CONFIG_EFM32_TIMER3_PWM)
static int pwm_timer3_interrupt(int irq, void *context);
#endif
static int pwm_interrupt(int irq, void *context, FAR void *arg);
static uint8_t pwm_pulsecount(uint32_t count);
#endif
@ -446,7 +434,7 @@ static int pwm_timer(FAR struct efm32_pwmtimer_s *priv,
* Handle timer interrupts.
*
* Input parameters:
* priv - A reference to the lower half PWM driver state structure
* Standard interrupt handler arguments.
*
* Returned Value:
* Zero on success; a negated errno value on failure
@ -459,12 +447,15 @@ static int pwm_timer(FAR struct efm32_pwmtimer_s *priv,
defined(CONFIG_EFM32_TIMER3_PWM) \
)
#warning "not yet implemented"
static int pwm_interrupt(struct efm32_pwmtimer_s *priv)
static int pwm_interrupt(int irq, void *context, FAR void *arg)
{
/* TODO pwm_interrupt */
#if 0
struct efm32_pwmtimer_s *priv = (struct efm32_pwmtimer_s *)arg;
uint32_t regval;
DEBUGASSERT(priv != NULL);
/* Verify that this is an update interrupt. Nothing else is expected. */
regval = pwm_getreg(priv, STM32_ATIM_SR_OFFSET);
@ -532,48 +523,6 @@ static int pwm_interrupt(struct efm32_pwmtimer_s *priv)
}
#endif
/****************************************************************************
* Name: pwm_timer1/3_interrupt
*
* Description:
* Handle timer 1..3 interrupts.
*
* Input parameters:
* Standard NuttX interrupt inputs
*
* Returned Value:
* Zero on success; a negated errno value on failure
*
****************************************************************************/
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_EFM32_TIMER0_PWM)
static int pwm_timer0_interrupt(int irq, void *context)
{
return pwm_interrupt(&g_pwm0dev);
}
#endif
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_EFM32_TIMER1_PWM)
static int pwm_timer1_interrupt(int irq, void *context)
{
return pwm_interrupt(&g_pwm1dev);
}
#endif
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_EFM32_TIMER2_PWM)
static int pwm_timer2_interrupt(int irq, void *context)
{
return pwm_interrupt(&g_pwm2dev);
}
#endif
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_EFM32_TIMER3_PWM)
static int pwm_timer3_interrupt(int irq, void *context)
{
return pwm_interrupt(&g_pwm3dev);
}
#endif
/****************************************************************************
* Name: pwm_pulsecount
*
@ -866,50 +815,22 @@ FAR struct pwm_lowerhalf_s *efm32_pwminitialize(int timer)
#ifdef CONFIG_EFM32_TIMER0_PWM
case 0:
lower = &g_pwm0dev;
/* Attach but disable the TIM1 update interrupt */
#ifdef CONFIG_PWM_PULSECOUNT
irq_attach(lower->irq, pwm_timer0_interrupt);
up_disable_irq(lower->irq);
#endif
break;
#endif
#ifdef CONFIG_EFM32_TIMER1_PWM
case 1:
lower = &g_pwm1dev;
/* Attach but disable the TIM1 update interrupt */
#ifdef CONFIG_PWM_PULSECOUNT
irq_attach(lower->irq, pwm_timer0_interrupt);
up_disable_irq(lower->irq);
#endif
break;
#endif
#ifdef CONFIG_EFM32_TIMER2_PWM
case 2:
lower = &g_pwm2dev;
/* Attach but disable the TIM1 update interrupt */
#ifdef CONFIG_PWM_PULSECOUNT
irq_attach(lower->irq, pwm_timer2_interrupt);
up_disable_irq(lower->irq);
#endif
break;
#endif
#ifdef CONFIG_EFM32_TIMER3_PWM
case 3:
lower = &g_pwm3dev;
/* Attach but disable the TIM1 update interrupt */
#ifdef CONFIG_PWM_PULSECOUNT
irq_attach(lower->irq, pwm_timer3_interrupt);
up_disable_irq(lower->irq);
#endif
break;
#endif
@ -918,6 +839,13 @@ FAR struct pwm_lowerhalf_s *efm32_pwminitialize(int timer)
return NULL;
}
/* Attach but disable the timer update interrupt */
#ifdef CONFIG_PWM_PULSECOUNT
irq_attach(lower->irq, pwm_interrupt, lower);
up_disable_irq(lower->irq);
#endif
return (FAR struct pwm_lowerhalf_s *)lower;
}

4
arch/arm/src/efm32/efm32_rtc_burtc.c
View File

@ -175,7 +175,7 @@ volatile bool g_rtc_enabled = false;
*
************************************************************************************/
static int efm32_rtc_burtc_interrupt(int irq, void *context)
static int efm32_rtc_burtc_interrupt(int irq, void *context, FAR void *arg)
{
uint32_t source = getreg32(EFM32_BURTC_IF);
@ -378,7 +378,7 @@ int up_rtc_initialize(void)
/* Configure RTC interrupt to catch overflow and alarm interrupts. */
irq_attach(EFM32_IRQ_BURTC, efm32_rtc_burtc_interrupt);
irq_attach(EFM32_IRQ_BURTC, efm32_rtc_burtc_interrupt, NULL);
up_enable_irq(EFM32_IRQ_BURTC);
g_rtc_enabled = true;

44
arch/arm/src/efm32/efm32_serial.c
View File

@ -259,35 +259,35 @@ static int efm32_attach(struct uart_dev_s *dev);
static void efm32_detach(struct uart_dev_s *dev);
static int efm32_rxinterrupt(struct uart_dev_s *dev);
#if defined(CONFIG_EFM32_USART0_ISUART)
static int efm32_usart0_rxinterrupt(int irq, void *context);
static int efm32_usart0_rxinterrupt(int irq, void *context, FAR void *arg);
#endif
#if defined(CONFIG_EFM32_USART1_ISUART)
static int efm32_usart1_rxinterrupt(int irq, void *context);
static int efm32_usart1_rxinterrupt(int irq, void *context, FAR void *arg);
#endif
#if defined(CONFIG_EFM32_USART2_ISUART)
static int efm32_usart2_rxinterrupt(int irq, void *context);
static int efm32_usart2_rxinterrupt(int irq, void *context, FAR void *arg);
#endif
#if defined(CONFIG_EFM32_UART0)
static int efm32_uart0_rxinterrupt(int irq, void *context);
static int efm32_uart0_rxinterrupt(int irq, void *context, FAR void *arg);
#endif
#if defined(CONFIG_EFM32_UART1)
static int efm32_uart1_rxinterrupt(int irq, void *context);
static int efm32_uart1_rxinterrupt(int irq, void *context, FAR void *arg);
#endif
static int efm32_txinterrupt(struct uart_dev_s *dev);
#if defined(CONFIG_EFM32_USART0_ISUART)
static int efm32_usart0_txinterrupt(int irq, void *context);
static int efm32_usart0_txinterrupt(int irq, void *context, FAR void *arg);
#endif
#if defined(CONFIG_EFM32_USART1_ISUART)
static int efm32_usart1_txinterrupt(int irq, void *context);
static int efm32_usart1_txinterrupt(int irq, void *context, FAR void *arg);
#endif
#if defined(CONFIG_EFM32_USART2_ISUART)
static int efm32_usart2_txinterrupt(int irq, void *context);
static int efm32_usart2_txinterrupt(int irq, void *context, FAR void *arg);
#endif
#if defined(CONFIG_EFM32_UART0)
static int efm32_uart0_txinterrupt(int irq, void *context);
static int efm32_uart0_txinterrupt(int irq, void *context, FAR void *arg);
#endif
#if defined(CONFIG_EFM32_UART1)
static int efm32_uart1_txinterrupt(int irq, void *context);
static int efm32_uart1_txinterrupt(int irq, void *context, FAR void *arg);
#endif
static int efm32_ioctl(struct file *filep, int cmd, unsigned long arg);
static int efm32_receive(struct uart_dev_s *dev, uint32_t *status);
@ -689,13 +689,13 @@ static int efm32_attach(struct uart_dev_s *dev)
* disabled in the C2 register.
*/
ret = irq_attach(config->rxirq, config->rxhandler);
ret = irq_attach(config->rxirq, config->rxhandler, NULL);
if (ret < 0)
{
return ret;
}
ret = irq_attach(config->txirq, config->txhandler);
ret = irq_attach(config->txirq, config->txhandler, NULL);
if (ret < 0)
{
irq_detach(config->rxirq);
@ -788,35 +788,35 @@ static int efm32_rxinterrupt(struct uart_dev_s *dev)
}
#if defined(CONFIG_EFM32_USART0_ISUART)
static int efm32_usart0_rxinterrupt(int irq, void *context)
static int efm32_usart0_rxinterrupt(int irq, void *context, FAR void *arg)
{
return efm32_rxinterrupt(&g_usart0port);
}
#endif
#if defined(CONFIG_EFM32_USART1_ISUART)
static int efm32_usart1_rxinterrupt(int irq, void *context)
static int efm32_usart1_rxinterrupt(int irq, void *context, FAR void *arg)
{
return efm32_rxinterrupt(&g_usart1port);
}
#endif
#if defined(CONFIG_EFM32_USART2_ISUART)
static int efm32_usart2_rxinterrupt(int irq, void *context)
static int efm32_usart2_rxinterrupt(int irq, void *context, FAR void *arg)
{
return efm32_rxinterrupt(&g_usart2port);
}
#endif
#if defined(CONFIG_EFM32_UART0)
static int efm32_uart0_rxinterrupt(int irq, void *context)
static int efm32_uart0_rxinterrupt(int irq, void *context, FAR void *arg)
{
return efm32_rxinterrupt(&g_uart0port);
}
#endif
#if defined(CONFIG_EFM32_UART1)
static int efm32_uart1_rxinterrupt(int irq, void *context)
static int efm32_uart1_rxinterrupt(int irq, void *context, FAR void *arg)
{
return efm32_rxinterrupt(&g_uart1port);
}
@ -871,35 +871,35 @@ static int efm32_txinterrupt(struct uart_dev_s *dev)
}
#if defined(CONFIG_EFM32_USART0_ISUART)
static int efm32_usart0_txinterrupt(int irq, void *context)
static int efm32_usart0_txinterrupt(int irq, void *context, FAR void *arg)
{
return efm32_txinterrupt(&g_usart0port);
}
#endif
#if defined(CONFIG_EFM32_USART1_ISUART)
static int efm32_usart1_txinterrupt(int irq, void *context)
static int efm32_usart1_txinterrupt(int irq, void *context, FAR void *arg)
{
return efm32_txinterrupt(&g_usart1port);
}
#endif
#if defined(CONFIG_EFM32_USART2_ISUART)
static int efm32_usart2_txinterrupt(int irq, void *context)
static int efm32_usart2_txinterrupt(int irq, void *context, FAR void *arg)
{
return efm32_txinterrupt(&g_usart2port);
}
#endif
#if defined(CONFIG_EFM32_UART0)
static int efm32_uart0_txinterrupt(int irq, void *context)
static int efm32_uart0_txinterrupt(int irq, void *context, FAR void *arg)
{
return efm32_txinterrupt(&g_uart0port);
}
#endif
#if defined(CONFIG_EFM32_UART1)
static int efm32_uart1_txinterrupt(int irq, void *context)
static int efm32_uart1_txinterrupt(int irq, void *context, FAR void *arg)
{
return efm32_txinterrupt(&g_uart1port);
}

4
arch/arm/src/efm32/efm32_timerisr.c
View File

@ -86,7 +86,7 @@
*
****************************************************************************/
static int efm32_timerisr(int irq, uint32_t *regs)
static int efm32_timerisr(int irq, uint32_t *regs, FAR void *arg)
{
/* Process timer interrupt */
@ -125,7 +125,7 @@ void arm_timer_initialize(void)
/* Attach the timer interrupt vector */
(void)irq_attach(EFM32_IRQ_SYSTICK, (xcpt_t)efm32_timerisr);
(void)irq_attach(EFM32_IRQ_SYSTICK, (xcpt_t)efm32_timerisr, NULL);
/* Enable SysTick interrupts */

6
arch/arm/src/efm32/efm32_usbdev.c
View File

@ -574,7 +574,7 @@ static inline void efm32_otginterrupt(FAR struct efm32_usbdev_s *priv);
/* First level interrupt processing */
static int efm32_usbinterrupt(int irq, FAR void *context);
static int efm32_usbinterrupt(int irq, FAR void *context, FAR void *arg);
/* Endpoint operations *********************************************************/
/* Global OUT NAK controls */
@ -3498,7 +3498,7 @@ static inline void efm32_otginterrupt(FAR struct efm32_usbdev_s *priv)
*
****************************************************************************/
static int efm32_usbinterrupt(int irq, FAR void *context)
static int efm32_usbinterrupt(int irq, FAR void *context, FAR void *arg)
{
/* At present, there is only a single OTG FS device support. Hence it is
* pre-allocated as g_otgfsdev. However, in most code, the private data
@ -5485,7 +5485,7 @@ void up_usbinitialize(void)
/* Attach the OTG FS interrupt handler */
ret = irq_attach(EFM32_IRQ_USB, efm32_usbinterrupt);
ret = irq_attach(EFM32_IRQ_USB, efm32_usbinterrupt, NULL);
if (ret < 0)
{
uerr("ERROR: irq_attach failed\n", ret);

6
arch/arm/src/efm32/efm32_usbhost.c
View File

@ -417,7 +417,7 @@ static inline void efm32_gint_ipxfrisr(FAR struct efm32_usbhost_s *priv);
/* First level, global interrupt handler */
static int efm32_gint_isr(int irq, FAR void *context);
static int efm32_gint_isr(int irq, FAR void *context, FAR void *arg);
/* Interrupt controls */
@ -3495,7 +3495,7 @@ static inline void efm32_gint_ipxfrisr(FAR struct efm32_usbhost_s *priv)
*
****************************************************************************/
static int efm32_gint_isr(int irq, FAR void *context)
static int efm32_gint_isr(int irq, FAR void *context, FAR void *arg)
{
/* At present, there is only support for a single OTG FS host. Hence it is
* pre-allocated as g_usbhost. However, in most code, the private data
@ -5374,7 +5374,7 @@ FAR struct usbhost_connection_s *efm32_usbhost_initialize(int controller)
/* Attach USB host controller interrupt handler */
if (irq_attach(EFM32_IRQ_USB, efm32_gint_isr) != 0)
if (irq_attach(EFM32_IRQ_USB, efm32_gint_isr, NULL) != 0)
{
usbhost_trace1(USBHOST_TRACE1_IRQATTACH, 0);
return NULL;

10
arch/arm/src/imx1/imx_serial.c
View File

@ -112,7 +112,7 @@ static void up_shutdown(struct uart_dev_s *dev);
static int up_attach(struct uart_dev_s *dev);
static void up_detach(struct uart_dev_s *dev);
static inline struct uart_dev_s *up_mapirq(int irq);
static int up_interrupt(int irq, void *context);
static int up_interrupt(int irq, void *context, FAR void *arg);
static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
static int up_receive(struct uart_dev_s *dev, uint32_t *status);
static void up_rxint(struct uart_dev_s *dev, bool enable);
@ -753,13 +753,13 @@ static int up_attach(struct uart_dev_s *dev)
/* Attach and enable the IRQ */
#if defined(CONFIG_ARCH_CHIP_IMX1) || defined(CONFIG_ARCH_CHIP_IMXL)
ret = irq_attach(priv->rxirq, up_interrupt);
ret = irq_attach(priv->rxirq, up_interrupt, NULL);
if (ret < 0)
{
return ret;
}
ret = irq_attach(priv->txirq, up_interrupt);
ret = irq_attach(priv->txirq, up_interrupt, NULL);
if (ret < 0)
{
irq_detach(priv->rxirq);
@ -772,7 +772,7 @@ static int up_attach(struct uart_dev_s *dev)
up_enable_irq(priv->txirq);
#else
ret = irq_attach(priv->irq, up_interrupt);
ret = irq_attach(priv->irq, up_interrupt, NULL);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
@ -877,7 +877,7 @@ static inline struct uart_dev_s *up_mapirq(int irq)
*
****************************************************************************/
static int up_interrupt(int irq, void *context)
static int up_interrupt(int irq, void *context, FAR void *arg)
{
struct uart_dev_s *dev;
struct up_dev_s *priv;

6
arch/arm/src/imx1/imx_spi.c
View File

@ -165,7 +165,7 @@ static int spi_transfer(struct imx_spidev_s *priv, const void *txbuffer,
#ifndef CONFIG_SPI_POLLWAIT
static inline struct imx_spidev_s *spi_mapirq(int irq);
static int spi_interrupt(int irq, void *context);
static int spi_interrupt(int irq, void *context, FAR void *arg, FAR void *arg);
#endif
/* SPI methods */
@ -653,7 +653,7 @@ static inline struct imx_spidev_s *spi_mapirq(int irq)
****************************************************************************/
#ifndef CONFIG_SPI_POLLWAIT
static int spi_interrupt(int irq, void *context)
static int spi_interrupt(int irq, void *context, FAR void *arg, FAR void *arg)
{
struct imx_spidev_s *priv = spi_mapirq(irq);
int ntxd;
@ -1168,7 +1168,7 @@ FAR struct spi_dev_s *imx_spibus_initialize(int port)
/* Attach the interrupt */
#ifndef CONFIG_SPI_POLLWAIT
irq_attach(priv->irq, (xcpt_t)spi_interrupt);
irq_attach(priv->irq, (xcpt_t)spi_interrupt, NULL);
#endif
/* Enable SPI */

4
arch/arm/src/imx1/imx_timerisr.c
View File

@ -64,7 +64,7 @@
*
****************************************************************************/
static int imx_timerisr(int irq, uint32_t *regs)
static int imx_timerisr(int irq, uint32_t *regs, FAR void *arg)
{
uint32_t tstat;
int ret = -EIO;
@ -150,7 +150,7 @@ void arm_timer_initialize(void)
/* Attach and enable the timer interrupt */
irq_attach(IMX_IRQ_SYSTIMER, (xcpt_t)imx_timerisr);
irq_attach(IMX_IRQ_SYSTIMER, (xcpt_t)imx_timerisr, NULL);
up_enable_irq(IMX_IRQ_SYSTIMER);
}

79
arch/arm/src/imx6/imx_ecspi.c
View File

@ -186,7 +186,6 @@ struct imx_spidev_s
uint8_t spindx; /* SPI index */
#ifndef CONFIG_SPI_POLLWAIT
uint8_t irq; /* SPI IRQ number */
xcpt_t handler; /* ECSPI interrupt handler */
#endif
/* Per SPI callouts to board-specific logic */
@ -223,22 +222,7 @@ static int spi_transfer(struct imx_spidev_s *priv, const void *txbuffer,
/* Interrupt handling */
#ifndef CONFIG_SPI_POLLWAIT
static int spi_interrupt(struct imx_spidev_s *priv);
#ifdef CONFIG_IMX6_ECSPI1
static int ecspi1_interrupt(int irq, void *context);
#endif
#ifdef CONFIG_IMX6_ECSPI2
static int ecspi2_interrupt(int irq, void *context);
#endif
#ifdef CONFIG_IMX6_ECSPI3
static int ecspi3_interrupt(int irq, void *context);
#endif
#ifdef CONFIG_IMX6_ECSPI4
static int ecspi4_interrupt(int irq, void *context);
#endif
#ifdef CONFIG_IMX6_ECSPI5
static int ecspi5_interrupt(int irq, void *context);
#endif
static int spi_interrupt(int irq, void *context, FAR void *arg);
#endif
/* SPI methods */
@ -307,7 +291,6 @@ static struct imx_spidev_s g_spidev[] =
.spindx = SPI1_NDX,
#ifndef CONFIG_SPI_POLLWAIT
.irq = IMX_IRQ_ECSPI1,
.handler = ecspi1_interrupt,
#endif
.select = imx_spi1select,
.status = imx_spi1status,
@ -324,7 +307,6 @@ static struct imx_spidev_s g_spidev[] =
.spindx = SPI2_NDX,
#ifndef CONFIG_SPI_POLLWAIT
.irq = IMX_IRQ_ECSPI2,
.handler = ecspi2_interrupt,
#endif
.select = imx_spi2select,
.status = imx_spi2status,
@ -341,7 +323,6 @@ static struct imx_spidev_s g_spidev[] =
.spindx = SPI3_NDX,
#ifndef CONFIG_SPI_POLLWAIT
.irq = IMX_IRQ_ECSPI3,
.handler = ecspi3_interrupt,
#endif
.select = imx_spi3select,
.status = imx_spi3status,
@ -358,7 +339,6 @@ static struct imx_spidev_s g_spidev[] =
.spindx = SPI4_NDX,
#ifndef CONFIG_SPI_POLLWAIT
.irq = IMX_IRQ_ECSPI4,
.handler = ecspi4_interrupt,
#endif
.select = imx_spi4select,
.status = imx_spi4status,
@ -375,7 +355,6 @@ static struct imx_spidev_s g_spidev[] =
.spindx = SPI5_NDX,
#ifndef CONFIG_SPI_POLLWAIT
.irq = IMX_IRQ_ECSPI5,
.handler = ecspi5_interrupt,
#endif
.select = imx_spi5select,
.status = imx_spi5status,
@ -759,8 +738,9 @@ static int spi_transfer(struct imx_spidev_s *priv, const void *txbuffer,
****************************************************************************/
#ifndef CONFIG_SPI_POLLWAIT
static int spi_interrupt(struct imx_spidev_s *priv)
static int spi_interrupt(int irq, void *context, FAR void *arg)
{
struct imx_spidev_s *priv = (struct imx_spidev_s *)arg;
int ntxd;
DEBUGASSERT(priv != NULL);
@ -790,57 +770,6 @@ static int spi_interrupt(struct imx_spidev_s *priv)
}
#endif
/****************************************************************************
* Name: ecspiN_interrupt, N=1..5
*
* Description:
* Individual ECPSI interrupt handlers.
*
* Input Parameters:
* Standard interrupt handler inputs
*
* Returned Value:
* 0: success, <0:Negated error number on failure
*
****************************************************************************/
#ifndef CONFIG_SPI_POLLWAIT
#ifdef CONFIG_IMX6_ECSPI1
static int ecspi1_interrupt(int irq, void *context)
{
return spi_interrupt(&g_spidev[SPI1_NDX]);
}
#endif
#ifdef CONFIG_IMX6_ECSPI2
static int ecspi2_interrupt(int irq, void *context)
{
return spi_interrupt(&g_spidev[SPI2_NDX]);
}
#endif
#ifdef CONFIG_IMX6_ECSPI3
static int ecspi3_interrupt(int irq, void *context)
{
return spi_interrupt(&g_spidev[SPI3_NDX]);
}
#endif
#ifdef CONFIG_IMX6_ECSPI4
static int ecspi4_interrupt(int irq, void *context)
{
return spi_interrupt(&g_spidev[SPI4_NDX]);
}
#endif
#ifdef CONFIG_IMX6_ECSPI5
static int ecspi5_interrupt(int irq, void *context)
{
return spi_interrupt(&g_spidev[SPI5_NDX]);
}
#endif
#endif
/****************************************************************************
* Name: spi_lock
*
@ -1425,7 +1354,7 @@ FAR struct spi_dev_s *imx_spibus_initialize(int port)
/* Attach the interrupt */
#ifndef CONFIG_SPI_POLLWAIT
DEBUGVERIFY(irq_attach(priv->irq, priv->handler));
DEBUGVERIFY(irq_attach(priv->irq, spi_interrupt, priv));
#endif
/* Enable SPI */

75
arch/arm/src/imx6/imx_serial.c
View File

@ -199,7 +199,6 @@
struct imx_uart_s
{
xcpt_t handler; /* Interrupt handler */
uint32_t uartbase; /* Base address of UART registers */
uint32_t baud; /* Configured baud */
uint32_t ucr1; /* Saved UCR1 value */
@ -229,24 +228,7 @@ static int imx_setup(struct uart_dev_s *dev);
static void imx_shutdown(struct uart_dev_s *dev);
static int imx_attach(struct uart_dev_s *dev);
static void imx_detach(struct uart_dev_s *dev);
static int imx_interrupt(struct uart_dev_s *dev);
#ifdef CONFIG_IMX6_UART1
static int imx_uart1_interrupt(int irq, void *context);
#endif
#ifdef CONFIG_IMX6_UART2
static int imx_uart2_interrupt(int irq, void *context);
#endif
#ifdef CONFIG_IMX6_UART3
static int imx_uart3_interrupt(int irq, void *context);
#endif
#ifdef CONFIG_IMX6_UART4
static int imx_uart4_interrupt(int irq, void *context);
#endif
#ifdef CONFIG_IMX6_UART5
static int imx_uart5_interrupt(int irq, void *context);
#endif
static int imx_interrupt(int irq, void *context, FAR void *arg);
static int imx_ioctl(struct file *filep, int cmd, unsigned long arg);
static int imx_receive(struct uart_dev_s *dev, uint32_t *status);
static void imx_rxint(struct uart_dev_s *dev, bool enable);
@ -317,7 +299,6 @@ static char g_uart5txbuffer[CONFIG_UART5_TXBUFSIZE];
#ifdef CONFIG_IMX6_UART1
static struct imx_uart_s g_uart1priv =
{
.handler = imx_uart1_interrupt,
.uartbase = IMX_UART1_VBASE,
.baud = CONFIG_UART1_BAUD,
.irq = IMX_IRQ_UART1,
@ -348,7 +329,6 @@ static struct uart_dev_s g_uart1port =
#ifdef CONFIG_IMX6_UART2
static struct imx_uart_s g_uart2priv =
{
.handler = imx_uart2_interrupt,
.uartbase = IMX_UART2_VBASE,
.baud = CONFIG_UART2_BAUD,
.irq = IMX_IRQ_UART2,
@ -377,7 +357,6 @@ static struct uart_dev_s g_uart2port =
#ifdef CONFIG_IMX6_UART3
static struct imx_uart_s g_uart3priv =
{
.handler = imx_uart3_interrupt,
.uartbase = IMX_UART3_REGISTER_BASE,
.baud = IMX_UART3_VBASE,
.irq = IMX_IRQ_UART3,
@ -406,7 +385,6 @@ static struct uart_dev_s g_uart3port =
#ifdef CONFIG_IMX6_UART4
static struct imx_uart_s g_uart4priv =
{
.handler = imx_uart4_interrupt,
.uartbase = IMX_UART4_REGISTER_BASE,
.baud = IMX_UART4_VBASE,
.irq = IMX_IRQ_UART4,
@ -435,7 +413,6 @@ static struct uart_dev_s g_uart4port =
#ifdef CONFIG_IMX6_UART5
static struct imx_uart_s g_uart5priv =
{
.handler = imx_uart5_interrupt,
.uartbase = IMX_UART5_REGISTER_BASE,
.baud = IMX_UART5_VBASE,
.irq = IMX_IRQ_UART5,
@ -618,7 +595,7 @@ static int imx_attach(struct uart_dev_s *dev)
/* Attach and enable the IRQ */
ret = irq_attach(priv->irq, priv->handler);
ret = irq_attach(priv->irq, imx_interrupt, priv);
if (ret == OK)
{
/* Configure as a (high) level interrupt */
@ -663,12 +640,16 @@ static void imx_detach(struct uart_dev_s *dev)
*
****************************************************************************/
static int imx_interrupt(struct uart_dev_s *dev)
static int imx_interrupt(int irq, void *context, FAR void *arg)
{
struct imx_uart_s *priv = (struct imx_uart_s *)dev->priv;
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
struct imx_uart_s *priv;
uint32_t usr1;
int passes = 0;
DEBUGASSERT(dev != NULL && dev->priv != NULL);
priv = (struct imx_uart_s *)dev->priv;
/* Loop until there are no characters to be transferred or,
* until we have been looping for a long time.
*/
@ -710,46 +691,6 @@ static int imx_interrupt(struct uart_dev_s *dev)
}
}
/****************************************************************************
* Name: imx_uart[n]_interrupt
*
* Description:
* UART-specific interrupt handlers just transfer control to the common
* UART interrupt handler, passing the relevant driver state structure.
*
****************************************************************************/
#ifdef CONFIG_IMX6_UART1
static int imx_uart1_interrupt(int irq, void *context)
{
return imx_interrupt(&g_uart1port);
}
#endif
#ifdef CONFIG_IMX6_UART2
static int imx_uart2_interrupt(int irq, void *context)
{
return imx_interrupt(&g_uart2port);
}
#endif
#ifdef CONFIG_IMX6_UART3
static int imx_uart3_interrupt(int irq, void *context)
{
return imx_interrupt(&g_uart3port);
}
#endif
#ifdef CONFIG_IMX6_UART4
static int imx_uart4_interrupt(int irq, void *context)
{
return imx_interrupt(&g_uart4port);
}
#endif
#ifdef CONFIG_IMX6_UART5
static int imx_uart5_interrupt(int irq, void *context)
{
return imx_interrupt(&g_uart5port);
}
#endif
/****************************************************************************
* Name: imx_ioctl
*

4
arch/arm/src/imx6/imx_timerisr.c
View File

@ -130,7 +130,7 @@ static void imx_output_compare(uint32_t sr, uint32_t of)
*
****************************************************************************/
static int imx_timerisr(int irq, uint32_t *regs)
static int imx_timerisr(int irq, uint32_t *regs, FAR void *arg)
{
/* Sample the SR (once) */
@ -260,7 +260,7 @@ void arm_timer_initialize(void)
/* Attach the timer interrupt vector */
(void)irq_attach(IMX_IRQ_GPT, (xcpt_t)imx_timerisr);
(void)irq_attach(IMX_IRQ_GPT, (xcpt_t)imx_timerisr, NULL);
/* Enable all three GPT output compare interrupts */

10
arch/arm/src/kinetis/kinetis.h
View File

@ -567,9 +567,11 @@ void kinetis_pinirqinitialize(void);
* 2. Call kinetis_pinirqattach() to attach the pin interrupt handling function.
* 3. Call kinetis_pinirqenable() to enable interrupts on the pin.
*
* Input Parameters:
* pinset - Pin configuration
* pinisr - Pin interrupt service routine
* Parameters:
* pinset - Pin configuration
* pinisr -:wq
:wq: Pin interrupt service routine
* arg:r - And argument that will be provided to the interrupt service routine.
*
* Return Value:
* The previous value of the interrupt handler function pointer. This value may,
@ -578,7 +580,7 @@ void kinetis_pinirqinitialize(void);
*
************************************************************************************/
xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr);
xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr, void *arg);
/************************************************************************************
* Name: kinetis_pinirqenable

12
arch/arm/src/kinetis/kinetis_enet.c
View File

@ -284,7 +284,7 @@ static void kinetis_receive(FAR struct kinetis_driver_s *priv);
static void kinetis_txdone(FAR struct kinetis_driver_s *priv);
static void kinetis_interrupt_work(FAR void *arg);
static int kinetis_interrupt(int irq, FAR void *context);
static int kinetis_interrupt(int irq, FAR void *context, FAR void *arg);
/* Watchdog timer expirations */
@ -921,7 +921,7 @@ static void kinetis_interrupt_work(FAR void *arg)
*
****************************************************************************/
static int kinetis_interrupt(int irq, FAR void *context)
static int kinetis_interrupt(int irq, FAR void *context, FAR void *arg)
{
register FAR struct kinetis_driver_s *priv = &g_enet[0];
@ -2097,7 +2097,7 @@ int kinetis_netinitialize(int intf)
/* Attach the Ethernet MAC IEEE 1588 timer interrupt handler */
#if 0
if (irq_attach(KINETIS_IRQ_EMACTMR, kinetis_tmrinterrupt))
if (irq_attach(KINETIS_IRQ_EMACTMR, kinetis_tmrinterrupt, NULL))
{
/* We could not attach the ISR to the interrupt */
@ -2108,7 +2108,7 @@ int kinetis_netinitialize(int intf)
/* Attach the Ethernet MAC transmit interrupt handler */
if (irq_attach(KINETIS_IRQ_EMACTX, kinetis_interrupt))
if (irq_attach(KINETIS_IRQ_EMACTX, kinetis_interrupt, NULL))
{
/* We could not attach the ISR to the interrupt */
@ -2118,7 +2118,7 @@ int kinetis_netinitialize(int intf)
/* Attach the Ethernet MAC receive interrupt handler */
if (irq_attach(KINETIS_IRQ_EMACRX, kinetis_interrupt))
if (irq_attach(KINETIS_IRQ_EMACRX, kinetis_interrupt, NULL))
{
/* We could not attach the ISR to the interrupt */
@ -2128,7 +2128,7 @@ int kinetis_netinitialize(int intf)
/* Attach the Ethernet MAC error and misc interrupt handler */
if (irq_attach(KINETIS_IRQ_EMACMISC, kinetis_interrupt))
if (irq_attach(KINETIS_IRQ_EMACMISC, kinetis_interrupt, NULL))
{
/* We could not attach the ISR to the interrupt */

59
arch/arm/src/kinetis/kinetis_i2c.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/kinetis/kinetis_i2c.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
* Author: Matias v01d <phreakuencies@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
@ -129,16 +129,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv,
uint32_t frequency);
static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv);
static void kinetis_i2c_stop(struct kinetis_i2cdev_s *priv);
static int kinetis_i2c_interrupt(struct kinetis_i2cdev_s *priv);
#ifdef CONFIG_KINETIS_I2C0
static int kinetis_i2c0_interrupt(int irq, void *context);
#endif
#ifdef CONFIG_KINETIS_I2C1
static int kinetis_i2c1_interrupt(int irq, void *context);
#endif
#ifdef CONFIG_KINETIS_I2C2
static int kinetis_i2c2_interrupt(int irq, void *context);
#endif
static int kinetis_i2c_interrupt(int irq, void *context, void *arg);
static void kinetis_i2c_timeout(int argc, uint32_t arg, ...);
static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv,
uint32_t frequency);
@ -638,14 +629,17 @@ void kinetis_i2c_nextmsg(struct kinetis_i2cdev_s *priv)
*
****************************************************************************/
static int kinetis_i2c_interrupt(struct kinetis_i2cdev_s *priv)
static int kinetis_i2c_interrupt(int irq, void *context, void *arg)
{
struct kinetis_i2cdev_s *priv = (struct kinetis_i2cdev_s *)arg;
struct i2c_msg_s *msg;
uint32_t state;
int regval;
int dummy;
UNUSED(dummy);
DEBUGASSERT(priv != NULL);
/* Get current state */
state = kinetis_i2c_getreg(priv, KINETIS_I2C_S_OFFSET);
@ -811,38 +805,6 @@ static int kinetis_i2c_interrupt(struct kinetis_i2cdev_s *priv)
return OK;
}
/****************************************************************************
* Name: kinetis_i2cN_interrupt
*
* Description:
* The I2CN interrupt handlers
*
****************************************************************************/
#ifdef CONFIG_KINETIS_I2C0
static int kinetis_i2c0_interrupt(int irq, void *context)
{
i2cinfo("I2C0 Interrupt...\n");
return kinetis_i2c_interrupt(&g_i2c0_dev);
}
#endif
#ifdef CONFIG_KINETIS_I2C1
static int kinetis_i2c1_interrupt(int irq, void *context)
{
i2cinfo("I2C1 Interrupt...\n");
return kinetis_i2c_interrupt(&g_i2c1_dev);
}
#endif
#ifdef CONFIG_KINETIS_I2C2
static int kinetis_i2c2_interrupt(int irq, void *context)
{
i2cinfo("I2C2 Interrupt...\n");
return kinetis_i2c_interrupt(&g_i2c2_dev);
}
#endif
/****************************************************************************
* Name: kinetis_i2c_transfer
*
@ -988,7 +950,6 @@ static int kinetis_i2c_reset(struct i2c_master_s *dev)
struct i2c_master_s *kinetis_i2cbus_initialize(int port)
{
struct kinetis_i2cdev_s *priv;
xcpt_t handler;
i2cinfo("port=%d\n", port);
@ -1011,8 +972,6 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port)
priv->irqid = KINETIS_IRQ_I2C0;
priv->basefreq = BOARD_BUS_FREQ;
handler = kinetis_i2c0_interrupt;
/* Enable clock */
regval = getreg32(KINETIS_SIM_SCGC4);
@ -1038,8 +997,6 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port)
priv->irqid = KINETIS_IRQ_I2C1;
priv->basefreq = BOARD_BUS_FREQ;
handler = kinetis_i2c1_interrupt;
/* Enable clock */
regval = getreg32(KINETIS_SIM_SCGC4);
@ -1065,8 +1022,6 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port)
priv->irqid = KINETIS_IRQ_I2C2;
priv->basefreq = BOARD_BUS_FREQ;
handler = kinetis_i2c2_interrupt;
/* Enable clock */
regval = getreg32(KINETIS_SIM_SCGC4);
@ -1124,7 +1079,7 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port)
/* Attach Interrupt Handler */
irq_attach(priv->irqid, handler);
irq_attach(priv->irqid, kinetis_i2c_interrupt, priv);
/* Enable Interrupt Handler */

32
arch/arm/src/kinetis/kinetis_irq.c
View File

@ -170,7 +170,7 @@ static void kinetis_dumpnvic(const char *msg, int irq)
****************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
static int kinetis_nmi(int irq, FAR void *context)
static int kinetis_nmi(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! NMI received\n");
@ -178,7 +178,7 @@ static int kinetis_nmi(int irq, FAR void *context)
return 0;
}
static int kinetis_busfault(int irq, FAR void *context)
static int kinetis_busfault(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! Bus fault recived\n");
@ -186,7 +186,7 @@ static int kinetis_busfault(int irq, FAR void *context)
return 0;
}
static int kinetis_usagefault(int irq, FAR void *context)
static int kinetis_usagefault(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! Usage fault received\n");
@ -194,7 +194,7 @@ static int kinetis_usagefault(int irq, FAR void *context)
return 0;
}
static int kinetis_pendsv(int irq, FAR void *context)
static int kinetis_pendsv(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! PendSV received\n");
@ -202,7 +202,7 @@ static int kinetis_pendsv(int irq, FAR void *context)
return 0;
}
static int kinetis_dbgmonitor(int irq, FAR void *context)
static int kinetis_dbgmonitor(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! Debug Monitor received\n");
@ -210,7 +210,7 @@ static int kinetis_dbgmonitor(int irq, FAR void *context)
return 0;
}
static int kinetis_reserved(int irq, FAR void *context)
static int kinetis_reserved(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! Reserved interrupt\n");
@ -398,8 +398,8 @@ void up_irqinitialize(void)
* under certain conditions.
*/
irq_attach(KINETIS_IRQ_SVCALL, up_svcall);
irq_attach(KINETIS_IRQ_HARDFAULT, up_hardfault);
irq_attach(KINETIS_IRQ_SVCALL, up_svcall, NULL);
irq_attach(KINETIS_IRQ_HARDFAULT, up_hardfault, NULL);
/* Set the priority of the SVCall interrupt */
@ -415,22 +415,22 @@ void up_irqinitialize(void)
*/
#ifdef CONFIG_ARM_MPU
irq_attach(KINETIS_IRQ_MEMFAULT, up_memfault);
irq_attach(KINETIS_IRQ_MEMFAULT, up_memfault, NULL);
up_enable_irq(KINETIS_IRQ_MEMFAULT);
#endif
/* Attach all other processor exceptions (except reset and sys tick) */
#ifdef CONFIG_DEBUG_FEATURES
irq_attach(KINETIS_IRQ_NMI, kinetis_nmi);
irq_attach(KINETIS_IRQ_NMI, kinetis_nmi, NULL);
#ifndef CONFIG_ARM_MPU
irq_attach(KINETIS_IRQ_MEMFAULT, up_memfault);
irq_attach(KINETIS_IRQ_MEMFAULT, up_memfault, NULL);
#endif
irq_attach(KINETIS_IRQ_BUSFAULT, kinetis_busfault);
irq_attach(KINETIS_IRQ_USAGEFAULT, kinetis_usagefault);
irq_attach(KINETIS_IRQ_PENDSV, kinetis_pendsv);
irq_attach(KINETIS_IRQ_DBGMONITOR, kinetis_dbgmonitor);
irq_attach(KINETIS_IRQ_RESERVED, kinetis_reserved);
irq_attach(KINETIS_IRQ_BUSFAULT, kinetis_busfault, NULL);
irq_attach(KINETIS_IRQ_USAGEFAULT, kinetis_usagefault, NULL);
irq_attach(KINETIS_IRQ_PENDSV, kinetis_pendsv, NULL);
irq_attach(KINETIS_IRQ_DBGMONITOR, kinetis_dbgmonitor, NULL);
irq_attach(KINETIS_IRQ_RESERVED, kinetis_reserved, NULL);
#endif
kinetis_dumpnvic("initial", NR_IRQS);

28
arch/arm/src/kinetis/kinetis_lpserial.c
View File

@ -163,7 +163,7 @@ static int kinetis_setup(struct uart_dev_s *dev);
static void kinetis_shutdown(struct uart_dev_s *dev);
static int kinetis_attach(struct uart_dev_s *dev);
static void kinetis_detach(struct uart_dev_s *dev);
static int kinetis_interrupt(int irq, void *context);
static int kinetis_interrupt(int irq, void *context, void *arg);
static int kinetis_ioctl(struct file *filep, int cmd, unsigned long arg);
static int kinetis_receive(struct uart_dev_s *dev, uint32_t *status);
static void kinetis_rxint(struct uart_dev_s *dev, bool enable);
@ -427,7 +427,7 @@ static int kinetis_attach(struct uart_dev_s *dev)
* disabled in the LPUART_CTRL register.
*/
ret = irq_attach(priv->irq, kinetis_interrupt);
ret = irq_attach(priv->irq, kinetis_interrupt, dev);
if (ret == OK)
{
up_enable_irq(priv->irq);
@ -472,33 +472,15 @@ static void kinetis_detach(struct uart_dev_s *dev)
*
****************************************************************************/
static int kinetis_interrupt(int irq, void *context)
static int kinetis_interrupt(int irq, void *context, void *arg)
{
struct uart_dev_s *dev = NULL;
struct uart_dev_s *dev = (struct uart_dev_s *dev)arg;
struct kinetis_dev_s *priv;
uint32_t stat;
uint32_t ctrl;
#ifdef CONFIG_KINETIS_LPUART0
if (g_lpuart0priv.irq == irq)
{
dev = &g_lpuart0port;
}
else
#endif
#ifdef CONFIG_KINETIS_LPUART1
if (g_lpuart1priv.irq == irq)
{
dev = &g_lpuart1port;
}
else
#endif
{
PANIC();
}
DEBUGASSERT(dev != NULL && dev->priv != NULL);
priv = (struct kinetis_dev_s *)dev->priv;
DEBUGASSERT(priv);
/* Read status register and qualify it with STAT bit corresponding CTRL IE bits */

58
arch/arm/src/kinetis/kinetis_pinirq.c
View File

@ -73,6 +73,12 @@
* Private Types
****************************************************************************/
struct kinetis_pinirq_s
{
xcpt_t handler;
void *arg;
};
/****************************************************************************
* Private Data
****************************************************************************/
@ -84,19 +90,19 @@
*/
#ifdef CONFIG_KINETIS_PORTAINTS
static xcpt_t g_portaisrs[32];
static struct kinetis_pinirq_s g_portaisrs[32];
#endif
#ifdef CONFIG_KINETIS_PORTBINTS
static xcpt_t g_portbisrs[32];
static struct kinetis_pinirq_s g_portbisrs[32];
#endif
#ifdef CONFIG_KINETIS_PORTCINTS
static xcpt_t g_portcisrs[32];
static struct kinetis_pinirq_s g_portcisrs[32];
#endif
#ifdef CONFIG_KINETIS_PORTDINTS
static xcpt_t g_portdisrs[32];
static struct kinetis_pinirq_s g_portdisrs[32];
#endif
#ifdef CONFIG_KINETIS_PORTEINTS
static xcpt_t g_porteisrs[32];
static struct kinetis_pinirq_s g_porteisrs[32];
#endif
/****************************************************************************
@ -113,7 +119,7 @@ static xcpt_t g_porteisrs[32];
#ifdef HAVE_PORTINTS
static int kinetis_portinterrupt(int irq, FAR void *context,
uintptr_t addr, xcpt_t *isrtab)
uintptr_t addr, struct kinetis_pinirq_s *isrtab)
{
uint32_t isfr = getreg32(addr);
int i;
@ -136,11 +142,14 @@ static int kinetis_portinterrupt(int irq, FAR void *context,
* interrupt handler for the pin.
*/
if (isrtab[i])
if (isrtab[i].handler != NULL)
{
xcpt_t handler = isrtab[i].handler;
void *arg = isrtab[i].arg;
/* There is a registered interrupt handler... invoke it */
(void)isrtab[i](irq, context);
(void)handler(irq, context, arg);
}
/* Writing a one to the ISFR register will clear the pending
@ -169,31 +178,31 @@ static int kinetis_portinterrupt(int irq, FAR void *context,
****************************************************************************/
#ifdef CONFIG_KINETIS_PORTAINTS
static int kinetis_portainterrupt(int irq, FAR void *context)
static int kinetis_portainterrupt(int irq, FAR void *context, FAR void *arg)
{
return kinetis_portinterrupt(irq, context, KINETIS_PORTA_ISFR, g_portaisrs);
}
#endif
#ifdef CONFIG_KINETIS_PORTBINTS
static int kinetis_portbinterrupt(int irq, FAR void *context)
static int kinetis_portbinterrupt(int irq, FAR void *context, FAR void *arg)
{
return kinetis_portinterrupt(irq, context, KINETIS_PORTB_ISFR, g_portbisrs);
}
#endif
#ifdef CONFIG_KINETIS_PORTCINTS
static int kinetis_portcinterrupt(int irq, FAR void *context)
static int kinetis_portcinterrupt(int irq, FAR void *context, FAR void *arg)
{
return kinetis_portinterrupt(irq, context, KINETIS_PORTC_ISFR, g_portcisrs);
}
#endif
#ifdef CONFIG_KINETIS_PORTDINTS
static int kinetis_portdinterrupt(int irq, FAR void *context)
static int kinetis_portdinterrupt(int irq, FAR void *context, FAR void *arg)
{
return kinetis_portinterrupt(irq, context, KINETIS_PORTD_ISFR, g_portdisrs);
}
#endif
#ifdef CONFIG_KINETIS_PORTEINTS
static int kinetis_porteinterrupt(int irq, FAR void *context)
static int kinetis_porteinterrupt(int irq, FAR void *context, FAR void *arg)
{
return kinetis_portinterrupt(irq, context, KINETIS_PORTE_ISFR, g_porteisrs);
}
@ -215,27 +224,27 @@ static int kinetis_porteinterrupt(int irq, FAR void *context)
void kinetis_pinirqinitialize(void)
{
#ifdef CONFIG_KINETIS_PORTAINTS
(void)irq_attach(KINETIS_IRQ_PORTA, kinetis_portainterrupt);
(void)irq_attach(KINETIS_IRQ_PORTA, kinetis_portainterrupt, NULL);
putreg32(0xffffffff, KINETIS_PORTA_ISFR);
up_enable_irq(KINETIS_IRQ_PORTA);
#endif
#ifdef CONFIG_KINETIS_PORTBINTS
(void)irq_attach(KINETIS_IRQ_PORTB, kinetis_portbinterrupt);
(void)irq_attach(KINETIS_IRQ_PORTB, kinetis_portbinterrupt, NULL);
putreg32(0xffffffff, KINETIS_PORTB_ISFR);
up_enable_irq(KINETIS_IRQ_PORTB);
#endif
#ifdef CONFIG_KINETIS_PORTCINTS
(void)irq_attach(KINETIS_IRQ_PORTC, kinetis_portcinterrupt);
(void)irq_attach(KINETIS_IRQ_PORTC, kinetis_portcinterrupt, NULL);
putreg32(0xffffffff, KINETIS_PORTC_ISFR);
up_enable_irq(KINETIS_IRQ_PORTC);
#endif
#ifdef CONFIG_KINETIS_PORTDINTS
(void)irq_attach(KINETIS_IRQ_PORTD, kinetis_portdinterrupt);
(void)irq_attach(KINETIS_IRQ_PORTD, kinetis_portdinterrupt, NULL);
putreg32(0xffffffff, KINETIS_PORTD_ISFR);
up_enable_irq(KINETIS_IRQ_PORTD);
#endif
#ifdef CONFIG_KINETIS_PORTEINTS
(void)irq_attach(KINETIS_IRQ_PORTE, kinetis_porteinterrupt);
(void)irq_attach(KINETIS_IRQ_PORTE, kinetis_porteinterrupt, NULL);
putreg32(0xffffffff, KINETIS_PORTE_ISFR);
up_enable_irq(KINETIS_IRQ_PORTE);
#endif
@ -263,12 +272,12 @@ void kinetis_pinirqinitialize(void)
*
****************************************************************************/
xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr)
xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr, void *arg)
{
#ifdef HAVE_PORTINTS
xcpt_t *isrtab;
xcpt_t oldisr;
irqstate_t flags;
struct kinetis_pinirq_s *isrtab;
xcpt_t oldisr;
irqstate_t flags;
unsigned int port;
unsigned int pin;
@ -322,8 +331,9 @@ xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr)
/* Get the old PIN ISR and set the new PIN ISR */
oldisr = isrtab[pin];
isrtab[pin] = pinisr;
oldisr = isrtab[pin].handler;
isrtab[pin].handler = pinisr;
isrtab[pin].arg = arg;
/* And return the old PIN isr address */

4
arch/arm/src/kinetis/kinetis_rtc.c
View File

@ -172,7 +172,7 @@ static void rtc_dumptime(FAR struct tm *tp, FAR const char *msg)
****************************************************************************/
#if defined(CONFIG_RTC_ALARM)
static int kinetis_rtc_interrupt(int irq, void *context)
static int kinetis_rtc_interrupt(int irq, void *context, FAR void *arg)
{
uint16_t rtc_sr;
@ -279,7 +279,7 @@ int up_rtc_irq_attach(void)
* KINETIS_IRQ_RTCS is a separate interrupt for seconds if needed
*/
irq_attach(KINETIS_IRQ_RTC, kinetis_rtc_interrupt);
irq_attach(KINETIS_IRQ_RTC, kinetis_rtc_interrupt, NULL);
up_enable_irq(KINETIS_IRQ_RTC);
}

6
arch/arm/src/kinetis/kinetis_sdhc.c
View File

@ -271,7 +271,7 @@ static void kinetis_endtransfer(struct kinetis_dev_s *priv, sdio_eventset_t wkup
/* Interrupt Handling *******************************************************/
static int kinetis_interrupt(int irq, void *context);
static int kinetis_interrupt(int irq, void *context, FAR void *arg);
/* SDIO interface methods ***************************************************/
@ -1065,7 +1065,7 @@ static void kinetis_endtransfer(struct kinetis_dev_s *priv, sdio_eventset_t wkup
*
****************************************************************************/
static int kinetis_interrupt(int irq, void *context)
static int kinetis_interrupt(int irq, void *context, FAR void *arg)
{
struct kinetis_dev_s *priv = &g_sdhcdev;
uint32_t enabled;
@ -1681,7 +1681,7 @@ static int kinetis_attach(FAR struct sdio_dev_s *dev)
/* Attach the SDIO interrupt handler */
ret = irq_attach(KINETIS_IRQ_SDHC, kinetis_interrupt);
ret = irq_attach(KINETIS_IRQ_SDHC, kinetis_interrupt, NULL);
if (ret == OK)
{

111
arch/arm/src/kinetis/kinetis_serial.c
View File

@ -253,9 +253,9 @@ static void up_shutdown(struct uart_dev_s *dev);
static int up_attach(struct uart_dev_s *dev);
static void up_detach(struct uart_dev_s *dev);
#ifdef CONFIG_DEBUG_FEATURES
static int up_interrupt(int irq, void *context);
static int up_interrupt(int irq, void *context, FAR void *arg);
#endif
static int up_interrupts(int irq, void *context);
static int up_interrupts(int irq, void *context, FAR void *arg);
static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
static int up_receive(struct uart_dev_s *dev, uint32_t *status);
static void up_rxint(struct uart_dev_s *dev, bool enable);
@ -688,11 +688,11 @@ static int up_attach(struct uart_dev_s *dev)
* disabled in the C2 register.
*/
ret = irq_attach(priv->irqs, up_interrupts);
ret = irq_attach(priv->irqs, up_interrupts, dev);
#ifdef CONFIG_DEBUG_FEATURES
if (ret == OK)
{
ret = irq_attach(priv->irqe, up_interrupt);
ret = irq_attach(priv->irqe, up_interrupt, dev);
}
#endif
@ -747,60 +747,14 @@ static void up_detach(struct uart_dev_s *dev)
****************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
static int up_interrupt(int irq, void *context)
static int up_interrupt(int irq, void *context, FAR void *arg)
{
struct uart_dev_s *dev = NULL;
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
struct up_dev_s *priv;
uint8_t regval;
#ifdef CONFIG_KINETIS_UART0
if (g_uart0priv.irqe == irq)
{
dev = &g_uart0port;
}
else
#endif
#ifdef CONFIG_KINETIS_UART1
if (g_uart1priv.irqe == irq)
{
dev = &g_uart1port;
}
else
#endif
#ifdef CONFIG_KINETIS_UART2
if (g_uart2priv.irqe == irq)
{
dev = &g_uart2port;
}
else
#endif
#ifdef CONFIG_KINETIS_UART3
if (g_uart3priv.irqe == irq)
{
dev = &g_uart3port;
}
else
#endif
#ifdef CONFIG_KINETIS_UART4
if (g_uart4priv.irqe == irq)
{
dev = &g_uart4port;
}
else
#endif
#ifdef CONFIG_KINETIS_UART5
if (g_uart5priv.irqe == irq)
{
dev = &g_uart5port;
}
else
#endif
{
PANIC();
}
DEBUGASSERT(dev != NULL && dev->priv != NULL);
priv = (struct up_dev_s *)dev->priv;
DEBUGASSERT(priv);
/* Handle error interrupts. This interrupt may be caused by:
*
@ -835,9 +789,9 @@ static int up_interrupt(int irq, void *context)
*
****************************************************************************/
static int up_interrupts(int irq, void *context)
static int up_interrupts(int irq, void *context, FAR void *arg)
{
struct uart_dev_s *dev = NULL;
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
struct up_dev_s *priv;
int passes;
#ifdef CONFIG_KINETIS_UARTFIFOS
@ -847,53 +801,8 @@ static int up_interrupts(int irq, void *context)
#endif
bool handled;
#ifdef CONFIG_KINETIS_UART0
if (g_uart0priv.irqs == irq)
{
dev = &g_uart0port;
}
else
#endif
#ifdef CONFIG_KINETIS_UART1
if (g_uart1priv.irqs == irq)
{
dev = &g_uart1port;
}
else
#endif
#ifdef CONFIG_KINETIS_UART2
if (g_uart2priv.irqs == irq)
{
dev = &g_uart2port;
}
else
#endif
#ifdef CONFIG_KINETIS_UART3
if (g_uart3priv.irqs == irq)
{
dev = &g_uart3port;
}
else
#endif
#ifdef CONFIG_KINETIS_UART4
if (g_uart4priv.irqs == irq)
{
dev = &g_uart4port;
}
else
#endif
#ifdef CONFIG_KINETIS_UART5
if (g_uart5priv.irqs == irq)
{
dev = &g_uart5port;
}
else
#endif
{
PANIC();
}
DEBUGASSERT(dev != NULL && dev->priv != NULL);
priv = (struct up_dev_s *)dev->priv;
DEBUGASSERT(priv);
/* Loop until there are no characters to be transferred or,
* until we have been looping for a long time.

4
arch/arm/src/kinetis/kinetis_timerisr.c
View File

@ -90,7 +90,7 @@
*
****************************************************************************/
static int kinetis_timerisr(int irq, uint32_t *regs)
static int kinetis_timerisr(int irq, uint32_t *regs, FAR void *arg)
{
/* Process timer interrupt */
@ -139,7 +139,7 @@ void arm_timer_initialize(void)
/* Attach the timer interrupt vector */
(void)irq_attach(KINETIS_IRQ_SYSTICK, (xcpt_t)kinetis_timerisr);
(void)irq_attach(KINETIS_IRQ_SYSTICK, (xcpt_t)kinetis_timerisr, NULL);
/* Enable SysTick interrupts */

6
arch/arm/src/kinetis/kinetis_usbdev.c
View File

@ -562,7 +562,7 @@ static void khci_ep0outcomplete(struct khci_usbdev_s *priv);
static void khci_ep0incomplete(struct khci_usbdev_s *priv);
static void khci_ep0transfer(struct khci_usbdev_s *priv,
uint16_t ustat);
static int khci_interrupt(int irq, void *context);
static int khci_interrupt(int irq, void *context, FAR void *arg);
/* Endpoint helpers *********************************************************/
@ -2713,7 +2713,7 @@ static void khci_ep0transfer(struct khci_usbdev_s *priv, uint16_t ustat)
* Name: khci_interrupt
****************************************************************************/
static int khci_interrupt(int irq, void *context)
static int khci_interrupt(int irq, void *context, FAR void *arg)
{
/* For now there is only one USB controller, but we will always refer to
* it using a pointer to make any future ports to multiple USB controllers
@ -4431,7 +4431,7 @@ void up_usbinitialize(void)
* them when we need them later.
*/
if (irq_attach(KINETIS_IRQ_USBOTG, khci_interrupt) != 0)
if (irq_attach(KINETIS_IRQ_USBOTG, khci_interrupt, NULL) != 0)
{
usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_IRQREGISTRATION),
(uint16_t)KINETIS_IRQ_USBOTG);

8
arch/arm/src/kl/kl_gpioirq.c
View File

@ -164,14 +164,14 @@ static int kl_portinterrupt(int irq, FAR void *context,
****************************************************************************/
#ifdef CONFIG_KL_PORTAINTS
static int kl_portainterrupt(int irq, FAR void *context)
static int kl_portainterrupt(int irq, FAR void *context, FAR void *arg)
{
return kl_portinterrupt(irq, context, KL_PORTA_ISFR, g_portaisrs);
}
#endif
#ifdef CONFIG_KL_PORTDINTS
static int kl_portdinterrupt(int irq, FAR void *context)
static int kl_portdinterrupt(int irq, FAR void *context, FAR void *arg)
{
return kl_portinterrupt(irq, context, KL_PORTD_ISFR, g_portdisrs);
}
@ -193,13 +193,13 @@ static int kl_portdinterrupt(int irq, FAR void *context)
void kl_gpioirqinitialize(void)
{
#ifdef CONFIG_KL_PORTAINTS
(void)irq_attach(KL_IRQ_PORTA, kl_portainterrupt);
(void)irq_attach(KL_IRQ_PORTA, kl_portainterrupt, NULL);
putreg32(0xffffffff, KL_PORTA_ISFR);
up_enable_irq(KL_IRQ_PORTA);
#endif
#ifdef CONFIG_KL_PORTDINTS
(void)irq_attach(KL_IRQ_PORTD, kl_portdinterrupt);
(void)irq_attach(KL_IRQ_PORTD, kl_portdinterrupt, NULL);
putreg32(0xffffffff, KL_PORTD_ISFR);
up_enable_irq(KL_IRQ_PORTD);
#endif

16
arch/arm/src/kl/kl_irq.c
View File

@ -138,7 +138,7 @@ static void kl_dumpnvic(const char *msg, int irq)
****************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
static int kl_nmi(int irq, FAR void *context)
static int kl_nmi(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! NMI received\n");
@ -146,7 +146,7 @@ static int kl_nmi(int irq, FAR void *context)
return 0;
}
static int kl_pendsv(int irq, FAR void *context)
static int kl_pendsv(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! PendSV received\n");
@ -154,7 +154,7 @@ static int kl_pendsv(int irq, FAR void *context)
return 0;
}
static int kl_reserved(int irq, FAR void *context)
static int kl_reserved(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! Reserved interrupt\n");
@ -231,15 +231,15 @@ void up_irqinitialize(void)
* under certain conditions.
*/
irq_attach(KL_IRQ_SVCALL, up_svcall);
irq_attach(KL_IRQ_HARDFAULT, up_hardfault);
irq_attach(KL_IRQ_SVCALL, up_svcall, NULL);
irq_attach(KL_IRQ_HARDFAULT, up_hardfault, NULL);
/* Attach all other processor exceptions (except reset and sys tick) */
#ifdef CONFIG_DEBUG_FEATURES
irq_attach(KL_IRQ_NMI, kl_nmi);
irq_attach(KL_IRQ_PENDSV, kl_pendsv);
irq_attach(KL_IRQ_RESERVED, kl_reserved);
irq_attach(KL_IRQ_NMI, kl_nmi, NULL);
irq_attach(KL_IRQ_PENDSV, kl_pendsv, NULL);
irq_attach(KL_IRQ_RESERVED, kl_reserved, NULL);
#endif
kl_dumpnvic("initial", NR_IRQS);

36
arch/arm/src/kl/kl_serial.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/kl/kl_serial.c
*
* Copyright (C) 2013-2012, 2016 Gregory Nutt. All rights reserved.
* Copyright (C) 2013-2012, 2016-2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -171,7 +171,7 @@ static int up_setup(struct uart_dev_s *dev);
static void up_shutdown(struct uart_dev_s *dev);
static int up_attach(struct uart_dev_s *dev);
static void up_detach(struct uart_dev_s *dev);
static int up_interrupts(int irq, void *context);
static int up_interrupts(int irq, void *context, void *arg);
static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
static int up_receive(struct uart_dev_s *dev, uint32_t *status);
static void up_rxint(struct uart_dev_s *dev, bool enable);
@ -455,7 +455,7 @@ static int up_attach(struct uart_dev_s *dev)
* disabled in the C2 register.
*/
ret = irq_attach(priv->irq, up_interrupts);
ret = irq_attach(priv->irq, up_interrupts, dev);
if (ret == OK)
{
up_enable_irq(priv->irq);
@ -500,40 +500,16 @@ static void up_detach(struct uart_dev_s *dev)
*
****************************************************************************/
static int up_interrupts(int irq, void *context)
static int up_interrupts(int irq, void *context, void *arg)
{
struct uart_dev_s *dev = NULL;
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
struct up_dev_s *priv;
int passes;
uint8_t s1;
bool handled;
#ifdef CONFIG_KL_UART0
if (g_uart0priv.irq == irq)
{
dev = &g_uart0port;
}
else
#endif
#ifdef CONFIG_KL_UART1
if (g_uart1priv.irq == irq)
{
dev = &g_uart1port;
}
else
#endif
#ifdef CONFIG_KL_UART2
if (g_uart2priv.irq == irq)
{
dev = &g_uart2port;
}
else
#endif
{
PANIC();
}
DEBUGASSERT(dev != NULL && dev->priv != NULL);
priv = (struct up_dev_s *)dev->priv;
DEBUGASSERT(priv);
/* Loop until there are no characters to be transferred or,
* until we have been looping for a long time.

4
arch/arm/src/kl/kl_timerisr.c
View File

@ -105,7 +105,7 @@
*
****************************************************************************/
static int kl_timerisr(int irq, uint32_t *regs)
static int kl_timerisr(int irq, uint32_t *regs, FAR void *arg)
{
/* Process timer interrupt */
@ -143,7 +143,7 @@ void arm_timer_initialize(void)
/* Attach the timer interrupt vector */
(void)irq_attach(KL_IRQ_SYSTICK, (xcpt_t)kl_timerisr);
(void)irq_attach(KL_IRQ_SYSTICK, (xcpt_t)kl_timerisr, NULL);
/* Enable SysTick interrupts. "The CLKSOURCE bit in SysTick Control and
* Status register selects either the core clock (when CLKSOURCE = 1) or

6
arch/arm/src/lpc11xx/lpc11_gpioint.c
View File

@ -402,7 +402,7 @@ static void lpc11_gpiodemux(uint32_t intbase, uint32_t intmask,
*
****************************************************************************/
static int lpc11_gpiointerrupt(int irq, void *context)
static int lpc11_gpiointerrupt(int irq, void *context, FAR void *arg)
{
/* Get the GPIO interrupt status */
@ -468,7 +468,7 @@ void lpc11_gpioirqinitialize(void)
* position in the NVIC with External Interrupt 3
*/
(void)irq_attach(LPC11_IRQ_EINT3, lpc11_gpiointerrupt);
(void)irq_attach(LPC11_IRQ_EINT3, lpc11_gpiointerrupt, NULL);
up_enable_irq(LPC11_IRQ_EINT3);
#elif defined(LPC178x)
@ -476,7 +476,7 @@ void lpc11_gpioirqinitialize(void)
* GPIO2.
*/
(void)irq_attach(LPC11_IRQ_GPIO, lpc11_gpiointerrupt);
(void)irq_attach(LPC11_IRQ_GPIO, lpc11_gpiointerrupt, NULL);
up_enable_irq(LPC11_IRQ_GPIO);
#endif

35
arch/arm/src/lpc11xx/lpc11_i2c.c
View File

@ -129,7 +129,7 @@ struct lpc11_i2cdev_s
static int lpc11_i2c_start(struct lpc11_i2cdev_s *priv);
static void lpc11_i2c_stop(struct lpc11_i2cdev_s *priv);
static int lpc11_i2c_interrupt(int irq, FAR void *context);
static int lpc11_i2c_interrupt(int irq, FAR void *context, void *arg);
static void lpc11_i2c_timeout(int argc, uint32_t arg, ...);
static void lpc11_i2c_setfrequency(struct lpc11_i2cdev_s *priv,
uint32_t frequency);
@ -304,7 +304,7 @@ static int lpc11_i2c_transfer(FAR struct i2c_master_s *dev,
}
/****************************************************************************
* Name: lpc11_i2c_interrupt
* Name: lpc11_stopnext
*
* Description:
* Check if we need to issue STOP at the next message
@ -334,36 +334,13 @@ static void lpc11_stopnext(struct lpc11_i2cdev_s *priv)
*
****************************************************************************/
static int lpc11_i2c_interrupt(int irq, FAR void *context)
static int lpc11_i2c_interrupt(int irq, FAR void *context, void *arg)
{
struct lpc11_i2cdev_s *priv;
struct lpc11_i2cdev_s *priv = (struct lpc11_i2cdev_s *)arg;
struct i2c_msg_s *msg;
uint32_t state;
#ifdef CONFIG_LPC11_I2C0
if (irq == LPC11_IRQ_I2C0)
{
priv = &g_i2c0dev;
}
else
#endif
#ifdef CONFIG_LPC11_I2C1
if (irq == LPC11_IRQ_I2C1)
{
priv = &g_i2c1dev;
}
else
#endif
#ifdef CONFIG_LPC11_I2C2
if (irq == LPC11_IRQ_I2C2)
{
priv = &g_i2c2dev;
}
else
#endif
{
PANIC();
}
DEBUGASSERT(priv != NULL);
/* Reference UM10360 19.10.5 */
@ -603,7 +580,7 @@ struct i2c_master_s *lpc11_i2cbus_initialize(int port)
/* Attach Interrupt Handler */
irq_attach(priv->irqid, lpc11_i2c_interrupt);
irq_attach(priv->irqid, lpc11_i2c_interrupt, priv);
/* Enable Interrupt Handler */

16
arch/arm/src/lpc11xx/lpc11_irq.c
View File

@ -134,7 +134,7 @@ static void lpc11_dumpnvic(const char *msg, int irq)
****************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
static int lpc11_nmi(int irq, FAR void *context)
static int lpc11_nmi(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! NMI received\n");
@ -142,7 +142,7 @@ static int lpc11_nmi(int irq, FAR void *context)
return 0;
}
static int lpc11_pendsv(int irq, FAR void *context)
static int lpc11_pendsv(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! PendSV received\n");
@ -150,7 +150,7 @@ static int lpc11_pendsv(int irq, FAR void *context)
return 0;
}
static int lpc11_reserved(int irq, FAR void *context)
static int lpc11_reserved(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! Reserved interrupt\n");
@ -227,15 +227,15 @@ void up_irqinitialize(void)
* under certain conditions.
*/
irq_attach(LPC11_IRQ_SVCALL, up_svcall);
irq_attach(LPC11_IRQ_HARDFAULT, up_hardfault);
irq_attach(LPC11_IRQ_SVCALL, up_svcall, NULL);
irq_attach(LPC11_IRQ_HARDFAULT, up_hardfault, NULL);
/* Attach all other processor exceptions (except reset and sys tick) */
#ifdef CONFIG_DEBUG_FEATURES
irq_attach(LPC11_IRQ_NMI, lpc11_nmi);
irq_attach(LPC11_IRQ_PENDSV, lpc11_pendsv);
irq_attach(LPC11_IRQ_RESERVED, lpc11_reserved);
irq_attach(LPC11_IRQ_NMI, lpc11_nmi, NULL);
irq_attach(LPC11_IRQ_PENDSV, lpc11_pendsv, NULL);
irq_attach(LPC11_IRQ_RESERVED, lpc11_reserved, NULL);
#endif
lpc11_dumpnvic("initial", NR_IRQS);

20
arch/arm/src/lpc11xx/lpc11_serial.c
View File

@ -104,7 +104,7 @@ static int up_setup(struct uart_dev_s *dev);
static void up_shutdown(struct uart_dev_s *dev);
static int up_attach(struct uart_dev_s *dev);
static void up_detach(struct uart_dev_s *dev);
static int up_interrupt(int irq, void *context);
static int up_interrupt(int irq, void *context, void *arg);
static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
static int up_receive(struct uart_dev_s *dev, uint32_t *status);
static void up_rxint(struct uart_dev_s *dev, bool enable);
@ -515,7 +515,7 @@ static int up_attach(struct uart_dev_s *dev)
/* Attach and enable the IRQ */
ret = irq_attach(priv->irq, up_interrupt);
ret = irq_attach(priv->irq, up_interrupt, dev);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
@ -557,24 +557,14 @@ static void up_detach(struct uart_dev_s *dev)
*
****************************************************************************/
static int up_interrupt(int irq, void *context)
static int up_interrupt(int irq, void *context, void *arg)
{
struct uart_dev_s *dev = NULL;
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
struct up_dev_s *priv;
uint32_t status;
int passes;
#ifdef CONFIG_LPC11_UART0
if (g_uart0priv.irq == irq)
{
dev = &g_uart0port;
}
else
#endif
{
PANIC();
}
DEBUGASSERT(dev != NULL && dev->priv != NULL);
priv = (struct up_dev_s *)dev->priv;
/* Loop until there are no characters to be transferred or,

4
arch/arm/src/lpc11xx/lpc11_timerisr.c
View File

@ -105,7 +105,7 @@
*
****************************************************************************/
static int lpc11_timerisr(int irq, uint32_t *regs)
static int lpc11_timerisr(int irq, uint32_t *regs, FAR void *arg)
{
/* Process timer interrupt */
@ -143,7 +143,7 @@ void arm_timer_initialize(void)
/* Attach the timer interrupt vector */
(void)irq_attach(LPC11_IRQ_SYSTICK, (xcpt_t)lpc11_timerisr);
(void)irq_attach(LPC11_IRQ_SYSTICK, (xcpt_t)lpc11_timerisr, NULL);
/* Enable SysTick interrupts. "The CLKSOURCE bit in SysTick Control and
* Status register selects either the core clock (when CLKSOURCE = 1) or

4
arch/arm/src/lpc17xx/lpc176x_rtc.c
View File

@ -227,7 +227,7 @@ static int rtc_resume(void)
************************************************************************************/
#ifdef CONFIG_RTC_ALARM
static int rtc_interrupt(int irq, void *context)
static int rtc_interrupt(int irq, void *context, FAR void *arg)
{
#warning "Missing logic"
return OK;
@ -262,7 +262,7 @@ int up_rtc_initialize(void)
/* Attach the RTC interrupt handler */
#ifdef CONFIG_RTC_ALARM
ret = irq_attach(LPC17_IRQ_RTC, rtc_interrupt);
ret = irq_attach(LPC17_IRQ_RTC, rtc_interrupt, NULL);
if (ret == OK)
{
up_enable_irq(LPC17_IRQ_RTC);

6
arch/arm/src/lpc17xx/lpc17_adc.c
View File

@ -112,7 +112,7 @@ static int adc_setup(FAR struct adc_dev_s *dev);
static void adc_shutdown(FAR struct adc_dev_s *dev);
static void adc_rxint(FAR struct adc_dev_s *dev, bool enable);
static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg);
static int adc_interrupt(int irq, void *context);
static int adc_interrupt(int irq, void *context, FAR void *arg);
/****************************************************************************
* Private Data
@ -304,7 +304,7 @@ static int adc_setup(FAR struct adc_dev_s *dev)
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
int i;
int ret = irq_attach(priv->irq, adc_interrupt);
int ret = irq_attach(priv->irq, adc_interrupt, NULL);
if (ret == OK)
{
for (i = 0; i < 8; i++)
@ -406,7 +406,7 @@ static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg)
*
****************************************************************************/
static int adc_interrupt(int irq, void *context)
static int adc_interrupt(int irq, void *context, FAR void *arg)
{
#ifndef CONFIG_ADC_BURSTMODE
#ifdef CONFIG_ADC_CHANLIST

6
arch/arm/src/lpc17xx/lpc17_can.c
View File

@ -217,7 +217,7 @@ static bool can_txempty(FAR struct can_dev_s *dev);
/* CAN interrupts */
static void can_interrupt(FAR struct can_dev_s *dev);
static int can12_interrupt(int irq, void *context);
static int can12_interrupt(int irq, void *context, FAR void *arg);
/* Initialization */
@ -543,7 +543,7 @@ static int can_setup(FAR struct can_dev_s *dev)
caninfo("CAN%d\n", priv->port);
ret = irq_attach(LPC17_IRQ_CAN, can12_interrupt);
ret = irq_attach(LPC17_IRQ_CAN, can12_interrupt, NULL);
if (ret == OK)
{
up_enable_irq(LPC17_IRQ_CAN);
@ -1045,7 +1045,7 @@ static void can_interrupt(FAR struct can_dev_s *dev)
*
****************************************************************************/
static int can12_interrupt(int irq, void *context)
static int can12_interrupt(int irq, void *context, FAR void *arg)
{
/* Handle CAN1/2 interrupts */

8
arch/arm/src/lpc17xx/lpc17_ethernet.c
View File

@ -335,7 +335,7 @@ static void lpc17_response(struct lpc17_driver_s *priv);
static void lpc17_txdone_work(FAR void *arg);
static void lpc17_rxdone_work(FAR void *arg);
static int lpc17_interrupt(int irq, void *context);
static int lpc17_interrupt(int irq, void *context, FAR void *arg);
/* Watchdog timer expirations */
@ -1123,7 +1123,7 @@ static void lpc17_txdone_work(FAR void *arg)
*
****************************************************************************/
static int lpc17_interrupt(int irq, void *context)
static int lpc17_interrupt(int irq, void *context, FAR void *arg)
{
register struct lpc17_driver_s *priv;
uint32_t status;
@ -3111,9 +3111,9 @@ static inline int lpc17_ethinitialize(int intf)
/* Attach the IRQ to the driver */
#if CONFIG_LPC17_NINTERFACES > 1
ret = irq_attach(priv->irq, lpc17_interrupt);
ret = irq_attach(priv->irq, lpc17_interrupt, NULL);
#else
ret = irq_attach(LPC17_IRQ_ETH, lpc17_interrupt);
ret = irq_attach(LPC17_IRQ_ETH, lpc17_interrupt, NULL);
#endif
if (ret != 0)
{

4
arch/arm/src/lpc17xx/lpc17_gpdma.c
View File

@ -190,7 +190,7 @@ static void lpc17_dmadone(struct lpc17_dmach_s *dmach)
*
****************************************************************************/
static int gpdma_interrupt(int irq, FAR void *context)
static int gpdma_interrupt(int irq, FAR void *context, FAR void *arg)
{
struct lpc17_dmach_s *dmach;
uint32_t regval;
@ -315,7 +315,7 @@ void weak_function up_dmainitialize(void)
/* Attach and enable the common interrupt handler */
ret = irq_attach(LPC17_IRQ_GPDMA, gpdma_interrupt);
ret = irq_attach(LPC17_IRQ_GPDMA, gpdma_interrupt, NULL);
if (ret == OK)
{
up_enable_irq(LPC17_IRQ_GPDMA);

6
arch/arm/src/lpc17xx/lpc17_gpioint.c
View File

@ -402,7 +402,7 @@ static void lpc17_gpiodemux(uint32_t intbase, uint32_t intmask,
*
****************************************************************************/
static int lpc17_gpiointerrupt(int irq, void *context)
static int lpc17_gpiointerrupt(int irq, void *context, FAR void *arg)
{
/* Get the GPIO interrupt status */
@ -468,7 +468,7 @@ void lpc17_gpioirqinitialize(void)
* position in the NVIC with External Interrupt 3
*/
(void)irq_attach(LPC17_IRQ_EINT3, lpc17_gpiointerrupt);
(void)irq_attach(LPC17_IRQ_EINT3, lpc17_gpiointerrupt, NULL);
up_enable_irq(LPC17_IRQ_EINT3);
#elif defined(LPC178x)
@ -476,7 +476,7 @@ void lpc17_gpioirqinitialize(void)
* GPIO2.
*/
(void)irq_attach(LPC17_IRQ_GPIO, lpc17_gpiointerrupt);
(void)irq_attach(LPC17_IRQ_GPIO, lpc17_gpiointerrupt, NULL);
up_enable_irq(LPC17_IRQ_GPIO);
#endif

35
arch/arm/src/lpc17xx/lpc17_i2c.c
View File

@ -129,7 +129,7 @@ struct lpc17_i2cdev_s
static int lpc17_i2c_start(struct lpc17_i2cdev_s *priv);
static void lpc17_i2c_stop(struct lpc17_i2cdev_s *priv);
static int lpc17_i2c_interrupt(int irq, FAR void *context);
static int lpc17_i2c_interrupt(int irq, FAR void *context, void *arg);
static void lpc17_i2c_timeout(int argc, uint32_t arg, ...);
static void lpc17_i2c_setfrequency(struct lpc17_i2cdev_s *priv,
uint32_t frequency);
@ -304,7 +304,7 @@ static int lpc17_i2c_transfer(FAR struct i2c_master_s *dev,
}
/****************************************************************************
* Name: lpc17_i2c_interrupt
* Name: lpc17_stopnext
*
* Description:
* Check if we need to issue STOP at the next message
@ -334,36 +334,13 @@ static void lpc17_stopnext(struct lpc17_i2cdev_s *priv)
*
****************************************************************************/
static int lpc17_i2c_interrupt(int irq, FAR void *context)
static int lpc17_i2c_interrupt(int irq, FAR void *context, void *arg)
{
struct lpc17_i2cdev_s *priv;
struct lpc17_i2cdev_s *priv = (struct lpc17_i2cdev_s *)arg;
struct i2c_msg_s *msg;
uint32_t state;
#ifdef CONFIG_LPC17_I2C0
if (irq == LPC17_IRQ_I2C0)
{
priv = &g_i2c0dev;
}
else
#endif
#ifdef CONFIG_LPC17_I2C1
if (irq == LPC17_IRQ_I2C1)
{
priv = &g_i2c1dev;
}
else
#endif
#ifdef CONFIG_LPC17_I2C2
if (irq == LPC17_IRQ_I2C2)
{
priv = &g_i2c2dev;
}
else
#endif
{
PANIC();
}
DEBUGASSERT(priv != NULL);
/* Reference UM10360 19.10.5 */
@ -608,7 +585,7 @@ struct i2c_master_s *lpc17_i2cbus_initialize(int port)
/* Attach Interrupt Handler */
irq_attach(priv->irqid, lpc17_i2c_interrupt);
irq_attach(priv->irqid, lpc17_i2c_interrupt, priv);
/* Enable Interrupt Handler */

32
arch/arm/src/lpc17xx/lpc17_irq.c
View File

@ -149,7 +149,7 @@ static void lpc17_dumpnvic(const char *msg, int irq)
****************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
static int lpc17_nmi(int irq, FAR void *context)
static int lpc17_nmi(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! NMI received\n");
@ -157,7 +157,7 @@ static int lpc17_nmi(int irq, FAR void *context)
return 0;
}
static int lpc17_busfault(int irq, FAR void *context)
static int lpc17_busfault(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! Bus fault recived\n");
@ -165,7 +165,7 @@ static int lpc17_busfault(int irq, FAR void *context)
return 0;
}
static int lpc17_usagefault(int irq, FAR void *context)
static int lpc17_usagefault(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! Usage fault received\n");
@ -173,7 +173,7 @@ static int lpc17_usagefault(int irq, FAR void *context)
return 0;
}
static int lpc17_pendsv(int irq, FAR void *context)
static int lpc17_pendsv(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! PendSV received\n");
@ -181,7 +181,7 @@ static int lpc17_pendsv(int irq, FAR void *context)
return 0;
}
static int lpc17_dbgmonitor(int irq, FAR void *context)
static int lpc17_dbgmonitor(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! Debug Monitor received\n");
@ -189,7 +189,7 @@ static int lpc17_dbgmonitor(int irq, FAR void *context)
return 0;
}
static int lpc17_reserved(int irq, FAR void *context)
static int lpc17_reserved(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! Reserved interrupt\n");
@ -371,8 +371,8 @@ void up_irqinitialize(void)
* under certain conditions.
*/
irq_attach(LPC17_IRQ_SVCALL, up_svcall);
irq_attach(LPC17_IRQ_HARDFAULT, up_hardfault);
irq_attach(LPC17_IRQ_SVCALL, up_svcall, NULL);
irq_attach(LPC17_IRQ_HARDFAULT, up_hardfault, NULL);
/* Set the priority of the SVCall interrupt */
@ -388,22 +388,22 @@ void up_irqinitialize(void)
*/
#ifdef CONFIG_ARM_MPU
irq_attach(LPC17_IRQ_MEMFAULT, up_memfault);
irq_attach(LPC17_IRQ_MEMFAULT, up_memfault, NULL);
up_enable_irq(LPC17_IRQ_MEMFAULT);
#endif
/* Attach all other processor exceptions (except reset and sys tick) */
#ifdef CONFIG_DEBUG_FEATURES
irq_attach(LPC17_IRQ_NMI, lpc17_nmi);
irq_attach(LPC17_IRQ_NMI, lpc17_nmi, NULL);
#ifndef CONFIG_ARM_MPU
irq_attach(LPC17_IRQ_MEMFAULT, up_memfault);
irq_attach(LPC17_IRQ_MEMFAULT, up_memfault, NULL);
#endif
irq_attach(LPC17_IRQ_BUSFAULT, lpc17_busfault);
irq_attach(LPC17_IRQ_USAGEFAULT, lpc17_usagefault);
irq_attach(LPC17_IRQ_PENDSV, lpc17_pendsv);
irq_attach(LPC17_IRQ_DBGMONITOR, lpc17_dbgmonitor);
irq_attach(LPC17_IRQ_RESERVED, lpc17_reserved);
irq_attach(LPC17_IRQ_BUSFAULT, lpc17_busfault, NULL);
irq_attach(LPC17_IRQ_USAGEFAULT, lpc17_usagefault, NULL);
irq_attach(LPC17_IRQ_PENDSV, lpc17_pendsv, NULL);
irq_attach(LPC17_IRQ_DBGMONITOR, lpc17_dbgmonitor, NULL);
irq_attach(LPC17_IRQ_RESERVED, lpc17_reserved, NULL);
#endif
lpc17_dumpnvic("initial", LPC17_IRQ_NIRQS);

2
arch/arm/src/lpc17xx/lpc17_pwm.c
View File

@ -350,7 +350,7 @@ static int pwm_interrupt(struct lpc17_pwmtimer_s *priv)
*
****************************************************************************/
static int pwm_tim1interrupt(int irq, void *context)
static int pwm_tim1interrupt(int irq, void *context, FAR void *arg)
{
return pwm_interrupt(&g_pwm1dev);
}

6
arch/arm/src/lpc17xx/lpc17_sdcard.c
View File

@ -345,7 +345,7 @@ static void lpc17_endtransfer(struct lpc17_dev_s *priv, sdio_eventset_t wkupeven
/* Interrupt Handling *******************************************************/
static int lpc17_interrupt(int irq, void *context);
static int lpc17_interrupt(int irq, void *context, FAR void *arg);
/* SD Card Interface Methods ************************************************/
@ -1203,7 +1203,7 @@ static void lpc17_endtransfer(struct lpc17_dev_s *priv, sdio_eventset_t wkupeven
*
****************************************************************************/
static int lpc17_interrupt(int irq, void *context)
static int lpc17_interrupt(int irq, void *context, FAR void *arg)
{
struct lpc17_dev_s *priv = &g_scard_dev;
uint32_t enabled;
@ -1642,7 +1642,7 @@ static int lpc17_attach(FAR struct sdio_dev_s *dev)
/* Attach the SD card interrupt handler */
ret = irq_attach(LPC17_IRQ_MCI, lpc17_interrupt);
ret = irq_attach(LPC17_IRQ_MCI, lpc17_interrupt, NULL);
if (ret == OK)
{

42
arch/arm/src/lpc17xx/lpc17_serial.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc17xx/lpc17_serial.c
*
* Copyright (C) 2010-2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2010-2013, 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -104,7 +104,7 @@ static int up_setup(struct uart_dev_s *dev);
static void up_shutdown(struct uart_dev_s *dev);
static int up_attach(struct uart_dev_s *dev);
static void up_detach(struct uart_dev_s *dev);
static int up_interrupt(int irq, void *context);
static int up_interrupt(int irq, void *context, void *arg);
static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
static int up_receive(struct uart_dev_s *dev, uint32_t *status);
static void up_rxint(struct uart_dev_s *dev, bool enable);
@ -999,7 +999,7 @@ static int up_attach(struct uart_dev_s *dev)
/* Attach and enable the IRQ */
ret = irq_attach(priv->irq, up_interrupt);
ret = irq_attach(priv->irq, up_interrupt, dev);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
@ -1041,44 +1041,14 @@ static void up_detach(struct uart_dev_s *dev)
*
****************************************************************************/
static int up_interrupt(int irq, void *context)
static int up_interrupt(int irq, void *context, void *arg)
{
struct uart_dev_s *dev = NULL;
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
struct up_dev_s *priv;
uint32_t status;
int passes;
#ifdef CONFIG_LPC17_UART0
if (g_uart0priv.irq == irq)
{
dev = &g_uart0port;
}
else
#endif
#ifdef CONFIG_LPC17_UART1
if (g_uart1priv.irq == irq)
{
dev = &g_uart1port;
}
else
#endif
#ifdef CONFIG_LPC17_UART2
if (g_uart2priv.irq == irq)
{
dev = &g_uart2port;
}
else
#endif
#ifdef CONFIG_LPC17_UART3
if (g_uart3priv.irq == irq)
{
dev = &g_uart3port;
}
else
#endif
{
PANIC();
}
DEBUGASSERT(dev != NULL && dev->priv != NULL);
priv = (struct up_dev_s *)dev->priv;
/* Loop until there are no characters to be transferred or,

4
arch/arm/src/lpc17xx/lpc17_timerisr.c
View File

@ -91,7 +91,7 @@
*
****************************************************************************/
static int lpc17_timerisr(int irq, uint32_t *regs)
static int lpc17_timerisr(int irq, uint32_t *regs, void *arg)
{
/* Process timer interrupt */
@ -135,7 +135,7 @@ void arm_timer_initialize(void)
/* Attach the timer interrupt vector */
(void)irq_attach(LPC17_IRQ_SYSTICK, (xcpt_t)lpc17_timerisr);
(void)irq_attach(LPC17_IRQ_SYSTICK, (xcpt_t)lpc17_timerisr, NULL);
/* Enable SysTick interrupts */

6
arch/arm/src/lpc17xx/lpc17_usbdev.c
View File

@ -421,7 +421,7 @@ static void lpc17_dispatchrequest(struct lpc17_usbdev_s *priv,
static inline void lpc17_ep0setup(struct lpc17_usbdev_s *priv);
static inline void lpc17_ep0dataoutinterrupt(struct lpc17_usbdev_s *priv);
static inline void lpc17_ep0dataininterrupt(struct lpc17_usbdev_s *priv);
static int lpc17_usbinterrupt(int irq, FAR void *context);
static int lpc17_usbinterrupt(int irq, FAR void *context, FAR void *arg);
#ifdef CONFIG_LPC17_USBDEV_DMA
static int lpc17_dmasetup(struct lpc17_usbdev_s *priv, uint8_t epphy,
@ -2051,7 +2051,7 @@ static inline void lpc17_ep0dataininterrupt(struct lpc17_usbdev_s *priv)
*
****************************************************************************/
static int lpc17_usbinterrupt(int irq, FAR void *context)
static int lpc17_usbinterrupt(int irq, FAR void *context, FAR void *arg)
{
struct lpc17_usbdev_s *priv = &g_usbdev;
struct lpc17_ep_s *privep ;
@ -3321,7 +3321,7 @@ void up_usbinitialize(void)
/* Attach USB controller interrupt handler */
if (irq_attach(LPC17_IRQ_USB, lpc17_usbinterrupt) != 0)
if (irq_attach(LPC17_IRQ_USB, lpc17_usbinterrupt, NULL) != 0)
{
usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_IRQREGISTRATION),
(uint16_t)LPC17_IRQ_USB);

6
arch/arm/src/lpc17xx/lpc17_usbhost.c
View File

@ -347,7 +347,7 @@ static int lpc17_ctrltd(struct lpc17_usbhost_s *priv, struct lpc17_ed_s *ed,
/* Interrupt handling **********************************************************/
static int lpc17_usbinterrupt(int irq, void *context);
static int lpc17_usbinterrupt(int irq, void *context, FAR void *arg);
/* USB host controller operations **********************************************/
@ -1633,7 +1633,7 @@ errout_with_xfrinfo:
*
****************************************************************************/
static int lpc17_usbinterrupt(int irq, void *context)
static int lpc17_usbinterrupt(int irq, void *context, FAR void *arg)
{
struct lpc17_usbhost_s *priv = &g_usbhost;
struct lpc17_ed_s *ed;
@ -3844,7 +3844,7 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller)
/* Attach USB host controller interrupt handler */
if (irq_attach(LPC17_IRQ_USB, lpc17_usbinterrupt) != 0)
if (irq_attach(LPC17_IRQ_USB, lpc17_usbinterrupt, NULL) != 0)
{
uerr("ERROR: Failed to attach IRQ\n");
return NULL;

23
arch/arm/src/lpc214x/lpc214x_serial.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc214x/lpc214x_serial.c
*
* Copyright (C) 2007-2009, 2012-2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2007-2009, 2012-2013, 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -88,7 +88,7 @@ static int up_setup(struct uart_dev_s *dev);
static void up_shutdown(struct uart_dev_s *dev);
static int up_attach(struct uart_dev_s *dev);
static void up_detach(struct uart_dev_s *dev);
static int up_interrupt(int irq, void *context);
static int up_interrupt(int irq, void *context, void *arg);
static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
static int up_receive(struct uart_dev_s *dev, uint32_t *status);
static void up_rxint(struct uart_dev_s *dev, bool enable);
@ -413,7 +413,7 @@ static int up_attach(struct uart_dev_s *dev)
/* Attach and enable the IRQ */
ret = irq_attach(priv->irq, up_interrupt);
ret = irq_attach(priv->irq, up_interrupt, dev);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
@ -456,25 +456,14 @@ static void up_detach(struct uart_dev_s *dev)
*
****************************************************************************/
static int up_interrupt(int irq, void *context)
static int up_interrupt(int irq, void *context, void *arg)
{
struct uart_dev_s *dev = NULL;
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
struct up_dev_s *priv;
uint8_t status;
int passes;
if (g_uart1priv.irq == irq)
{
dev = &g_uart1port;
}
else if (g_uart0priv.irq == irq)
{
dev = &g_uart0port;
}
else
{
PANIC();
}
DEBUGASSERT(dev != NULL && dev->priv != NULL);
priv = (struct up_dev_s *)dev->priv;
/* Loop until there are no characters to be transferred or,

4
arch/arm/src/lpc214x/lpc214x_timerisr.c
View File

@ -87,7 +87,7 @@
#ifdef CONFIG_VECTORED_INTERRUPTS
static int lpc214x_timerisr(uint32_t *regs)
#else
static int lpc214x_timerisr(int irq, uint32_t *regs)
static int lpc214x_timerisr(int irq, uint32_t *regs, void *arg)
#endif
{
/* Process timer interrupt */
@ -157,7 +157,7 @@ void arm_timer_initialize(void)
up_attach_vector(LPC214X_IRQ_SYSTIMER, LPC214X_SYSTIMER_VEC,
(vic_vector_t)lpc214x_timerisr);
#else
(void)irq_attach(LPC214X_IRQ_SYSTIMER, (xcpt_t)lpc214x_timerisr);
(void)irq_attach(LPC214X_IRQ_SYSTIMER, (xcpt_t)lpc214x_timerisr, NULL);
#endif
/* And enable the timer interrupt */

6
arch/arm/src/lpc214x/lpc214x_usbdev.c
View File

@ -428,7 +428,7 @@ static void lpc214x_dispatchrequest(struct lpc214x_usbdev_s *priv,
static inline void lpc214x_ep0setup(struct lpc214x_usbdev_s *priv);
static inline void lpc214x_ep0dataoutinterrupt(struct lpc214x_usbdev_s *priv);
static inline void lpc214x_ep0dataininterrupt(struct lpc214x_usbdev_s *priv);
static int lpc214x_usbinterrupt(int irq, FAR void *context);
static int lpc214x_usbinterrupt(int irq, FAR void *context, FAR void *arg);
#ifdef CONFIG_LPC214X_USBDEV_DMA
static int lpc214x_dmasetup(struct lpc214x_usbdev_s *priv, uint8_t epphy,
@ -2014,7 +2014,7 @@ static inline void lpc214x_ep0dataininterrupt(struct lpc214x_usbdev_s *priv)
*
****************************************************************************/
static int lpc214x_usbinterrupt(int irq, FAR void *context)
static int lpc214x_usbinterrupt(int irq, FAR void *context, FAR void *arg)
{
struct lpc214x_usbdev_s *priv = &g_usbdev;
struct lpc214x_ep_s *privep ;
@ -3235,7 +3235,7 @@ void up_usbinitialize(void)
/* Attach USB controller interrupt handler */
if (irq_attach(LPC214X_USB_IRQ, lpc214x_usbinterrupt) != 0)
if (irq_attach(LPC214X_USB_IRQ, lpc214x_usbinterrupt, NULL) != 0)
{
usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_IRQREGISTRATION),
(uint16_t)LPC214X_USB_IRQ);

33
arch/arm/src/lpc2378/lpc23xx_i2c.c
View File

@ -134,7 +134,7 @@ struct lpc2378_i2cdev_s
static int lpc2378_i2c_start(struct lpc2378_i2cdev_s *priv);
static void lpc2378_i2c_stop(struct lpc2378_i2cdev_s *priv);
static int lpc2378_i2c_interrupt(int irq, FAR void *context);
static int lpc2378_i2c_interrupt(int irq, FAR void *context, FAR void *arg);
static void lpc2378_i2c_timeout(int argc, uint32_t arg, ...);
static void lpc2378_i2c_setfrequency(struct lpc2378_i2cdev_s *priv,
uint32_t frequency);
@ -296,36 +296,13 @@ static void lpc2378_stopnext(struct lpc2378_i2cdev_s *priv)
*
****************************************************************************/
static int lpc2378_i2c_interrupt(int irq, FAR void *context)
static int lpc2378_i2c_interrupt(int irq, FAR void *context, FAR void *arg)
{
struct lpc2378_i2cdev_s *priv;
struct lpc2378_i2cdev_s *priv = (struct lpc2378_i2cdev_s *)arg;
struct i2c_msg_s *msg;
uint32_t state;
#ifdef CONFIG_LPC2378_I2C0
if (irq == I2C0_IRQ)
{
priv = &g_i2c0dev;
}
else
#endif
#ifdef CONFIG_LPC2378_I2C1
if (irq == I2C1_IRQ)
{
priv = &g_i2c1dev;
}
else
#endif
#ifdef CONFIG_LPC2378_I2C2
if (irq == I2C2_IRQ)
{
priv = &g_i2c2dev;
}
else
#endif
{
PANIC();
}
DEBUGASSERT(priv != NULL);
/* Reference UM10360 19.10.5 */
@ -619,7 +596,7 @@ struct i2c_master_s *lpc2378_i2cbus_initialize(int port)
/* Attach Interrupt Handler */
irq_attach(priv->irqid, lpc2378_i2c_interrupt);
irq_attach(priv->irqid, lpc2378_i2c_interrupt, priv);
/* Enable Interrupt Handler */

21
arch/arm/src/lpc2378/lpc23xx_serial.c
View File

@ -96,7 +96,7 @@ static int up_setup(struct uart_dev_s *dev);
static void up_shutdown(struct uart_dev_s *dev);
static int up_attach(struct uart_dev_s *dev);
static void up_detach(struct uart_dev_s *dev);
static int up_interrupt(int irq, void *context);
static int up_interrupt(int irq, void *context, void *arg);
static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
static int up_receive(struct uart_dev_s *dev, uint32_t * status);
static void up_rxint(struct uart_dev_s *dev, bool enable);
@ -533,7 +533,7 @@ static int up_attach(struct uart_dev_s *dev)
/* Attach and enable the IRQ */
ret = irq_attach(priv->irq, up_interrupt);
ret = irq_attach(priv->irq, up_interrupt, dev);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled in the
@ -581,25 +581,14 @@ static void up_detach(struct uart_dev_s *dev)
*
****************************************************************************/
static int up_interrupt(int irq, void *context)
static int up_interrupt(int irq, void *context, void *arg)
{
struct uart_dev_s *dev = NULL;
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
struct up_dev_s *priv;
uint8_t status;
int passes;
if (g_uart0priv.irq == irq)
{
dev = &g_uart0port;
}
else if (g_uart2priv.irq == irq)
{
dev = &g_uart2port;
}
else
{
PANIC();
}
DEBUGASSERT(dev != NULL && dev->priv != NULL);
priv = (struct up_dev_s *)dev->priv;
/* Loop until there are no characters to be transferred or, until we have

4
arch/arm/src/lpc2378/lpc23xx_timerisr.c
View File

@ -96,7 +96,7 @@
#ifdef CONFIG_VECTORED_INTERRUPTS
static int lpc23xx_timerisr(uint32_t * regs)
#else
static int lpc23xx_timerisr(int irq, uint32_t * regs)
static int lpc23xx_timerisr(int irq, uint32_t * regs, FAR void *arg)
#endif
{
static uint32_t tick;
@ -189,7 +189,7 @@ void arm_timer_initialize(void)
#ifdef CONFIG_VECTORED_INTERRUPTS
up_attach_vector(IRQ_SYSTIMER, ???, (vic_vector_t) lpc23xx_timerisr);
#else
(void)irq_attach(IRQ_SYSTIMER, (xcpt_t)lpc23xx_timerisr);
(void)irq_attach(IRQ_SYSTIMER, (xcpt_t)lpc23xx_timerisr, NULL);
#ifdef CONFIG_ARCH_IRQPRIO
up_prioritize_irq(IRQ_SYSTIMER, PRIORITY_HIGHEST);
#endif

6
arch/arm/src/lpc31xx/lpc31_ehci.c
View File

@ -514,7 +514,7 @@ static inline void lpc31_portsc_bottomhalf(void);
static inline void lpc31_syserr_bottomhalf(void);
static inline void lpc31_async_advance_bottomhalf(void);
static void lpc31_ehci_bottomhalf(FAR void *arg);
static int lpc31_ehci_interrupt(int irq, FAR void *context);
static int lpc31_ehci_interrupt(int irq, FAR void *context, FAR void *arg);
/* USB Host Controller Operations **********************************************/
@ -3357,7 +3357,7 @@ static void lpc31_ehci_bottomhalf(FAR void *arg)
*
****************************************************************************/
static int lpc31_ehci_interrupt(int irq, FAR void *context)
static int lpc31_ehci_interrupt(int irq, FAR void *context, FAR void *arg)
{
uint32_t usbsts;
uint32_t pending;
@ -5282,7 +5282,7 @@ FAR struct usbhost_connection_s *lpc31_ehci_initialize(int controller)
/* Interrupt Configuration ***************************************************/
ret = irq_attach(LPC31_IRQ_USBOTG, lpc31_ehci_interrupt);
ret = irq_attach(LPC31_IRQ_USBOTG, lpc31_ehci_interrupt, NULL);
if (ret != 0)
{
usbhost_trace1(EHCI_TRACE1_IRQATTACH_FAILED, LPC31_IRQ_USBOTG);

20
arch/arm/src/lpc31xx/lpc31_i2c.c
View File

@ -3,7 +3,7 @@
*
* Author: David Hewson
*
* Copyright (C) 2010-2011, 2014, 2016 Gregory Nutt. All rights reserved.
* Copyright (C) 2010-2011, 2014, 2016-2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -112,7 +112,7 @@ static struct lpc31_i2cdev_s i2cdevices[2];
* Private Function Prototypes
****************************************************************************/
static int i2c_interrupt(int irq, FAR void *context);
static int i2c_interrupt(int irq, FAR void *context, FAR void *arg);
static void i2c_progress(struct lpc31_i2cdev_s *priv);
static void i2c_timeout(int argc, uint32_t arg, ...);
static void i2c_hwreset(struct lpc31_i2cdev_s *priv);
@ -184,18 +184,12 @@ static void i2c_setfrequency(struct lpc31_i2cdev_s *priv, uint32_t frequency)
*
****************************************************************************/
static int i2c_interrupt(int irq, FAR void *context)
static int i2c_interrupt(int irq, FAR void *context, FAR void *arg)
{
if (irq == LPC31_IRQ_I2C0)
{
i2c_progress(&i2cdevices[0]);
}
if (irq == LPC31_IRQ_I2C1)
{
i2c_progress(&i2cdevices[1]);
}
struct lpc31_i2cdev_s *priv = (struct lpc31_i2cdev_s *)arg;
DEBUGASSERT(priv != NULL);
i2c_progress(priv);
return OK;
}
@ -585,7 +579,7 @@ struct i2c_master_s *lpc31_i2cbus_initialize(int port)
/* Attach Interrupt Handler */
irq_attach(priv->irqid, i2c_interrupt);
irq_attach(priv->irqid, i2c_interrupt, priv);
/* Enable Interrupt Handler */

6
arch/arm/src/lpc31xx/lpc31_serial.c
View File

@ -88,7 +88,7 @@ static int up_setup(struct uart_dev_s *dev);
static void up_shutdown(struct uart_dev_s *dev);
static int up_attach(struct uart_dev_s *dev);
static void up_detach(struct uart_dev_s *dev);
static int up_interrupt(int irq, void *context);
static int up_interrupt(int irq, void *context, FAR void *arg);
static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
static int up_receive(struct uart_dev_s *dev, uint32_t *status);
static void up_rxint(struct uart_dev_s *dev, bool enable);
@ -444,7 +444,7 @@ static int up_attach(struct uart_dev_s *dev)
/* Attach and enable the IRQ */
ret = irq_attach(LPC31_IRQ_UART, up_interrupt);
ret = irq_attach(LPC31_IRQ_UART, up_interrupt, NULL);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
@ -482,7 +482,7 @@ static void up_detach(struct uart_dev_s *dev)
*
****************************************************************************/
static int up_interrupt(int irq, void *context)
static int up_interrupt(int irq, void *context, FAR void *arg)
{
struct uart_dev_s *dev = &g_uartport;
uint8_t status;

4
arch/arm/src/lpc31xx/lpc31_timerisr.c
View File

@ -66,7 +66,7 @@
*
****************************************************************************/
static int lpc31_timerisr(int irq, uint32_t *regs)
static int lpc31_timerisr(int irq, uint32_t *regs, void *arg)
{
/* Clear the lattched timer interrupt (Writing any value to the CLEAR register
* clears the interrupt generated by the counter timer
@ -135,7 +135,7 @@ void arm_timer_initialize(void)
/* Attach the timer interrupt vector */
(void)irq_attach(LPC31_IRQ_TMR0, (xcpt_t)lpc31_timerisr);
(void)irq_attach(LPC31_IRQ_TMR0, (xcpt_t)lpc31_timerisr, NULL);
/* Clear any latched timer interrupt (Writing any value to the CLEAR register
* clears the latched interrupt generated by the counter timer)

6
arch/arm/src/lpc31xx/lpc31_usbdev.c
View File

@ -396,7 +396,7 @@ static void lpc31_ep0complete(struct lpc31_usbdev_s *priv, uint8_t epphy)
static void lpc31_ep0nak(struct lpc31_usbdev_s *priv, uint8_t epphy);
static bool lpc31_epcomplete(struct lpc31_usbdev_s *priv, uint8_t epphy);
static int lpc31_usbinterrupt(int irq, FAR void *context);
static int lpc31_usbinterrupt(int irq, FAR void *context, FAR void *arg);
/* Endpoint operations *********************************************************/
@ -1677,7 +1677,7 @@ bool lpc31_epcomplete(struct lpc31_usbdev_s *priv, uint8_t epphy)
*
****************************************************************************/
static int lpc31_usbinterrupt(int irq, FAR void *context)
static int lpc31_usbinterrupt(int irq, FAR void *context, FAR void *arg)
{
struct lpc31_usbdev_s *priv = &g_usbdev;
uint32_t disr, portsc1, n;
@ -2572,7 +2572,7 @@ void up_usbinitialize(void)
/* Attach USB controller interrupt handler */
if (irq_attach(LPC31_IRQ_USBOTG, lpc31_usbinterrupt) != 0)
if (irq_attach(LPC31_IRQ_USBOTG, lpc31_usbinterrupt, NULL) != 0)
{
usbtrace(TRACE_DEVERROR(LPC31_TRACEERR_IRQREGISTRATION),
(uint16_t)LPC31_IRQ_USBOTG);

6
arch/arm/src/lpc43xx/lpc43_adc.c
View File

@ -141,7 +141,7 @@ static int adc_setup(FAR struct adc_dev_s *dev);
static void adc_shutdown(FAR struct adc_dev_s *dev);
static void adc_rxint(FAR struct adc_dev_s *dev, bool enable);
static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg);
static int adc_interrupt(int irq, void *context);
static int adc_interrupt(int irq, void *context, FAR void *arg);
/****************************************************************************
* Private Data
@ -351,7 +351,7 @@ static int adc_setup(FAR struct adc_dev_s *dev)
{
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
int ret = irq_attach(priv->irq, adc_interrupt);
int ret = irq_attach(priv->irq, adc_interrupt, NULL);
if (ret == OK)
{
up_enable_irq(priv->irq);
@ -457,7 +457,7 @@ static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg)
*
****************************************************************************/
static int adc_interrupt(int irq, void *context)
static int adc_interrupt(int irq, void *context, FAR void *arg)
{
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)g_adcdev.ad_priv;

4
arch/arm/src/lpc43xx/lpc43_dac.c
View File

@ -89,7 +89,7 @@ static void dac_shutdown(FAR struct dac_dev_s *dev);
static void dac_txint(FAR struct dac_dev_s *dev, bool enable);
static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg);
static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg);
static int dac_interrupt(int irq, void *context);
static int dac_interrupt(int irq, void *context, FAR void *arg);
/****************************************************************************
* Private Data
@ -177,7 +177,7 @@ static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg)
return 0;
}
static int dac_interrupt(int irq, void *context)
static int dac_interrupt(int irq, void *context, FAR void *arg)
{
}

6
arch/arm/src/lpc43xx/lpc43_ehci.c
View File

@ -505,7 +505,7 @@ static inline void lpc43_portsc_bottomhalf(void);
static inline void lpc43_syserr_bottomhalf(void);
static inline void lpc43_async_advance_bottomhalf(void);
static void lpc43_ehci_bottomhalf(FAR void *arg);
static int lpc43_ehci_interrupt(int irq, FAR void *context);
static int lpc43_ehci_interrupt(int irq, FAR void *context, FAR void *arg);
/* USB Host Controller Operations **********************************************/
@ -3194,7 +3194,7 @@ static void lpc43_ehci_bottomhalf(FAR void *arg)
*
****************************************************************************/
static int lpc43_ehci_interrupt(int irq, FAR void *context)
static int lpc43_ehci_interrupt(int irq, FAR void *context, FAR void *arg)
{
uint32_t usbsts;
uint32_t pending;
@ -5089,7 +5089,7 @@ FAR struct usbhost_connection_s *lpc43_ehci_initialize(int controller)
/* Interrupt Configuration ***************************************************/
ret = irq_attach(LPC43M4_IRQ_USB0, lpc43_ehci_interrupt);
ret = irq_attach(LPC43M4_IRQ_USB0, lpc43_ehci_interrupt, NULL);
if (ret != 0)
{
usbhost_trace1(EHCI_TRACE1_IRQATTACH_FAILED, LPC43M4_IRQ_USB0);

6
arch/arm/src/lpc43xx/lpc43_ethernet.c
View File

@ -594,7 +594,7 @@ static void lpc43_freeframe(FAR struct lpc43_ethmac_s *priv);
static void lpc43_txdone(FAR struct lpc43_ethmac_s *priv);
static void lpc43_interrupt_work(FAR void *arg);
static int lpc43_interrupt(int irq, FAR void *context);
static int lpc43_interrupt(int irq, FAR void *context, FAR void *arg);
/* Watchdog timer expirations */
@ -2019,7 +2019,7 @@ static void lpc43_interrupt_work(FAR void *arg)
*
****************************************************************************/
static int lpc43_interrupt(int irq, FAR void *context)
static int lpc43_interrupt(int irq, FAR void *context, FAR void *arg)
{
FAR struct lpc43_ethmac_s *priv = &g_lpc43ethmac;
uint32_t dmasr;
@ -3876,7 +3876,7 @@ static inline int lpc43_ethinitialize(void)
/* Attach the IRQ to the driver */
if (irq_attach(LPC43M4_IRQ_ETHERNET, lpc43_interrupt))
if (irq_attach(LPC43M4_IRQ_ETHERNET, lpc43_interrupt, NULL))
{
/* We could not attach the ISR to the interrupt */

4
arch/arm/src/lpc43xx/lpc43_gpdma.c
View File

@ -190,7 +190,7 @@ static void lpc43_dmadone(struct lpc43_dmach_s *dmach)
*
****************************************************************************/
static int gpdma_interrupt(int irq, FAR void *context)
static int gpdma_interrupt(int irq, FAR void *context, FAR void *arg)
{
struct lpc43_dmach_s *dmach;
uint32_t regval;
@ -315,7 +315,7 @@ void weak_function up_dmainitialize(void)
/* Attach and enable the common interrupt handler */
ret = irq_attach(LPC43M4_IRQ_DMA, gpdma_interrupt);
ret = irq_attach(LPC43M4_IRQ_DMA, gpdma_interrupt, NULL);
if (ret == OK)
{
up_enable_irq(LPC43M4_IRQ_DMA);

26
arch/arm/src/lpc43xx/lpc43_i2c.c
View File

@ -130,7 +130,7 @@ static struct lpc43_i2cdev_s g_i2c1dev;
static int lpc43_i2c_start(struct lpc43_i2cdev_s *priv);
static void lpc43_i2c_stop(struct lpc43_i2cdev_s *priv);
static int lpc43_i2c_interrupt(int irq, FAR void *context);
static int lpc43_i2c_interrupt(int irq, FAR void *context, FAR void *arg);
static void lpc43_i2c_timeout(int argc, uint32_t arg, ...);
static void lpc43_i2c_setfrequency(struct lpc43_i2cdev_s *priv,
uint32_t frequency);
@ -277,29 +277,13 @@ void lpc32_i2c_nextmsg(struct lpc43_i2cdev_s *priv)
*
****************************************************************************/
static int lpc43_i2c_interrupt(int irq, FAR void *context)
static int lpc43_i2c_interrupt(int irq, FAR void *context, FAR void *arg)
{
struct lpc43_i2cdev_s *priv;
struct lpc43_i2cdev_s *priv = (struct lpc43_i2cdev_s *)arg;
struct i2c_msg_s *msg;
uint32_t state;
#ifdef CONFIG_LPC43_I2C0
if (irq == LPC43M0_IRQ_I2C0)
{
priv = &g_i2c0dev;
}
else
#endif
#ifdef CONFIG_LPC43_I2C1
if (irq == LPC43_IRQ_I2C1)
{
priv = &g_i2c1dev;
}
else
#endif
{
PANIC();
}
DEBUGASSERT(priv != NULL);
/* Reference UM10360 19.10.5 */
@ -558,7 +542,7 @@ struct i2c_master_s *lpc43_i2cbus_initialize(int port)
/* Attach Interrupt Handler */
irq_attach(priv->irqid, lpc43_i2c_interrupt);
irq_attach(priv->irqid, lpc43_i2c_interrupt, priv);
/* Enable Interrupt Handler */

32
arch/arm/src/lpc43xx/lpc43_irq.c
View File

@ -154,7 +154,7 @@ static void lpc43_dumpnvic(const char *msg, int irq)
****************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
static int lpc43_nmi(int irq, FAR void *context)
static int lpc43_nmi(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! NMI received\n");
@ -162,7 +162,7 @@ static int lpc43_nmi(int irq, FAR void *context)
return 0;
}
static int lpc43_busfault(int irq, FAR void *context)
static int lpc43_busfault(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! Bus fault recived\n");
@ -170,7 +170,7 @@ static int lpc43_busfault(int irq, FAR void *context)
return 0;
}
static int lpc43_usagefault(int irq, FAR void *context)
static int lpc43_usagefault(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! Usage fault received\n");
@ -178,7 +178,7 @@ static int lpc43_usagefault(int irq, FAR void *context)
return 0;
}
static int lpc43_pendsv(int irq, FAR void *context)
static int lpc43_pendsv(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! PendSV received\n");
@ -186,7 +186,7 @@ static int lpc43_pendsv(int irq, FAR void *context)
return 0;
}
static int lpc43_dbgmonitor(int irq, FAR void *context)
static int lpc43_dbgmonitor(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! Debug Monitor received\n");
@ -194,7 +194,7 @@ static int lpc43_dbgmonitor(int irq, FAR void *context)
return 0;
}
static int lpc43_reserved(int irq, FAR void *context)
static int lpc43_reserved(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! Reserved interrupt\n");
@ -364,8 +364,8 @@ void up_irqinitialize(void)
* under certain conditions.
*/
irq_attach(LPC43_IRQ_SVCALL, up_svcall);
irq_attach(LPC43_IRQ_HARDFAULT, up_hardfault);
irq_attach(LPC43_IRQ_SVCALL, up_svcall, NULL);
irq_attach(LPC43_IRQ_HARDFAULT, up_hardfault, NULL);
/* Set the priority of the SVCall interrupt */
@ -381,22 +381,22 @@ void up_irqinitialize(void)
*/
#ifdef CONFIG_ARM_MPU
irq_attach(LPC43_IRQ_MEMFAULT, up_memfault);
irq_attach(LPC43_IRQ_MEMFAULT, up_memfault, NULL);
up_enable_irq(LPC43_IRQ_MEMFAULT);
#endif
/* Attach all other processor exceptions (except reset and sys tick) */
#ifdef CONFIG_DEBUG_FEATURES
irq_attach(LPC43_IRQ_NMI, lpc43_nmi);
irq_attach(LPC43_IRQ_NMI, lpc43_nmi, NULL);
#ifndef CONFIG_ARM_MPU
irq_attach(LPC43_IRQ_MEMFAULT, up_memfault);
irq_attach(LPC43_IRQ_MEMFAULT, up_memfault, NULL);
#endif
irq_attach(LPC43_IRQ_BUSFAULT, lpc43_busfault);
irq_attach(LPC43_IRQ_USAGEFAULT, lpc43_usagefault);
irq_attach(LPC43_IRQ_PENDSV, lpc43_pendsv);
irq_attach(LPC43_IRQ_DBGMONITOR, lpc43_dbgmonitor);
irq_attach(LPC43_IRQ_RESERVED, lpc43_reserved);
irq_attach(LPC43_IRQ_BUSFAULT, lpc43_busfault, NULL);
irq_attach(LPC43_IRQ_USAGEFAULT, lpc43_usagefault, NULL);
irq_attach(LPC43_IRQ_PENDSV, lpc43_pendsv, NULL);
irq_attach(LPC43_IRQ_DBGMONITOR, lpc43_dbgmonitor, NULL);
irq_attach(LPC43_IRQ_RESERVED, lpc43_reserved, NULL);
#endif
lpc43_dumpnvic("initial", LPC43M4_IRQ_NIRQS);

4
arch/arm/src/lpc43xx/lpc43_rit.c
View File

@ -86,7 +86,7 @@ struct timespec g_ts;
* Private Functions
****************************************************************************/
static int lpc43_RIT_isr(int irq, FAR void *context)
static int lpc43_RIT_isr(int irq, FAR void *context, FAR void *arg)
{
irqstate_t flags;
@ -166,7 +166,7 @@ void arm_timer_initialize(void)
/* Set up the IRQ here */
irq_attach(LPC43M4_IRQ_RITIMER, lpc43_RIT_isr);
irq_attach(LPC43M4_IRQ_RITIMER, lpc43_RIT_isr, NULL);
/* Compute how many seconds per tick we have on the main clock. If it is
* 204MHz for example, then there should be about 4.90ns per tick

42
arch/arm/src/lpc43xx/lpc43_serial.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc43xx/lpc43_serial.c
*
* Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved.
* Copyright (C) 2012-2013, 2016-2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -106,7 +106,7 @@ static int up_setup(struct uart_dev_s *dev);
static void up_shutdown(struct uart_dev_s *dev);
static int up_attach(struct uart_dev_s *dev);
static void up_detach(struct uart_dev_s *dev);
static int up_interrupt(int irq, void *context);
static int up_interrupt(int irq, void *context, void *arg);
static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
#ifdef HAVE_RS485
static inline int up_set_rs485_mode(struct up_dev_s *priv,
@ -661,7 +661,7 @@ static int up_attach(struct uart_dev_s *dev)
/* Attach and enable the IRQ */
ret = irq_attach(priv->irq, up_interrupt);
ret = irq_attach(priv->irq, up_interrupt, dev);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
@ -702,44 +702,14 @@ static void up_detach(struct uart_dev_s *dev)
*
****************************************************************************/
static int up_interrupt(int irq, void *context)
static int up_interrupt(int irq, void *context, void *arg)
{
struct uart_dev_s *dev = NULL;
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
struct up_dev_s *priv;
uint32_t status;
int passes;
#ifdef CONFIG_LPC43_USART0
if (g_usart0priv.irq == irq)
{
dev = &g_usart0port;
}
else
#endif
#ifdef CONFIG_LPC43_UART1
if (g_uart1priv.irq == irq)
{
dev = &g_uart1port;
}
else
#endif
#ifdef CONFIG_LPC43_USART2
if (g_usart2priv.irq == irq)
{
dev = &g_usart2port;
}
else
#endif
#ifdef CONFIG_LPC43_USART3
if (g_usart3priv.irq == irq)
{
dev = &g_usart3port;
}
else
#endif
{
PANIC();
}
DEBUGASSERT(dev != NULL && dev->priv != NULL);
priv = (struct up_dev_s *)dev->priv;
/* Loop until there are no characters to be transferred or,

4
arch/arm/src/lpc43xx/lpc43_tickless_rit.c
View File

@ -536,7 +536,7 @@ static inline void lpc43_tl_alarm(uint32_t curr)
/* Interrupt handler */
static int lpc43_tl_isr(int irq, FAR void *context)
static int lpc43_tl_isr(int irq, FAR void *context, FAR void *arg)
{
lpc43_tl_sync_up();
@ -624,7 +624,7 @@ void arm_timer_initialize(void)
lpc43_tl_set_reset_on_match(false);
lpc43_tl_clear_interrupt();
irq_attach(LPC43M4_IRQ_RITIMER, lpc43_tl_isr);
irq_attach(LPC43M4_IRQ_RITIMER, lpc43_tl_isr, NULL);
up_enable_irq(LPC43M4_IRQ_RITIMER);
lpc43_tl_init_timer_vars();

6
arch/arm/src/lpc43xx/lpc43_timer.c
View File

@ -113,7 +113,7 @@ static void lpc43_putreg(uint32_t val, uint32_t addr);
/* Interrupt handling *******************************************************/
static int lpc43_interrupt(int irq, FAR void *context);
static int lpc43_interrupt(int irq, FAR void *context, FAR void *arg);
/* "Lower half" driver methods **********************************************/
@ -336,7 +336,7 @@ void tmr_clk_disable(uint16_t tmrid)
*
****************************************************************************/
static int lpc43_interrupt(int irq, FAR void *context)
static int lpc43_interrupt(int irq, FAR void *context, FAR void *arg)
{
uint8_t chan_int = 0x0f;
FAR struct lpc43_lowerhalf_s *priv = &g_tmrdevs[irq-LPC43M4_IRQ_TIMER0];
@ -757,7 +757,7 @@ void lpc43_tmrinitialize(FAR const char *devpath, int irq)
priv->ops = &g_tmrops;
(void)irq_attach(irq, lpc43_interrupt);
(void)irq_attach(irq, lpc43_interrupt, NULL);
/* Enable NVIC interrupt. */

4
arch/arm/src/lpc43xx/lpc43_timerisr.c
View File

@ -90,7 +90,7 @@
*
****************************************************************************/
static int lpc43_timerisr(int irq, uint32_t *regs)
static int lpc43_timerisr(int irq, uint32_t *regs, void *arg)
{
/* Process timer interrupt */
@ -134,7 +134,7 @@ void arm_timer_initialize(void)
/* Attach the timer interrupt vector */
(void)irq_attach(LPC43_IRQ_SYSTICK, (xcpt_t)lpc43_timerisr);
(void)irq_attach(LPC43_IRQ_SYSTICK, (xcpt_t)lpc43_timerisr, NULL);
/* Enable SysTick interrupts */

6
arch/arm/src/lpc43xx/lpc43_usb0dev.c
View File

@ -415,7 +415,7 @@ static void lpc43_ep0complete(struct lpc43_usbdev_s *priv, uint8_t epphy)
static void lpc43_ep0nak(struct lpc43_usbdev_s *priv, uint8_t epphy);
static bool lpc43_epcomplete(struct lpc43_usbdev_s *priv, uint8_t epphy);
static int lpc43_usbinterrupt(int irq, FAR void *context);
static int lpc43_usbinterrupt(int irq, FAR void *context, FAR void *arg);
/* Endpoint operations *********************************************************/
@ -1766,7 +1766,7 @@ bool lpc43_epcomplete(struct lpc43_usbdev_s *priv, uint8_t epphy)
*
****************************************************************************/
static int lpc43_usbinterrupt(int irq, FAR void *context)
static int lpc43_usbinterrupt(int irq, FAR void *context, FAR void *arg)
{
struct lpc43_usbdev_s *priv = &g_usbdev;
uint32_t disr, portsc1, n;
@ -2722,7 +2722,7 @@ void up_usbinitialize(void)
/* Attach USB controller interrupt handler */
irq_attach(LPC43M4_IRQ_USB0, lpc43_usbinterrupt);
irq_attach(LPC43M4_IRQ_USB0, lpc43_usbinterrupt, NULL);
up_enable_irq(LPC43M4_IRQ_USB0);
leave_critical_section(flags);

2
arch/arm/src/moxart/moxart_irq.c
View File

@ -138,7 +138,7 @@ void up_irqinitialize(void)
/* Setup UART shared interrupt */
irq_attach(CONFIG_UART_MOXA_SHARED_IRQ, uart_decodeirq);
irq_attach(CONFIG_UART_MOXA_SHARED_IRQ, uart_decodeirq, NULL);
up_enable_irq(CONFIG_UART_MOXA_SHARED_IRQ);
/* And finally, enable interrupts */

4
arch/arm/src/moxart/moxart_timer.c
View File

@ -98,7 +98,7 @@ static uint32_t cmp = BOARD_32KOSC_FREQUENCY / 100;
*
****************************************************************************/
static int moxart_timerisr(int irq, uint32_t *regs)
static int moxart_timerisr(int irq, uint32_t *regs, void *arg)
{
uint32_t state;
@ -148,7 +148,7 @@ void arm_timer_initialize(void)
/* Attach and enable the timer interrupt */
irq_attach(IRQ_SYSTIMER, (xcpt_t)moxart_timerisr);
irq_attach(IRQ_SYSTIMER, (xcpt_t)moxart_timerisr, NULL);
up_enable_irq(IRQ_SYSTIMER);
ftintc010_set_trig_mode(IRQ_SYSTIMER, 1);
ftintc010_set_trig_level(IRQ_SYSTIMER, 0);

16
arch/arm/src/nuc1xx/nuc_irq.c
View File

@ -138,7 +138,7 @@ static void nuc_dumpnvic(const char *msg, int irq)
****************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
static int nuc_nmi(int irq, FAR void *context)
static int nuc_nmi(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! NMI received\n");
@ -146,7 +146,7 @@ static int nuc_nmi(int irq, FAR void *context)
return 0;
}
static int nuc_pendsv(int irq, FAR void *context)
static int nuc_pendsv(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! PendSV received\n");
@ -154,7 +154,7 @@ static int nuc_pendsv(int irq, FAR void *context)
return 0;
}
static int nuc_reserved(int irq, FAR void *context)
static int nuc_reserved(int irq, FAR void *context, FAR void *arg)
{
(void)up_irq_save();
_err("PANIC!!! Reserved interrupt\n");
@ -231,15 +231,15 @@ void up_irqinitialize(void)
* under certain conditions.
*/
irq_attach(NUC_IRQ_SVCALL, up_svcall);
irq_attach(NUC_IRQ_HARDFAULT, up_hardfault);
irq_attach(NUC_IRQ_SVCALL, up_svcall, NULL);
irq_attach(NUC_IRQ_HARDFAULT, up_hardfault, NULL);
/* Attach all other processor exceptions (except reset and sys tick) */
#ifdef CONFIG_DEBUG_FEATURES
irq_attach(NUC_IRQ_NMI, nuc_nmi);
irq_attach(NUC_IRQ_PENDSV, nuc_pendsv);
irq_attach(NUC_IRQ_RESERVED, nuc_reserved);
irq_attach(NUC_IRQ_NMI, nuc_nmi, NULL);
irq_attach(NUC_IRQ_PENDSV, nuc_pendsv, NULL);
irq_attach(NUC_IRQ_RESERVED, nuc_reserved, NULL);
#endif
nuc_dumpnvic("initial", NR_IRQS);

35
arch/arm/src/nuc1xx/nuc_serial.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/nuc1xx/nuc_serial.c
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2013, 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -101,7 +101,7 @@ static int up_setup(struct uart_dev_s *dev);
static void up_shutdown(struct uart_dev_s *dev);
static int up_attach(struct uart_dev_s *dev);
static void up_detach(struct uart_dev_s *dev);
static int up_interrupt(int irq, void *context);
static int up_interrupt(int irq, void *context, void *arg);
static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
static int up_receive(struct uart_dev_s *dev, uint32_t *status);
static void up_rxint(struct uart_dev_s *dev, bool enable);
@ -568,7 +568,7 @@ static int up_attach(struct uart_dev_s *dev)
/* Attach and enable the IRQ */
ret = irq_attach(priv->irq, up_interrupt);
ret = irq_attach(priv->irq, up_interrupt, dev);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
@ -610,9 +610,9 @@ static void up_detach(struct uart_dev_s *dev)
*
****************************************************************************/
static int up_interrupt(int irq, void *context)
static int up_interrupt(int irq, void *context, void *arg)
{
struct uart_dev_s *dev = NULL;
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
struct nuc_dev_s *priv;
uint32_t isr;
uint32_t regval;
@ -620,30 +620,7 @@ static int up_interrupt(int irq, void *context)
bool rxto;
bool rxfe;
#ifdef CONFIG_NUC_UART0
if (g_uart0priv.irq == irq)
{
dev = &g_uart0port;
}
else
#endif
#ifdef CONFIG_NUC_UART1
if (g_uart1priv.irq == irq)
{
dev = &g_uart1port;
}
else
#endif
#ifdef CONFIG_NUC_UART2
if (g_uart2priv.irq == irq)
{
dev = &g_uart2port;
}
else
#endif
{
PANIC();
}
DEBUGASSERT(dev != NULL && dev->priv != NULL);
priv = (struct nuc_dev_s *)dev->priv;
/* Loop until there are no characters to be transferred or,

4
arch/arm/src/nuc1xx/nuc_timerisr.c
View File

@ -156,7 +156,7 @@ static inline void nuc_lock(void)
*
****************************************************************************/
static int nuc_timerisr(int irq, uint32_t *regs)
static int nuc_timerisr(int irq, uint32_t *regs, void *arg)
{
/* Process timer interrupt */
@ -226,7 +226,7 @@ void arm_timer_initialize(void)
/* Attach the timer interrupt vector */
(void)irq_attach(NUC_IRQ_SYSTICK, (xcpt_t)nuc_timerisr);
(void)irq_attach(NUC_IRQ_SYSTICK, (xcpt_t)nuc_timerisr, NULL);
/* Enable SysTick interrupts. We need to select the core clock here if
* we are not using one of the alternative clock sources above.

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