arch/arm/src/imxrt: Fix problem with with CPU hanging during boot in the clockconfig function. configs/imxrt1050-evk/scripts: Update linker script so that the NXP boot header will be included in the build.
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9ddce0b324
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@ -119,9 +119,20 @@ void imxrt_clockconfig(void)
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/* Set Dividers */
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putreg32(CCM_CACRR_ARM_PODF(IMXRT_ARM_CLOCK_DIVIDER), IMXRT_CCM_CACRR);
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putreg32(CCM_CBCDR_AHB_PODF(IMXRT_AHB_CLOCK_DIVIDER), IMXRT_CCM_CBCDR);
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putreg32(CCM_CBCDR_IPG_PODF(IMXRT_IPG_CLOCK_DIVIDER), IMXRT_CCM_CBCDR);
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reg = getreg32(IMXRT_CCM_CACRR);
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reg &= ~CCM_CACRR_ARM_PODF_MASK;
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reg |= CCM_CACRR_ARM_PODF(IMXRT_ARM_CLOCK_DIVIDER);
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putreg32(reg, IMXRT_CCM_CACRR);
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reg = getreg32(IMXRT_CCM_CBCDR);
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reg &= ~CCM_CBCDR_AHB_PODF_MASK;
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reg |= CCM_CBCDR_AHB_PODF(IMXRT_AHB_CLOCK_DIVIDER);
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putreg32(reg, IMXRT_CCM_CBCDR);
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reg = getreg32(IMXRT_CCM_CBCDR);
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reg &= ~CCM_CBCDR_IPG_PODF_MASK;
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reg |= CCM_CBCDR_IPG_PODF(IMXRT_IPG_CLOCK_DIVIDER);
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putreg32(reg, IMXRT_CCM_CBCDR);
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/* Set PRE_PERIPH_CLK to PLL1 */
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@ -147,13 +158,13 @@ void imxrt_clockconfig(void)
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reg = getreg32(IMXRT_CCM_CSCDR1);
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reg &= CCM_CSCDR1_UART_CLK_SEL;
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reg |= CCM_CSCDR1_UART_CLK_SEL_PLL3_80;
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putreg32(reg, IMXRT_CCM_CBCDR);
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putreg32(reg, IMXRT_CCM_CSCDR1);
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/* Set UART divider to 1 */
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reg = getreg32(IMXRT_CCM_CSCDR1);
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reg &= CCM_CSCDR1_UART_CLK_PODF_MASK;
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reg |= CCM_CSCDR1_UART_CLK_PODF(0);
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putreg32(reg, IMXRT_CCM_CBCDR);
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putreg32(reg, IMXRT_CCM_CSCDR1);
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#endif
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}
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@ -45,6 +45,10 @@ MEMORY
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OUTPUT_ARCH(arm)
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EXTERN(_vectors)
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EXTERN(hyperflash_config)
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EXTERN(image_vector_table)
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EXTERN(boot_data)
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ENTRY(_stext)
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SECTIONS
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@ -147,3 +151,4 @@ SECTIONS
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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}
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