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sx127x: fix some coding standard problems (#36)

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This commit is contained in:
Mateusz Szafoni 2020-01-04 12:58:47 +01:00 committed by Alan Carvalho de Assis
parent ebce5fb7ca
commit d644567dff
2 changed files with 363 additions and 218 deletions
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508
drivers/wireless/lpwan/sx127x/sx127x.c
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@ -98,12 +98,12 @@
/* FSK/OOK bandwidth default */
#define SX127X_FSKOOK_RXBW_DEFAULT FSKOOK_BANDWIDTH_15p6kHz
#define SX127X_FSKOOK_AFCBW_DEFAULT FSKOOK_BANDWIDTH_20p8kHz
#define SX127X_FSKOOK_RXBW_DEFAULT FSKOOK_BANDWIDTH_15P6KHZ
#define SX127X_FSKOOK_AFCBW_DEFAULT FSKOOK_BANDWIDTH_20P8KHZ
/* Default LORA bandwidth */
#define SX127X_LRM_BW_DEFAULT LORA_BANDWIDTH_7p8kHz
#define SX127X_LRM_BW_DEFAULT LORA_BANDWIDTH_7P8KHZ
/* Default SF for LORA */
@ -1186,7 +1186,7 @@ static int sx127x_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
static int sx127x_poll(FAR struct file *filep, FAR struct pollfd *fds,
bool setup)
{
#ifdef CONFIG_LPWAN_SX127X_RXSUPPORT
#ifndef CONFIG_LPWAN_SX127X_RXSUPPORT
return -ENOSYS;
#else
@ -1203,7 +1203,7 @@ static int sx127x_poll(FAR struct file *filep, FAR struct pollfd *fds,
/* Exclusive access */
ret = nxsem_wait(&dev->devsem);
ret = nxsem_wait(&dev->dev_sem);
if (ret < 0)
{
return ret;
@ -1255,7 +1255,7 @@ static int sx127x_poll(FAR struct file *filep, FAR struct pollfd *fds,
}
errout:
nxsem_post(&dev->devsem);
nxsem_post(&dev->dev_sem);
return ret;
#endif
}
@ -1378,7 +1378,8 @@ static int sx127x_lora_isr0_process(FAR struct sx127x_dev_s *dev)
default:
{
wlwarn("WARNING: Interrupt not processed, opmode=%d\n", dev->opmode);
wlwarn("WARNING: Interrupt not processed, opmode=%d\n",
dev->opmode);
ret = -EINVAL;
break;
}
@ -2217,27 +2218,27 @@ static int sx127x_fskook_rxbw_set(FAR struct sx127x_dev_s *dev, uint8_t rx_bw)
switch (rx_bw)
{
case FSKOOK_BANDWIDTH_2p6kHz:
case FSKOOK_BANDWIDTH_3p1kHz:
case FSKOOK_BANDWIDTH_3p9kHz:
case FSKOOK_BANDWIDTH_5p2kHz:
case FSKOOK_BANDWIDTH_6p3kHz:
case FSKOOK_BANDWIDTH_7p8kHz:
case FSKOOK_BANDWIDTH_10p4kHz:
case FSKOOK_BANDWIDTH_12p5kHz:
case FSKOOK_BANDWIDTH_15p6kHz:
case FSKOOK_BANDWIDTH_20p8kHz:
case FSKOOK_BANDWIDTH_25kHz:
case FSKOOK_BANDWIDTH_31p3kHz:
case FSKOOK_BANDWIDTH_41p7kHz:
case FSKOOK_BANDWIDTH_50kHz:
case FSKOOK_BANDWIDTH_62p5kHz:
case FSKOOK_BANDWIDTH_83p3kHz:
case FSKOOK_BANDWIDTH_100kHz:
case FSKOOK_BANDWIDTH_125kHz:
case FSKOOK_BANDWIDTH_166p7kHz:
case FSKOOK_BANDWIDTH_200kHz:
case FSKOOK_BANDWIDTH_250kHz:
case FSKOOK_BANDWIDTH_2P6KHZ:
case FSKOOK_BANDWIDTH_3P1KHZ:
case FSKOOK_BANDWIDTH_3P9KHZ:
case FSKOOK_BANDWIDTH_5P2KHZ:
case FSKOOK_BANDWIDTH_6P3KHZ:
case FSKOOK_BANDWIDTH_7P8KHZ:
case FSKOOK_BANDWIDTH_10P4KHZ:
case FSKOOK_BANDWIDTH_12P5KHZ:
case FSKOOK_BANDWIDTH_15P6KHZ:
case FSKOOK_BANDWIDTH_20P8KHZ:
case FSKOOK_BANDWIDTH_25KHZ:
case FSKOOK_BANDWIDTH_31P3KHZ:
case FSKOOK_BANDWIDTH_41P7KHZ:
case FSKOOK_BANDWIDTH_50KHZ:
case FSKOOK_BANDWIDTH_62P5KHZ:
case FSKOOK_BANDWIDTH_83P3KHZ:
case FSKOOK_BANDWIDTH_100KHZ:
case FSKOOK_BANDWIDTH_125KHZ:
case FSKOOK_BANDWIDTH_166P7KHZ:
case FSKOOK_BANDWIDTH_200KHZ:
case FSKOOK_BANDWIDTH_250KHZ:
{
/* Lock SPI */
@ -2293,27 +2294,27 @@ static int sx127x_fskook_afcbw_set(FAR struct sx127x_dev_s *dev,
switch (afc_bw)
{
case FSKOOK_BANDWIDTH_2p6kHz:
case FSKOOK_BANDWIDTH_3p1kHz:
case FSKOOK_BANDWIDTH_3p9kHz:
case FSKOOK_BANDWIDTH_5p2kHz:
case FSKOOK_BANDWIDTH_6p3kHz:
case FSKOOK_BANDWIDTH_7p8kHz:
case FSKOOK_BANDWIDTH_10p4kHz:
case FSKOOK_BANDWIDTH_12p5kHz:
case FSKOOK_BANDWIDTH_15p6kHz:
case FSKOOK_BANDWIDTH_20p8kHz:
case FSKOOK_BANDWIDTH_25kHz:
case FSKOOK_BANDWIDTH_31p3kHz:
case FSKOOK_BANDWIDTH_41p7kHz:
case FSKOOK_BANDWIDTH_50kHz:
case FSKOOK_BANDWIDTH_62p5kHz:
case FSKOOK_BANDWIDTH_83p3kHz:
case FSKOOK_BANDWIDTH_100kHz:
case FSKOOK_BANDWIDTH_125kHz:
case FSKOOK_BANDWIDTH_166p7kHz:
case FSKOOK_BANDWIDTH_200kHz:
case FSKOOK_BANDWIDTH_250kHz:
case FSKOOK_BANDWIDTH_2P6KHZ:
case FSKOOK_BANDWIDTH_3P1KHZ:
case FSKOOK_BANDWIDTH_3P9KHZ:
case FSKOOK_BANDWIDTH_5P2KHZ:
case FSKOOK_BANDWIDTH_6P3KHZ:
case FSKOOK_BANDWIDTH_7P8KHZ:
case FSKOOK_BANDWIDTH_10P4KHZ:
case FSKOOK_BANDWIDTH_12P5KHZ:
case FSKOOK_BANDWIDTH_15P6KHZ:
case FSKOOK_BANDWIDTH_20P8KHZ:
case FSKOOK_BANDWIDTH_25KHZ:
case FSKOOK_BANDWIDTH_31P3KHZ:
case FSKOOK_BANDWIDTH_41P7KHZ:
case FSKOOK_BANDWIDTH_50KHZ:
case FSKOOK_BANDWIDTH_62P5KHZ:
case FSKOOK_BANDWIDTH_83P3KHZ:
case FSKOOK_BANDWIDTH_100KHZ:
case FSKOOK_BANDWIDTH_125KHZ:
case FSKOOK_BANDWIDTH_166P7KHZ:
case FSKOOK_BANDWIDTH_200KHZ:
case FSKOOK_BANDWIDTH_250KHZ:
{
/* Lock SPI */
@ -3036,15 +3037,15 @@ static int sx127x_lora_bw_set(FAR struct sx127x_dev_s *dev, uint8_t bw)
switch (bw)
{
case LORA_BANDWIDTH_7p8kHz:
case LORA_BANDWIDTH_10p4kHz:
case LORA_BANDWIDTH_15p6kHz:
case LORA_BANDWIDTH_20p8kHz:
case LORA_BANDWIDTH_31p2kHz:
case LORA_BANDWIDTH_41p4kHz:
case LORA_BANDWIDTH_62p5kHz:
case LORA_BANDWIDTH_125kHz:
case LORA_BANDWIDTH_250kHz:
case LORA_BANDWIDTH_7P8KHZ:
case LORA_BANDWIDTH_10P4KHZ:
case LORA_BANDWIDTH_15P6KHZ:
case LORA_BANDWIDTH_20P8KHZ:
case LORA_BANDWIDTH_31P2KHZ:
case LORA_BANDWIDTH_41P4KHZ:
case LORA_BANDWIDTH_62P5KHZ:
case LORA_BANDWIDTH_125KHZ:
case LORA_BANDWIDTH_250KHZ:
{
/* Lock SPI */
@ -3901,6 +3902,9 @@ errout:
static int sx127x_power_set(FAR struct sx127x_dev_s *dev, int8_t power)
{
#ifndef CONFIG_LPWAN_SX127X_TXSUPPORT
return -ENOSYS;
#else
bool pa_select = false;
bool pa_dac = false;
uint8_t setbits = 0;
@ -3965,7 +3969,8 @@ static int sx127x_power_set(FAR struct sx127x_dev_s *dev, int8_t power)
}
}
wlinfo("power %d->%d, pa=%d, dac=%d\n", dev->power, power, pa_select, pa_dac);
wlinfo("power %d->%d, pa=%d, dac=%d\n",
dev->power, power, pa_select, pa_dac);
sx127x_lock(dev->spi);
@ -3988,7 +3993,8 @@ static int sx127x_power_set(FAR struct sx127x_dev_s *dev, int8_t power)
{
/* Disable high power on PA_BOOST */
sx127x_writeregbyte(dev, SX127X_CMN_PADAC, SX127X_CMN_PADAC_DEFAULT);
sx127x_writeregbyte(dev, SX127X_CMN_PADAC,
SX127X_CMN_PADAC_DEFAULT);
/* Configure output power */
@ -4008,7 +4014,8 @@ static int sx127x_power_set(FAR struct sx127x_dev_s *dev, int8_t power)
setbits = ((power + 1) << SX127X_CMN_PACFG_OUTPOWER_SHIFT);
setbits |= (5 << SX127X_CMN_PACFG_MAXPOWER_SHIFT);
clrbits = (SX127X_CMN_PACFG_OUTPOWER_MASK | SX127X_CMN_PACFG_MAXPOWER_SHIFT);
clrbits = (SX127X_CMN_PACFG_OUTPOWER_MASK |
SX127X_CMN_PACFG_MAXPOWER_SHIFT);
sx127x_modregbyte(dev, SX127X_CMN_PACFG, setbits, clrbits);
@ -4033,6 +4040,7 @@ static int sx127x_power_set(FAR struct sx127x_dev_s *dev, int8_t power)
errout:
return ret;
#endif
}
/****************************************************************************
@ -4041,7 +4049,11 @@ errout:
static int8_t sx127x_power_get(FAR struct sx127x_dev_s *dev)
{
#ifndef CONFIG_LPWAN_SX127X_TXSUPPORT
return 0;
#else
return dev->power;
#endif
}
/****************************************************************************
@ -4291,60 +4303,114 @@ static void sx127x_lora_dumpregs(FAR struct sx127x_dev_s *dev)
{
sx127x_lock(dev->spi);
wlinfo("LORA dump:\n");
wlinfo("FIFO: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_FIFO));
wlinfo("OPMODE: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_OPMODE));
wlinfo("FRFMSB: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_FRFMSB));
wlinfo("FRFMID: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_FRFMID));
wlinfo("FRFLSB: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_FRFLSB));
wlinfo("PACFG: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_PACFG));
wlinfo("PARAMP: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_PARAMP));
wlinfo("OCP: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_OCP));
wlinfo("LNA: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_LNA));
wlinfo("ADDRPTR: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_ADDRPTR));
wlinfo("TXBASE: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_TXBASE));
wlinfo("RXBASE: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_RXBASE));
wlinfo("RXCURR: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_RXCURR));
wlinfo("IRQMASK: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_IRQMASK));
wlinfo("IRQ: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_IRQ));
wlinfo("RXBYTES: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_RXBYTES));
wlinfo("RXHDRMSB: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_RXHDRMSB));
wlinfo("RXHDRLSB: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_RXHDRLSB));
wlinfo("RXPKTMSB: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_RXPKTMSB));
wlinfo("RXPKTLSB: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_RXPKTLSB));
wlinfo("MODSTAT: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_MODSTAT));
wlinfo("PKTSNR: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_PKTSNR));
wlinfo("PKTRSSI: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_PKTRSSI));
wlinfo("RSSI: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_RSSIVAL));
wlinfo("HOPCHAN: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_HOPCHAN));
wlinfo("MDMCFG1: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_MDMCFG1));
wlinfo("MDMCFG2: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_MDMCFG2));
wlinfo("RXTIMEOUTLSB: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_RXTIMEOUTLSB));
wlinfo("PREMSB: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_PREMSB));
wlinfo("PRELSB: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_PRELSB));
wlinfo("PAYLOADLEN: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_PAYLOADLEN));
wlinfo("PAYLOADMAX: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_PAYLOADMAX));
wlinfo("HOPPER: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_HOPPER));
wlinfo("RXFIFOADDR: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_RXFIFOADDR));
wlinfo("MODEMCFG3: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_MODEMCFG3));
wlinfo("FEIMSB: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_FEIMSB));
wlinfo("FEIMID: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_FEIMID));
wlinfo("FEILSB: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_FEILSB));
wlinfo("RSSIWIDEBAND: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_RSSIWIDEBAND));
wlinfo("DETECTOPT: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_DETECTOPT));
wlinfo("INVERTIQ: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_INVERTIQ));
wlinfo("DETECTTHR: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_DETECTTHR));
wlinfo("SYNCWORD: %02x\n", sx127x_readregbyte(dev, SX127X_LRM_SYNCWORD));
wlinfo("DIOMAP1: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_DIOMAP1));
wlinfo("DIOMAP2: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_DIOMAP2));
wlinfo("VERSION: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_VERSION));
wlinfo("TCXO: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_TCXO));
wlinfo("PADAC: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_PADAC));
wlinfo("FTEMP: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_FTEMP));
wlinfo("AGCREF: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_AGCREF));
wlinfo("AGCTHR1: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_AGCTHR1));
wlinfo("AGCTHR2: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_AGCTHR2));
wlinfo("AGCTHR3: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_AGCTHR3));
wlinfo("PLL: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_PLL));
wlinfo("FIFO: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_FIFO));
wlinfo("OPMODE: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_OPMODE));
wlinfo("FRFMSB: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_FRFMSB));
wlinfo("FRFMID: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_FRFMID));
wlinfo("FRFLSB: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_FRFLSB));
wlinfo("PACFG: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_PACFG));
wlinfo("PARAMP: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_PARAMP));
wlinfo("OCP: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_OCP));
wlinfo("LNA: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_LNA));
wlinfo("ADDRPTR: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_ADDRPTR));
wlinfo("TXBASE: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_TXBASE));
wlinfo("RXBASE: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_RXBASE));
wlinfo("RXCURR: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_RXCURR));
wlinfo("IRQMASK: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_IRQMASK));
wlinfo("IRQ: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_IRQ));
wlinfo("RXBYTES: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_RXBYTES));
wlinfo("RXHDRMSB: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_RXHDRMSB));
wlinfo("RXHDRLSB: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_RXHDRLSB));
wlinfo("RXPKTMSB: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_RXPKTMSB));
wlinfo("RXPKTLSB: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_RXPKTLSB));
wlinfo("MODSTAT: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_MODSTAT));
wlinfo("PKTSNR: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_PKTSNR));
wlinfo("PKTRSSI: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_PKTRSSI));
wlinfo("RSSI: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_RSSIVAL));
wlinfo("HOPCHAN: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_HOPCHAN));
wlinfo("MDMCFG1: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_MDMCFG1));
wlinfo("MDMCFG2: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_MDMCFG2));
wlinfo("RXTIMEOUTLSB: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_RXTIMEOUTLSB));
wlinfo("PREMSB: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_PREMSB));
wlinfo("PRELSB: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_PRELSB));
wlinfo("PAYLOADLEN: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_PAYLOADLEN));
wlinfo("PAYLOADMAX: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_PAYLOADMAX));
wlinfo("HOPPER: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_HOPPER));
wlinfo("RXFIFOADDR: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_RXFIFOADDR));
wlinfo("MODEMCFG3: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_MODEMCFG3));
wlinfo("FEIMSB: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_FEIMSB));
wlinfo("FEIMID: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_FEIMID));
wlinfo("FEILSB: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_FEILSB));
wlinfo("RSSIWIDEBAND: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_RSSIWIDEBAND));
wlinfo("DETECTOPT: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_DETECTOPT));
wlinfo("INVERTIQ: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_INVERTIQ));
wlinfo("DETECTTHR: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_DETECTTHR));
wlinfo("SYNCWORD: %02x\n",
sx127x_readregbyte(dev, SX127X_LRM_SYNCWORD));
wlinfo("DIOMAP1: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_DIOMAP1));
wlinfo("DIOMAP2: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_DIOMAP2));
wlinfo("VERSION: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_VERSION));
wlinfo("TCXO: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_TCXO));
wlinfo("PADAC: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_PADAC));
wlinfo("FTEMP: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_FTEMP));
wlinfo("AGCREF: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_AGCREF));
wlinfo("AGCTHR1: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_AGCTHR1));
wlinfo("AGCTHR2: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_AGCTHR2));
wlinfo("AGCTHR3: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_AGCTHR3));
wlinfo("PLL: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_PLL));
sx127x_unlock(dev->spi);
}
#endif /* CONFIG_LPWAN_SX127X_LORA */
@ -4362,76 +4428,146 @@ static void sx127x_fskook_dumpregs(FAR struct sx127x_dev_s *dev)
{
sx127x_lock(dev->spi);
wlinfo("FSK/OOK dump:\n");
wlinfo("FIFO: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_FIFO));
wlinfo("OPMODE: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_OPMODE));
wlinfo("FRFMSB: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_FRFMSB));
wlinfo("FRFMID: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_FRFMID));
wlinfo("FRFLSB: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_FRFLSB));
wlinfo("PACFG: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_PACFG));
wlinfo("PARAMP: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_PARAMP));
wlinfo("OCP: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_OCP));
wlinfo("LNA: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_LNA));
wlinfo("BITRATEMSB: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_BITRATEMSB));
wlinfo("BITRATELSM: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_BITRATELSB));
wlinfo("FDEVMSB: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_FDEVMSB));
wlinfo("FDEVLSB: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_FDEVLSB));
wlinfo("RXCFG: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_RXCFG));
wlinfo("RSSICFG: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_RSSICFG));
wlinfo("RSSICOLL: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_RSSICOLL));
wlinfo("RSSITHR: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_RSSITHR));
wlinfo("RSSIVAL: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_RSSIVAL));
wlinfo("RXBW: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_RXBW));
wlinfo("AFCBW: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_AFCBW));
wlinfo("OOKPEAK: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_OOKPEAK));
wlinfo("OOKFIX: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_OOKFIX));
wlinfo("AFCFEI: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_AFCFEI));
wlinfo("AFCMSB: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_AFCMSB));
wlinfo("AFCLSB: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_AFCLSB));
wlinfo("FEIMSB: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_FEIMSB));
wlinfo("FEILSB: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_FEILSB));
wlinfo("PREDET: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_PREDET));
wlinfo("RXTIMEOUT1: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_RXTIMEOUT1));
wlinfo("RXTIMEOUT2: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_RXTIMEOUT1));
wlinfo("RXTIMEOUT3: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_RXTIMEOUT1));
wlinfo("RXDELAY: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_RXDELAY));
wlinfo("OSC: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_OSC));
wlinfo("PREMSB: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_PREMSB));
wlinfo("PRELSB: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_PRELSB));
wlinfo("SYNCCFG: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_SYNCCFG));
wlinfo("SYNCVAL1: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_SYNCVAL1));
wlinfo("SYNCVAL2: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_SYNCVAL2));
wlinfo("SYNCVAL3: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_SYNCVAL3));
wlinfo("SYNCVAL4: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_SYNCVAL4));
wlinfo("SYNCVAL5: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_SYNCVAL5));
wlinfo("PKTCFG1: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_PKTCFG1));
wlinfo("PKTCFG2: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_PKTCFG2));
wlinfo("PAYLOADLEN: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_PAYLOADLEN));
wlinfo("NODEADDR: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_NODEADDR));
wlinfo("BROADCAST: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_BROADCAST));
wlinfo("FIFOTHR: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_FIFOTHR));
wlinfo("SEQCFG1: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_SEQCFG1));
wlinfo("SEQCFG2: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_SEQCFG2));
wlinfo("TIMRES: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_TIMRES));
wlinfo("TIMER1COEF: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_TIMER1COEF));
wlinfo("TIMER2COEF: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_TIMER2COEF));
wlinfo("IMAGECAL: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_IMAGECAL));
wlinfo("TEMP: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_TEMP));
wlinfo("LOWBAT: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_LOWBAT));
wlinfo("IRQ1: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_IRQ1));
wlinfo("IRQ2: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_IRQ2));
wlinfo("PLLHOP: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_PLLHOP));
wlinfo("BITRATEFRAC: %02x\n", sx127x_readregbyte(dev, SX127X_FOM_BITRATEFRAC));
wlinfo("DIOMAP1: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_DIOMAP1));
wlinfo("DIOMAP2: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_DIOMAP2));
wlinfo("VERSION: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_VERSION));
wlinfo("TCXO: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_TCXO));
wlinfo("PADAC: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_PADAC));
wlinfo("FTEMP: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_FTEMP));
wlinfo("AGCREF: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_AGCREF));
wlinfo("AGCTHR1: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_AGCTHR1));
wlinfo("AGCTHR2: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_AGCTHR2));
wlinfo("AGCTHR3: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_AGCTHR3));
wlinfo("PLL: %02x\n", sx127x_readregbyte(dev, SX127X_CMN_PLL));
wlinfo("FIFO: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_FIFO));
wlinfo("OPMODE: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_OPMODE));
wlinfo("FRFMSB: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_FRFMSB));
wlinfo("FRFMID: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_FRFMID));
wlinfo("FRFLSB: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_FRFLSB));
wlinfo("PACFG: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_PACFG));
wlinfo("PARAMP: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_PARAMP));
wlinfo("OCP: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_OCP));
wlinfo("LNA: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_LNA));
wlinfo("BITRATEMSB: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_BITRATEMSB));
wlinfo("BITRATELSM: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_BITRATELSB));
wlinfo("FDEVMSB: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_FDEVMSB));
wlinfo("FDEVLSB: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_FDEVLSB));
wlinfo("RXCFG: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_RXCFG));
wlinfo("RSSICFG: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_RSSICFG));
wlinfo("RSSICOLL: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_RSSICOLL));
wlinfo("RSSITHR: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_RSSITHR));
wlinfo("RSSIVAL: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_RSSIVAL));
wlinfo("RXBW: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_RXBW));
wlinfo("AFCBW: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_AFCBW));
wlinfo("OOKPEAK: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_OOKPEAK));
wlinfo("OOKFIX: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_OOKFIX));
wlinfo("AFCFEI: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_AFCFEI));
wlinfo("AFCMSB: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_AFCMSB));
wlinfo("AFCLSB: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_AFCLSB));
wlinfo("FEIMSB: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_FEIMSB));
wlinfo("FEILSB: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_FEILSB));
wlinfo("PREDET: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_PREDET));
wlinfo("RXTIMEOUT1: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_RXTIMEOUT1));
wlinfo("RXTIMEOUT2: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_RXTIMEOUT1));
wlinfo("RXTIMEOUT3: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_RXTIMEOUT1));
wlinfo("RXDELAY: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_RXDELAY));
wlinfo("OSC: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_OSC));
wlinfo("PREMSB: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_PREMSB));
wlinfo("PRELSB: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_PRELSB));
wlinfo("SYNCCFG: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_SYNCCFG));
wlinfo("SYNCVAL1: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_SYNCVAL1));
wlinfo("SYNCVAL2: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_SYNCVAL2));
wlinfo("SYNCVAL3: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_SYNCVAL3));
wlinfo("SYNCVAL4: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_SYNCVAL4));
wlinfo("SYNCVAL5: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_SYNCVAL5));
wlinfo("PKTCFG1: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_PKTCFG1));
wlinfo("PKTCFG2: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_PKTCFG2));
wlinfo("PAYLOADLEN: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_PAYLOADLEN));
wlinfo("NODEADDR: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_NODEADDR));
wlinfo("BROADCAST: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_BROADCAST));
wlinfo("FIFOTHR: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_FIFOTHR));
wlinfo("SEQCFG1: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_SEQCFG1));
wlinfo("SEQCFG2: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_SEQCFG2));
wlinfo("TIMRES: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_TIMRES));
wlinfo("TIMER1COEF: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_TIMER1COEF));
wlinfo("TIMER2COEF: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_TIMER2COEF));
wlinfo("IMAGECAL: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_IMAGECAL));
wlinfo("TEMP: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_TEMP));
wlinfo("LOWBAT: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_LOWBAT));
wlinfo("IRQ1: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_IRQ1));
wlinfo("IRQ2: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_IRQ2));
wlinfo("PLLHOP: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_PLLHOP));
wlinfo("BITRATEFRAC: %02x\n",
sx127x_readregbyte(dev, SX127X_FOM_BITRATEFRAC));
wlinfo("DIOMAP1: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_DIOMAP1));
wlinfo("DIOMAP2: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_DIOMAP2));
wlinfo("VERSION: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_VERSION));
wlinfo("TCXO: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_TCXO));
wlinfo("PADAC: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_PADAC));
wlinfo("FTEMP: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_FTEMP));
wlinfo("AGCREF: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_AGCREF));
wlinfo("AGCTHR1: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_AGCTHR1));
wlinfo("AGCTHR2: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_AGCTHR2));
wlinfo("AGCTHR3: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_AGCTHR3));
wlinfo("PLL: %02x\n",
sx127x_readregbyte(dev, SX127X_CMN_PLL));
sx127x_unlock(dev->spi);
}
#endif
@ -4546,7 +4682,9 @@ int sx127x_register(FAR struct spi_dev_s *spi,
/* Initlaize configuration */
dev->idle = SX127X_IDLE_OPMODE;
#ifdef CONFIG_LPWAN_SX127X_TXSUPPORT
dev->pa_force = lower->pa_force;
#endif
dev->crcon = CONFIG_LPWAN_SX127X_CRCON;
#ifdef CONFIG_LPWAN_SX127X_FSKOOK
dev->fskook.fixlen = false;

73
include/nuttx/wireless/lpwan/sx127x.h
View File

@ -51,6 +51,7 @@
/****************************************************************************
* Pre-Processor Declarations
****************************************************************************/
/* Constants to SX127X */
/* PA BOOST threshold power */
@ -111,14 +112,18 @@
/* RX FIFO data *************************************************************/
#define SX127X_READ_DATA_HEADER_LEN (sizeof(struct sx127x_read_hdr_s) - SX127X_READ_DATA_MAX)
#define SX127X_READ_DATA_MAX (CONFIG_LPWAN_SX127X_RXFIFO_DATA_LEN)
#define SX127X_RXFIFO_ITEM_SIZE (sizeof(struct sx127x_read_hdr_s))
#ifdef CONFIG_LPWAN_SX127X_RXSUPPORT
# define SX127X_READ_DATA_HEADER_LEN (sizeof(struct sx127x_read_hdr_s) - \
SX127X_READ_DATA_MAX)
# define SX127X_READ_DATA_MAX (CONFIG_LPWAN_SX127X_RXFIFO_DATA_LEN)
# define SX127X_RXFIFO_ITEM_SIZE (sizeof(struct sx127x_read_hdr_s))
#endif
/****************************************************************************
* Public Data Types
****************************************************************************/
#ifdef CONFIG_LPWAN_SX127X_RXSUPPORT
/* RX FIFO data */
struct sx127x_read_hdr_s
@ -129,6 +134,7 @@ struct sx127x_read_hdr_s
uint8_t reserved[3];
uint8_t data[SX127X_READ_DATA_MAX];
};
#endif
/* Channel scan data */
@ -179,27 +185,28 @@ enum sx127x_opmode_fskook_e
enum sx127x_fskook_bw_e
{
FSKOOK_BANDWIDTH_2p6kHz = 0x17,
FSKOOK_BANDWIDTH_3p1kHz = 0x0f,
FSKOOK_BANDWIDTH_3p9kHz = 0x07,
FSKOOK_BANDWIDTH_5p2kHz = 0x16,
FSKOOK_BANDWIDTH_6p3kHz = 0x0e,
FSKOOK_BANDWIDTH_7p8kHz = 0x06,
FSKOOK_BANDWIDTH_10p4kHz = 0x15,
FSKOOK_BANDWIDTH_12p5kHz = 0x0d,
FSKOOK_BANDWIDTH_15p6kHz = 0x05,
FSKOOK_BANDWIDTH_20p8kHz = 0x14,
FSKOOK_BANDWIDTH_25kHz = 0x0c,
FSKOOK_BANDWIDTH_31p3kHz = 0x04,
FSKOOK_BANDWIDTH_41p7kHz = 0x13,
FSKOOK_BANDWIDTH_50kHz = 0x0b,
FSKOOK_BANDWIDTH_62p5kHz = 0x03,
FSKOOK_BANDWIDTH_83p3kHz = 0x12,
FSKOOK_BANDWIDTH_100kHz = 0x0a,
FSKOOK_BANDWIDTH_125kHz = 0x02,
FSKOOK_BANDWIDTH_166p7kHz = 0x11,
FSKOOK_BANDWIDTH_200kHz = 0x09,
FSKOOK_BANDWIDTH_250kHz = 0x01,
FSKOOK_BANDWIDTH_2P6KHZ = 0x17,
FSKOOK_BANDWIDTH_3P1KHZ = 0x0f,
FSKOOK_BANDWIDTH_3P9KHZ = 0x07,
FSKOOK_BANDWIDTH_5P2KHZ = 0x16,
FSKOOK_BANDWIDTH_6P3KHZ = 0x0e,
FSKOOK_BANDWIDTH_7P8KHZ = 0x06,
FSKOOK_BANDWIDTH_10P4KHZ = 0x15,
FSKOOK_BANDWIDTH_12P5KHZ = 0x0d,
FSKOOK_BANDWIDTH_15P6KHZ = 0x05,
FSKOOK_BANDWIDTH_20P8KHZ = 0x14,
FSKOOK_BANDWIDTH_25KHZ = 0x0c,
FSKOOK_BANDWIDTH_31P3KHZ = 0x04,
FSKOOK_BANDWIDTH_41P7KHZ = 0x13,
FSKOOK_BANDWIDTH_50KHZ = 0x0b,
FSKOOK_BANDWIDTH_62P5KHZ = 0x03,
FSKOOK_BANDWIDTH_83P3KHZ = 0x12,
FSKOOK_BANDWIDTH_100KHZ = 0x0a,
FSKOOK_BANDWIDTH_125KHZ = 0x02,
FSKOOK_BANDWIDTH_166P7KHZ = 0x11,
FSKOOK_BANDWIDTH_200KHZ = 0x09,
FSKOOK_BANDWIDTH_250KHZ = 0x01,
/* Other settings reserved */
};
@ -207,15 +214,15 @@ enum sx127x_fskook_bw_e
enum sx127x_lora_bw_e
{
LORA_BANDWIDTH_7p8kHz = 0,
LORA_BANDWIDTH_10p4kHz = 1,
LORA_BANDWIDTH_15p6kHz = 2,
LORA_BANDWIDTH_20p8kHz = 3,
LORA_BANDWIDTH_31p2kHz = 4,
LORA_BANDWIDTH_41p4kHz = 5,
LORA_BANDWIDTH_62p5kHz = 6,
LORA_BANDWIDTH_125kHz = 7,
LORA_BANDWIDTH_250kHz = 9
LORA_BANDWIDTH_7P8KHZ = 0,
LORA_BANDWIDTH_10P4KHZ = 1,
LORA_BANDWIDTH_15P6KHZ = 2,
LORA_BANDWIDTH_20P8KHZ = 3,
LORA_BANDWIDTH_31P2KHZ = 4,
LORA_BANDWIDTH_41P4KHZ = 5,
LORA_BANDWIDTH_62P5KHZ = 6,
LORA_BANDWIDTH_125KHZ = 7,
LORA_BANDWIDTH_250KHZ = 9
};
/* LORA SF */