From d6b4e90d7043b8ae2b3960eb9097d4e9aefdd010 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 19 Oct 2019 13:14:02 -0600 Subject: [PATCH] arch/arm/src/s32k1xx: Support configuration and initialization of the flash configuration bytes. boards/arm/s32k1xx/s32k1**evb/scripts/flash.ld: Create a special FLASH section to hold the FLASH configuration bytes. --- arch/arm/src/s32k1xx/Kconfig | 33 +++++ arch/arm/src/s32k1xx/Make.defs | 4 + .../src/s32k1xx/hardware/s32k1xx_flashcfg.h | 132 ++++++++++++++++++ .../src/s32k1xx/hardware/s32k1xx_memorymap.h | 1 + arch/arm/src/s32k1xx/s32k1xx_flashcfg.c | 70 ++++++++++ .../arm/s32k1xx/s32k118evb/scripts/flash.ld | 29 ++-- .../arm/s32k1xx/s32k146evb/scripts/flash.ld | 29 ++-- .../arm/s32k1xx/s32k148evb/scripts/flash.ld | 29 ++-- tools/README.txt | 2 +- 9 files changed, 301 insertions(+), 28 deletions(-) create mode 100644 arch/arm/src/s32k1xx/hardware/s32k1xx_flashcfg.h create mode 100644 arch/arm/src/s32k1xx/s32k1xx_flashcfg.c diff --git a/arch/arm/src/s32k1xx/Kconfig b/arch/arm/src/s32k1xx/Kconfig index bcb8f5189f..0796004680 100644 --- a/arch/arm/src/s32k1xx/Kconfig +++ b/arch/arm/src/s32k1xx/Kconfig @@ -239,6 +239,39 @@ config S32K1XX_PORTEINTS endif endmenu # S32K1xx GPIO Interrupt Configuration +menu "S32K1xx FLASH Configuration" +comment "CAREFUL: Bad selections may lock up your board" + +config S32K1XX_FLASHCFG_BACKDOOR1 + hex "Backdoor comparison key 1" + default 0xffffffff + +config S32K1XX_FLASHCFG_BACKDOOR2 + hex "Backdoor comparison key 2" + default 0xffffffff + +config S32K1XX_FLASHCFG_FPROT + hex "Program flash protection bytes" + default 0xffffffff + +config S32K1XX_FLASHCFG_FSEC + hex "Flash security byte" + default 0xff + +config S32K1XX_FLASHCFG_FOPT + hex "Flash nonvolatile option byte" + default 0xff + +config S32K1XX_FLASHCFG_FEPROT + hex "EEPROM protection byte" + default 0xff + +config S32K1XX_FLASHCFG_FDPROT + hex "Data flash protection byte" + default 0xff + +endmenu # S32K1xx FLASH Configuration + menu "eDMA Configuration" depends on S32K1XX_EDMA diff --git a/arch/arm/src/s32k1xx/Make.defs b/arch/arm/src/s32k1xx/Make.defs index ef95be6bf3..880f575de2 100644 --- a/arch/arm/src/s32k1xx/Make.defs +++ b/arch/arm/src/s32k1xx/Make.defs @@ -57,6 +57,10 @@ CHIP_CSRCS = s32k1xx_start.c s32k1xx_lowputc.c s32k1xx_clockconfig.c CHIP_CSRCS += s32k1xx_periphclocks.c s32k1xx_pin.c s32k1xx_pingpio.c CHIP_CSRCS += s32k1xx_idle.c +ifeq ($(CONFIG_BOOT_RUNFROMFLASH),y) +CHIP_CSRCS += s32k1xx_flashcfg.c +endif + ifeq ($(CONFIG_S32K1XX_LPUART),y) CHIP_CSRCS += s32k1xx_serial.c endif diff --git a/arch/arm/src/s32k1xx/hardware/s32k1xx_flashcfg.h b/arch/arm/src/s32k1xx/hardware/s32k1xx_flashcfg.h new file mode 100644 index 0000000000..31ac5bb702 --- /dev/null +++ b/arch/arm/src/s32k1xx/hardware/s32k1xx_flashcfg.h @@ -0,0 +1,132 @@ +/******************************************************************************************** + * arch/arm/src/s32k1xx/chip/s32k1xx_flashcfg.h + * + * Copyright (C) 2019 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ********************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K1XX_FLASHCFG_H +#define __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K1XX_FLASHCFG_H + +/******************************************************************************************** + * Included Files + ********************************************************************************************/ + +#include +#include + +/******************************************************************************************** + * Pre-processor Definitions + ********************************************************************************************/ + +/* FLASHCFG Register Offsets ****************************************************************/ + +#define S32K1XX_FLASHCFG_BACKDOOR1_OFFSET 0x0000 /* Backdoor Comparison Key 1 */ +#define S32K1XX_FLASHCFG_BACKDOOR2_OFFSET 0x0004 /* Backdoor Comparison Key 2 */ +#define S32K1XX_FLASHCFG_FPROT_OFFSET 0x0008 /* Program flash protection bytes */ +#define S32K1XX_FLASHCFG_FSEC_OFFSET 0x000c /* Flash security byte */ +#define S32K1XX_FLASHCFG_FOPT_OFFSET 0x000d /* Flash nonvolatile option byte */ +#define S32K1XX_FLASHCFG_FEPROT_OFFSET 0x000e /* EEPROM protection byte */ +#define S32K1XX_FLASHCFG_FDPROT_OFFSET 0x000f /* Data flash protection byte */ + +/* FLASHCFG Register Addresses ***************************************************************/ + +#define S32K1XX_FLASHCFG_BACKDOOR1 (S32K1XX_FLASHCFG_BASE + S32K1XX_FLASHCFG_BACKDOOR1_OFFSET) +#define S32K1XX_FLASHCFG_BACKDOOR2 (S32K1XX_FLASHCFG_BASE + S32K1XX_FLASHCFG_BACKDOOR2_OFFSET) +#define S32K1XX_FLASHCFG_FPROT (S32K1XX_FLASHCFG_BASE + S32K1XX_FLASHCFG_FPROT_OFFSET) +#define S32K1XX_FLASHCFG_FSEC (S32K1XX_FLASHCFG_BASE + S32K1XX_FLASHCFG_FSEC_OFFSET) +#define S32K1XX_FLASHCFG_FOPT (S32K1XX_FLASHCFG_BASE + S32K1XX_FLASHCFG_FOPT_OFFSET) +#define S32K1XX_FLASHCFG_FEPROT (S32K1XX_FLASHCFG_BASE + S32K1XX_FLASHCFG_FEPROT_OFFSET) +#define S32K1XX_FLASHCFG_FDPROT (S32K1XX_FLASHCFG_BASE + S32K1XX_FLASHCFG_FDPROT_OFFSET) + +/* FLASHCFG Register Bitfield Definitions ***************************************************/ + +/* Backdoor Comparison Key 1 (32-bits) */ +/* Backdoor Comparison Key 2 (32-bits) */ + +/* Program flash protection bytes + * + * Region 0: 0x000a0000 + * Region 1: 0x000a4000 + * Region 2: 0x000a8000 + * Region 3: 0x000ac000 + * ... + * Region 32: 0x0011c000 + */ + +#define FLASHCFG_FPROT_REGION(n) (1 << (n)) + +/* Flash security byte */ + +#define FLASHCFG_FSEC_SEC_SHIFT (0) /* Bits 0-1: Flash Security */ +#define FLASHCFG_FSEC_SEC_MASK (3 << FLASHCFG_FSEC_SHIFT) +# define FLASHCFG_FSEC_SEC_SECURE1 (0 << FLASHCFG_FSEC_SHIFT) +# define FLASHCFG_FSEC_SEC_SECURE2 (1 << FLASHCFG_FSEC_SHIFT) +# define FLASHCFG_FSEC_SEC_UNSECURE (2 << FLASHCFG_FSEC_SHIFT) +# define FLASHCFG_FSEC_SEC_SECURE3 (0 << FLASHCFG_FSEC_SHIFT) +#define FLASHCFG_FSEC_FSLACC_SHIFT (2) /* Bits 2-3: Factory Failure Analysis Access Code */ +#define FLASHCFG_FSEC_FSLACC_MASK (3 << FLASHCFG_FSEC_FSLACC_SHIFT) +# define FLASHCFG_FSEC_FSLACC_GRANTED1 (0 << FLASHCFG_FSEC_FSLACC_SHIFT) +# define FLASHCFG_FSEC_FSLACC_DENIED1 (1 << FLASHCFG_FSEC_FSLACC_SHIFT) +# define FLASHCFG_FSEC_FSLACC_DENIED2 (2 << FLASHCFG_FSEC_FSLACC_SHIFT) +# define FLASHCFG_FSEC_FSLACC_GRANTED2 (3 << FLASHCFG_FSEC_FSLACC_SHIFT) +#define FLASHCFG_FSEC_MEEN_SHIFT (4) /* Bits 4-5: Mass Erase Enable Bits */ +#define FLASHCFG_FSEC_MEEN_MASK (3 << FLASHCFG_FSEC_MEEN_SHIFT) +# define FLASHCFG_FSEC_MEEN_ENABLED1 (0 << FLASHCFG_FSEC_MEEN_SHIFT) +# define FLASHCFG_FSEC_MEEN_ENABLED2 (1 << FLASHCFG_FSEC_MEEN_SHIFT) +# define FLASHCFG_FSEC_MEEN_DISABLED (2 << FLASHCFG_FSEC_MEEN_SHIFT) +# define FLASHCFG_FSEC_MEEN_ENABLED3 (3 << FLASHCFG_FSEC_MEEN_SHIFT) +#define FLASHCFG_FSEC_KEYEN_SHIFT (6) /* Bits 6-7: Backdoor Key Security Enable */ +#define FLASHCFG_FSEC_KEYEN_MASK (3 << FLASHCFG_FSEC_KEYEN_SHIFT) +# define FLASHCFG_FSEC_KEYEN_DISABLED1 (0 << FLASHCFG_FSEC_KEYEN_SHIFT) +# define FLASHCFG_FSEC_KEYEN_DISABLED2 (1 << FLASHCFG_FSEC_KEYEN_SHIFT) +# define FLASHCFG_FSEC_KEYEN_ENABLED (2 << FLASHCFG_FSEC_KEYEN_SHIFT) +# define FLASHCFG_FSEC_KEYEN_DISABLED3 (3 << FLASHCFG_FSEC_KEYEN_SHIFT) + +/* Flash nonvolatile option byte (8-bits, Refer to the device's Chip Configuration details + * for the definition and use of these bits. + */ + +/* EEPROM protection byte. Each EPROT bit covers one-eighth of the configured EEPROM data */ + +#define FLASHCFG_FEPROT(n) (1 << (n)) + +/* Data flash protection byte. Each DPROT bit protects one-eighth of the partitioned data + * flash memory space. + */ + +#define FLASHCFG_FDPROT(n) (1 << (n)) + +/******************************************************************************************** + * Pre-processor Definitions + ********************************************************************************************/ + +#endif /* __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K1XX_FLASHCFG_H */ diff --git a/arch/arm/src/s32k1xx/hardware/s32k1xx_memorymap.h b/arch/arm/src/s32k1xx/hardware/s32k1xx_memorymap.h index 6767e1dee3..1e1b9191d7 100644 --- a/arch/arm/src/s32k1xx/hardware/s32k1xx_memorymap.h +++ b/arch/arm/src/s32k1xx/hardware/s32k1xx_memorymap.h @@ -47,6 +47,7 @@ ************************************************************************************/ #define S32K1XX_AIPS_LITE_BASE 0x40000000 /* Peripheral bridge (AIPS-Lite) */ +# define S32K1XX_FLASHCFG_BASE 0x40000400 /* FLASH Configuration bytes */ # define S32K1XX_MSCM_BASE 0x40001000 /* MSCM */ # define S32K1XX_DMAC_BASE 0x40008000 /* DMA controller */ # define S32K1XX_DMADESC_BASE 0x40008000 /* DMA transfer control descriptors */ diff --git a/arch/arm/src/s32k1xx/s32k1xx_flashcfg.c b/arch/arm/src/s32k1xx/s32k1xx_flashcfg.c new file mode 100644 index 0000000000..6bc4692e1e --- /dev/null +++ b/arch/arm/src/s32k1xx/s32k1xx_flashcfg.c @@ -0,0 +1,70 @@ +/**************************************************************************** + * arch/arm/src/s32k1xx/s32k1xx_flashcfg.c + * + * Copyright (C) 2019 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "hardware/s32k1xx_flashcfg.h" + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* Configured FLASH configuration bytes */ + +uint8_t g_flashcfg[16] __attribute__((section(".flashcfg"))) = +{ + (uint8_t)((CONFIG_S32K1XX_FLASHCFG_BACKDOOR1 >> 24) & 0xff), + (uint8_t)((CONFIG_S32K1XX_FLASHCFG_BACKDOOR1 >> 16) & 0xff), + (uint8_t)((CONFIG_S32K1XX_FLASHCFG_BACKDOOR1 >> 8) & 0xff), + (uint8_t)(CONFIG_S32K1XX_FLASHCFG_BACKDOOR1 & 0xff), + (uint8_t)((CONFIG_S32K1XX_FLASHCFG_BACKDOOR2 >> 24) & 0xff), + (uint8_t)((CONFIG_S32K1XX_FLASHCFG_BACKDOOR2 >> 16) & 0xff), + (uint8_t)((CONFIG_S32K1XX_FLASHCFG_BACKDOOR2 >> 8) & 0xff), + (uint8_t)(CONFIG_S32K1XX_FLASHCFG_BACKDOOR2 & 0xff), + (uint8_t)((CONFIG_S32K1XX_FLASHCFG_FPROT >> 24) & 0xff), + (uint8_t)((CONFIG_S32K1XX_FLASHCFG_FPROT >> 16) & 0xff), + (uint8_t)((CONFIG_S32K1XX_FLASHCFG_FPROT >> 8) & 0xff), + (uint8_t)(CONFIG_S32K1XX_FLASHCFG_FPROT & 0xff), + (uint8_t)CONFIG_S32K1XX_FLASHCFG_FDPROT, + (uint8_t)CONFIG_S32K1XX_FLASHCFG_FEPROT, + (uint8_t)CONFIG_S32K1XX_FLASHCFG_FOPT, + (uint8_t)CONFIG_S32K1XX_FLASHCFG_FSEC +}; diff --git a/boards/arm/s32k1xx/s32k118evb/scripts/flash.ld b/boards/arm/s32k1xx/s32k118evb/scripts/flash.ld index a1c3773ee5..72d8c16b67 100644 --- a/boards/arm/s32k1xx/s32k118evb/scripts/flash.ld +++ b/boards/arm/s32k1xx/s32k118evb/scripts/flash.ld @@ -46,21 +46,32 @@ MEMORY { - flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K + vflash (rx) : ORIGIN = 0x00000000, LENGTH = 1K + pflash (rx) : ORIGIN = 0x00000400, LENGTH = 16 + dflash (rx) : ORIGIN = 0x00000410, LENGTH = 255K-16 sram (rwx) : ORIGIN = 0x1ffffc00, LENGTH = 23K } OUTPUT_ARCH(arm) EXTERN(_vectors) +EXTERN(g_flashcfg) ENTRY(_stext) SECTIONS { - .text : + .vectors : { _stext = ABSOLUTE(.); *(.vectors) - . = 0x0000410; /* Skip over flash configuration field */ + } > vflash + + .flashcfg : + { + *(.flashcfg) + } > pflash + + .text : + { *(.text .text.*) *(.fixup) *(.gnu.warning) @@ -72,26 +83,26 @@ SECTIONS *(.gcc_except_table) *(.gnu.linkonce.r.*) _etext = ABSOLUTE(.); - } > flash + } > dflash .init_section : { _sinit = ABSOLUTE(.); *(.init_array .init_array.*) _einit = ABSOLUTE(.); - } > flash + } > dflash .ARM.extab : { *(.ARM.extab*) - } >flash + } >dflash .ARM.exidx : { __exidx_start = ABSOLUTE(.); *(.ARM.exidx*) __exidx_end = ABSOLUTE(.); - } >flash + } >dflash .data : { @@ -101,7 +112,7 @@ SECTIONS CONSTRUCTORS . = ALIGN(4); _edata = ABSOLUTE(.); - } > sram AT > flash + } > sram AT > dflash _eronly = LOADADDR(.data); @@ -110,7 +121,7 @@ SECTIONS _sramfuncs = ABSOLUTE(.); *(.ramfunc .ramfunc.*) _eramfuncs = ABSOLUTE(.); - } > sram AT > flash + } > sram AT > dflash _framfuncs = LOADADDR(.ramfunc); diff --git a/boards/arm/s32k1xx/s32k146evb/scripts/flash.ld b/boards/arm/s32k1xx/s32k146evb/scripts/flash.ld index 836cbf842c..63b989ccc4 100644 --- a/boards/arm/s32k1xx/s32k146evb/scripts/flash.ld +++ b/boards/arm/s32k1xx/s32k146evb/scripts/flash.ld @@ -46,21 +46,32 @@ MEMORY { - flash (rx) : ORIGIN = 0x00000000, LENGTH = 1M + vflash (rx) : ORIGIN = 0x00000000, LENGTH = 1K + pflash (rx) : ORIGIN = 0x00000400, LENGTH = 16 + dflash (rx) : ORIGIN = 0x00000410, LENGTH = 1023K-16 sram (rwx) : ORIGIN = 0x1fff0000, LENGTH = 124K } OUTPUT_ARCH(arm) EXTERN(_vectors) +EXTERN(g_flashcfg) ENTRY(_stext) SECTIONS { - .text : + .vectors : { _stext = ABSOLUTE(.); *(.vectors) - . = 0x0000410; /* Skip over flash configuration field */ + } > vflash + + .flashcfg : + { + *(.flashcfg) + } > pflash + + .text : + { *(.text .text.*) *(.fixup) *(.gnu.warning) @@ -72,26 +83,26 @@ SECTIONS *(.gcc_except_table) *(.gnu.linkonce.r.*) _etext = ABSOLUTE(.); - } > flash + } > dflash .init_section : { _sinit = ABSOLUTE(.); *(.init_array .init_array.*) _einit = ABSOLUTE(.); - } > flash + } > dflash .ARM.extab : { *(.ARM.extab*) - } >flash + } >dflash .ARM.exidx : { __exidx_start = ABSOLUTE(.); *(.ARM.exidx*) __exidx_end = ABSOLUTE(.); - } >flash + } >dflash .data : { @@ -101,7 +112,7 @@ SECTIONS CONSTRUCTORS . = ALIGN(4); _edata = ABSOLUTE(.); - } > sram AT > flash + } > sram AT > dflash _eronly = LOADADDR(.data); @@ -110,7 +121,7 @@ SECTIONS _sramfuncs = ABSOLUTE(.); *(.ramfunc .ramfunc.*) _eramfuncs = ABSOLUTE(.); - } > sram AT > flash + } > sram AT > dflash _framfuncs = LOADADDR(.ramfunc); diff --git a/boards/arm/s32k1xx/s32k148evb/scripts/flash.ld b/boards/arm/s32k1xx/s32k148evb/scripts/flash.ld index 694b9ca66e..b59ab9b42b 100644 --- a/boards/arm/s32k1xx/s32k148evb/scripts/flash.ld +++ b/boards/arm/s32k1xx/s32k148evb/scripts/flash.ld @@ -46,21 +46,32 @@ MEMORY { - flash (rx) : ORIGIN = 0x00000000, LENGTH = 2M + vflash (rx) : ORIGIN = 0x00000000, LENGTH = 1K + pflash (rx) : ORIGIN = 0x00000400, LENGTH = 16 + dflash (rx) : ORIGIN = 0x00000410, LENGTH = 2047K-16 sram (rwx) : ORIGIN = 0x1fff0000, LENGTH = 252K } OUTPUT_ARCH(arm) EXTERN(_vectors) +EXTERN(g_flashcfg) ENTRY(_stext) SECTIONS { - .text : + .vectors : { _stext = ABSOLUTE(.); *(.vectors) - . = 0x0000410; /* Skip over flash configuration field */ + } > vflash + + .flashcfg : + { + *(.flashcfg) + } > pflash + + .text : + { *(.text .text.*) *(.fixup) *(.gnu.warning) @@ -72,26 +83,26 @@ SECTIONS *(.gcc_except_table) *(.gnu.linkonce.r.*) _etext = ABSOLUTE(.); - } > flash + } > dflash .init_section : { _sinit = ABSOLUTE(.); *(.init_array .init_array.*) _einit = ABSOLUTE(.); - } > flash + } > dflash .ARM.extab : { *(.ARM.extab*) - } >flash + } >dflash .ARM.exidx : { __exidx_start = ABSOLUTE(.); *(.ARM.exidx*) __exidx_end = ABSOLUTE(.); - } >flash + } >dflash .data : { @@ -101,7 +112,7 @@ SECTIONS CONSTRUCTORS . = ALIGN(4); _edata = ABSOLUTE(.); - } > sram AT > flash + } > sram AT > dflash _eronly = LOADADDR(.data); @@ -110,7 +121,7 @@ SECTIONS _sramfuncs = ABSOLUTE(.); *(.ramfunc .ramfunc.*) _eramfuncs = ABSOLUTE(.); - } > sram AT > flash + } > sram AT > dflash _framfuncs = LOADADDR(.ramfunc); diff --git a/tools/README.txt b/tools/README.txt index 1a6ce6ab97..230beac369 100644 --- a/tools/README.txt +++ b/tools/README.txt @@ -770,7 +770,7 @@ indent.sh 6. I also indent brackets differently on structures than does this script. 7. I normally use no spaces in casts. indent.sh adds spaces in casts like "(FAR void *)&foo" becomes "(FAR void *) & foo". - 7. When used with header files, the initial idempotence conditional test + 8. When used with header files, the initial idempotence conditional test causes all preprocessor directives to be indented in the file. So for header files, you will need to substitute "^# " with "#" in the converted header file.