zynq-mpsoc/zcu111: independent JTAG configs from normal nsh configs

arch/arm64/src/zynq-mpsoc/zynq_boot.c

@@ -181,9 +181,17 @@ void arm64_chip_boot(void)
 
   arm64_mmu_init(true);
 
-#if defined(CONFIG_SMP) || defined(CONFIG_ARCH_HAVE_PSCI)
+#if defined(CONFIG_ARM64_PSCI)
-  /* arm64_psci_init("smc"); */
 
+  /* Default exception level is EL1 for the NuttX OS. However, if we debug
+   * NuttX by JTAG, The XSCT of Vivado SDK will set the Zynq MPSoC
+   * to EL3. Other levels are not supported at the moment. And in this
+   * operating conditon, we can't use SMC for there's no ATF support.
+   */
+
+#if CONFIG_ARCH_ARM64_EXCEPTION_LEVEL < 3
+  arm64_psci_init("smc");
+#endif
 #endif
 
   /* Perform board-specific device initialization. This would include

boards/arm64/zynq-mpsoc/zcu111/configs/jtag/defconfig

@@ -0,0 +1,74 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_DEBUG_OPT_UNUSED_SECTIONS is not set
+CONFIG_ARCH="arm64"
+CONFIG_ARCH_ARM64=y
+CONFIG_ARCH_ARM64_EXCEPTION_LEVEL=3
+CONFIG_ARCH_BOARD="zcu111"
+CONFIG_ARCH_BOARD_ZCU111=y
+CONFIG_ARCH_CHIP="zynq-mpsoc"
+CONFIG_ARCH_CHIP_ZYNQ_MPSOC=y
+CONFIG_ARCH_EARLY_PRINT=y
+CONFIG_ARCH_INTERRUPTSTACK=4096
+CONFIG_ARM64_DCACHE_DISABLE=y
+CONFIG_ARM64_GIC_VERSION=2
+CONFIG_ARM64_ICACHE_DISABLE=y
+CONFIG_BOARD_LOOPSPERMSEC=116524
+CONFIG_BOOT_RUNFROMSDRAM=y
+CONFIG_BUILTIN=y
+CONFIG_DEBUG_ASSERTIONS=y
+CONFIG_DEBUG_FEATURES=y
+CONFIG_DEBUG_IRQ=y
+CONFIG_DEBUG_IRQ_INFO=y
+CONFIG_DEBUG_SCHED=y
+CONFIG_DEBUG_SCHED_ERROR=y
+CONFIG_DEBUG_SCHED_INFO=y
+CONFIG_DEBUG_SCHED_WARN=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_DEFAULT_TASK_STACKSIZE=8192
+CONFIG_DEV_ZERO=y
+CONFIG_ETC_ROMFS=y
+CONFIG_EXAMPLES_HELLO=y
+CONFIG_EXAMPLES_LEDS=y
+CONFIG_EXPERIMENTAL=y
+CONFIG_FRAME_POINTER=y
+CONFIG_FS_PROCFS=y
+CONFIG_FS_ROMFS=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_IDLETHREAD_STACKSIZE=8192
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INIT_STACKSIZE=9192
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_PTHREAD_STACK_MIN=8192
+CONFIG_RAMLOG=y
+CONFIG_RAM_SIZE=2145386496
+CONFIG_RAM_START=0x00100000
+CONFIG_RAW_BINARY=y
+CONFIG_READLINE_CMD_HISTORY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_BACKTRACE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SPINLOCK=y
+CONFIG_STACK_COLORATION=y
+CONFIG_START_MONTH=11
+CONFIG_START_YEAR=2022
+CONFIG_SYMTAB_ORDEREDBYNAME=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_SYSTEM_SYSTEM=y
+CONFIG_SYSTEM_TIME64=y
+CONFIG_TESTING_GETPRIME=y
+CONFIG_TESTING_OSTEST=y
+CONFIG_UART0_SERIAL_CONSOLE=y
+CONFIG_USEC_PER_TICK=1000
+CONFIG_USERLED=y

boards/arm64/zynq-mpsoc/zcu111/configs/nsh/defconfig

@@ -5,10 +5,8 @@
 # You can then do "make savedefconfig" to generate a new defconfig file that includes your
 # modifications.
 #
-# CONFIG_DEBUG_OPT_UNUSED_SECTIONS is not set
 CONFIG_ARCH="arm64"
 CONFIG_ARCH_ARM64=y
-CONFIG_ARCH_ARM64_EXCEPTION_LEVEL=3
 CONFIG_ARCH_BOARD="zcu111"
 CONFIG_ARCH_BOARD_ZCU111=y
 CONFIG_ARCH_CHIP="zynq-mpsoc"
@@ -18,11 +16,12 @@ CONFIG_ARCH_INTERRUPTSTACK=4096
 CONFIG_ARM64_DCACHE_DISABLE=y
 CONFIG_ARM64_GIC_VERSION=2
 CONFIG_ARM64_ICACHE_DISABLE=y
+CONFIG_BOARDCTL_RESET=y
 CONFIG_BOARD_LOOPSPERMSEC=116524
-CONFIG_BOOT_RUNFROMSDRAM=y
 CONFIG_BUILTIN=y
 CONFIG_DEBUG_ASSERTIONS=y
 CONFIG_DEBUG_FEATURES=y
+CONFIG_DEBUG_FULLOPT=y
 CONFIG_DEBUG_IRQ=y
 CONFIG_DEBUG_IRQ_INFO=y
 CONFIG_DEBUG_SCHED=y
@@ -51,8 +50,8 @@ CONFIG_NSH_READLINE=y
 CONFIG_PREALLOC_TIMERS=4
 CONFIG_PTHREAD_STACK_MIN=8192
 CONFIG_RAMLOG=y
-CONFIG_RAM_SIZE=2146435072
+CONFIG_RAM_SIZE=2145386496
-CONFIG_RAM_START=0x00000000
+CONFIG_RAM_START=0x00100000
 CONFIG_RAW_BINARY=y
 CONFIG_READLINE_CMD_HISTORY=y
 CONFIG_RR_INTERVAL=200

boards/arm64/zynq-mpsoc/zcu111/scripts/dramboot.ld

@@ -22,91 +22,126 @@ OUTPUT_ARCH(aarch64)
 
 ENTRY(__start)
 
+/* We don't use Uboot on Zynq UltraScale+ MPSoC besause XilinX SDK provided
+ * FSBL(First Stage Boot Loader) which will boot ATF(Trusted Firmware-A)
+ * and ATF will boot NuttX on BL31 stage. Memory is organized as follows:
+ * - ATF debug reserved area is 0x00000000 - 0x00100000
+ * - NuttX is loaded to 0x00100000 by ATF, ATF expects us here
+ * - NuttX ROM and RAM are one continuous region, starting from 0x00100000
+     with a size of 2046MB
+ * - Heap memory is allocated from dram end to idlestack top
+ */
+
+MEMORY
+{
+   axi_bram_ctrl_0_Mem0 : ORIGIN = 0xB0000000, LENGTH = 0x1000
+   psu_ddr_0_MEM_0 : ORIGIN = 0x0, LENGTH = 0x100000
+   dram (rwx) : ORIGIN = 0x00100000, LENGTH = 0x7FE00000
+   psu_ddr_1_MEM_0 : ORIGIN = 0x800000000, LENGTH = 0x80000000
+   psu_ocm_ram_0_MEM_0 : ORIGIN = 0xFFFC0000, LENGTH = 0x40000
+   psu_qspi_linear_0_MEM_0 : ORIGIN = 0xC0000000, LENGTH = 0x20000000
+}
+
 PHDRS
 {
-  text PT_LOAD ;
+  /* R = 100, W = 010, X = 001 */
+
+  text   PT_LOAD FLAGS(5); /* RX */
+  rodata PT_LOAD FLAGS(4); /* R  */
+  data   PT_LOAD FLAGS(6); /* RW */
 }
 
 SECTIONS
 {
-  . = 0x00000000;  /* U-Boot loads NuttX at this address (kernel_addr_r) */
+  .text  :
-  _start = .;
+    {
-  .text : {
+      _stext = ABSOLUTE(.);  /* Text section */
-        _stext = .;            /* Text section */
+      *(.start .start.*)     /* Place __start here */
-       *(.start .start.*)      /* Place __start here */
+      *(.text .text.*)
-       *(.text)
+      *(.text.cold)
-       *(.text.cold)
+      *(.text.unlikely)
-       *(.text.unlikely)
+      *(.fixup)
-       *(.fixup)
+      *(.gnu.warning)
-       *(.gnu.warning)
+    } > dram :text
-  } :text = 0x9090
+
+  .init_section :
+    {
+      _sinit = ABSOLUTE(.);
+      KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
+      KEEP(*(.init_array .ctors))
+      _einit = ABSOLUTE(.);
+    } > dram :text
+
+  /* Vector table must be page aligned */
+
+  .vector : ALIGN(4096)
+    {
+      _vector_start = ABSOLUTE(.);
+      KEEP(*(.exc_vector_table))
+      KEEP(*(".exc_vector_table.*"))
+      KEEP(*(.vectors))
+      _vector_end = ABSOLUTE(.);
+    } > dram :text
+
+  /* End of text data must be aligned to page boundary */
 
   . = ALIGN(4096);
-
+  _etext = .;
-  .init_section : {
-        _sinit = ABSOLUTE(.);
-        KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
-        KEEP(*(.init_array .ctors))
-        _einit = ABSOLUTE(.);
-  }
-
-  . = ALIGN(4096);
-
-  .vector : {
-        _vector_start = .;
-        KEEP(*(.exc_vector_table))
-        KEEP(*(".exc_vector_table.*"))
-        KEEP(*(.vectors))
-       _vector_end = .;
-  } :text
-  . = ALIGN(4096);
-  _etext = .; /* End_1 of .text */
   _sztext = _etext - _stext;
 
+  /* Start of RO data must be page aligned (mapped as read only) */
+
+  .rodata : ALIGN(4096)
+    {
+      _srodata = ABSOLUTE(.);          /* Read-only data */
+      *(.rodata .rodata.*)
+      *(.data.rel.ro)
+      *(.data.rel.ro.*)
+    } > dram :rodata
+
+  /* End of RO data must be page aligned */
+
   . = ALIGN(4096);
-  .rodata : {
+
-        _srodata = .;          /* Read-only data */
-       *(.rodata)
-       *(.rodata.*)
-       *(.data.rel.ro)
-       *(.data.rel.ro.*)
-  } :text
-  . = ALIGN(4096);
   _erodata = .;                /* End of read-only data */
   _szrodata = _erodata - _srodata;
   _eronly = .;  /* End of read-only data */
 
-  . = ALIGN(4096);
+  .data : ALIGN(4096)
-  .data : {                    /* Data */
+    {
-        _sdata = .;
+      _sdata = ABSOLUTE(.);
-       *(.data.page_aligned)
+      *(.data.page_aligned)
-       *(.data)
+      *(.data .data.*)
-       . = ALIGN(8);
+      . = ALIGN(8);
-       *(.data.rel)
+      *(.data.rel)
-       *(.data.rel.*)
+      *(.data.rel.*)
-       CONSTRUCTORS
+      CONSTRUCTORS
-  } :text
+      . = ALIGN(8);
-  _edata = .; /* End+1 of .data */
+      _edata = ABSOLUTE(.);
+    } > dram :data
+
+  .bss :
+    {
+      . = ALIGN(8);
+      _sbss = ABSOLUTE(.);
+      *(.bss .bss.*)
+      . = ALIGN(8);
+      _ebss = ABSOLUTE(.);
+    } > dram :data
 
-  .bss : {                     /* BSS */
-       . = ALIGN(8);
-       _sbss = .;
-       *(.bss)
-       . = ALIGN(8);
-  } :text
-  . = ALIGN(4096);
-  _ebss = .;
   _szbss = _ebss - _sbss;
 
-  .initstack : {             /* INIT STACK */
+  .initstack :
-       _s_initstack = .;
+    {
-       *(.initstack)
+      _s_initstack = ABSOLUTE(.);
-       . = ALIGN(16);
+      *(.initstack)
-  } :text
+    } > dram :data
-  . = ALIGN(4096);
-  _e_initstack = . ;
-  g_idle_topstack = . ;
 
+  /* End of data must be page aligned */
+  . = ALIGN(4096);
+
+  g_idle_topstack = .;
+  _e_initstack = .;
   _szdata = _e_initstack - _sdata;
 
   /* Sections to be discarded */

boards/arm64/zynq-mpsoc/zcu111/src/Makefile

@@ -21,7 +21,12 @@
 include $(TOPDIR)/Make.defs
 
 CSRCS = zcu111_boardinit.c
+ifeq ($(CONFIG_BOARDCTL),y)
 CSRCS += zcu111_appinit.c
+ifeq ($(CONFIG_BOARDCTL_RESET),y)
+CSRCS += zcu111_reset.c
+endif
+endif
 
 ifeq ($(CONFIG_ARCH_LEDS),y)
 CSRCS += zcu111_autoleds.c

boards/arm64/zynq-mpsoc/zcu111/src/zcu111_reset.c

@@ -0,0 +1,66 @@
+/****************************************************************************
+ * boards/arm64/zynq-mpsoc/zcu111/src/zcu111_reset.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/board.h>
+
+#ifdef CONFIG_BOARDCTL_RESET
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_reset
+ *
+ * Description:
+ *   Reset board.  Support for this function is required by board-level
+ *   logic if CONFIG_BOARDCTL_RESET is selected.
+ *
+ * Input Parameters:
+ *   status - Status information provided with the reset event.  This
+ *            meaning of this status information is board-specific.  If not
+ *            used by a board, the value zero may be provided in calls to
+ *            board_reset().
+ *
+ * Returned Value:
+ *   If this function returns, then it was not possible to power-off the
+ *   board due to some constraints.  The return value int this case is a
+ *   board-specific reason for the failure to shutdown.
+ *
+ ****************************************************************************/
+
+int board_reset(int status)
+{
+  up_systemreset();
+  return 0;
+}
+
+#endif /* CONFIG_BOARDCTL_RESET */