Merged in david_s5/nuttx/upstream_irqfixes (pull request #227)
STM32 irqfixes found in build testing Approved-by: Gregory Nutt
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commit
d75dfcfb4b
@ -418,7 +418,7 @@ static void stm32_endtransfer(struct stm32_dev_s *priv, sdio_eventset_t wkupeven
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static int stm32_interrupt(int irq, void *context, FAR void *arg);
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#ifdef CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE
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static int stm32_rdyinterrupt(int irq, void *context);
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static int stm32_rdyinterrupt(int irq, void *context, FAR void *arg);
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#endif
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/* SDIO interface methods ***************************************************/
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@ -668,14 +668,14 @@ static void stm32_configwaitints(struct stm32_dev_s *priv, uint32_t waitmask,
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/* Arm the SDIO_D Ready and install Isr */
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stm32_gpiosetevent(pinset, true, false, false, stm32_rdyinterrupt);
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stm32_gpiosetevent(pinset, true, false, false, stm32_rdyinterrupt, priv);
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}
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/* Disarm SDIO_D ready */
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if ((wkupevent & SDIOWAIT_WRCOMPLETE) != 0)
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{
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stm32_gpiosetevent(GPIO_SDIO_D0, false, false, false , NULL);
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stm32_gpiosetevent(GPIO_SDIO_D0, false, false, false , NULL, NULL);
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stm32_configgpio(GPIO_SDIO_D0);
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}
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#endif
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@ -1315,9 +1315,9 @@ static void stm32_endtransfer(struct stm32_dev_s *priv, sdio_eventset_t wkupeven
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****************************************************************************/
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#ifdef CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE
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static int stm32_rdyinterrupt(int irq, void *context)
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static int stm32_rdyinterrupt(int irq, void *context, FAR void *arg)
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{
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struct stm32_dev_s *priv = &g_sdiodev;
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struct stm32_dev_s *priv = (struct stm32_dev_s *) arg;
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stm32_endwait(priv, SDIOWAIT_WRCOMPLETE);
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return OK;
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}
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@ -305,7 +305,7 @@ static int stm32_interrupt(int irq, FAR void *context, FAR void *arg)
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* upon return.
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*/
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priv->handler(irq, context);
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priv->handler(irq, context, arg);
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}
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/* The EWI interrupt is cleared by writing '0' to the EWIF bit in the
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@ -780,7 +780,7 @@ void stm32_wwdginitialize(FAR const char *devpath)
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(void)watchdog_register(devpath, (FAR struct watchdog_lowerhalf_s *)priv);
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/* When the microcontroller enters debug mode (Cortex™-M4F core halted),
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/* When the microcontroller enters debug mode (Cortex<EFBFBD>-M4F core halted),
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* the WWDG counter either continues to work normally or stops, depending
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* on DBG_WWDG_STOP configuration bit in DBG module.
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*/
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