sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

VSN/apps update

Browse Source 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3378 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2011-03-14 14:14:54 +00:00
parent 062a5d5541
commit d77b028338
10 changed files with 450 additions and 287 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

31
configs/vsn/include/board.h
View File

@ -1,5 +1,5 @@
/************************************************************************************
* configs/vsn-1.2/include/board.h
* configs/vsn/include/board.h
* include/arch/board/board.h
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
@ -183,11 +183,12 @@ extern "C" {
#endif
/************************************************************************************
* Public Function Prototypes
* Board Clock Configuration, called immediatelly after boot
************************************************************************************/
EXTERN void stm32_board_clockconfig(void);
/************************************************************************************
* Name: stm32_boardinitialize
*
@ -200,15 +201,9 @@ extern "C" {
EXTERN void stm32_boardinitialize(void);
/************************************************************************************
* Button support.
*
* Description:
* up_buttoninit() must be called to initialize button resources. After that,
* up_buttons() may be called to collect the state of all buttons. up_buttons()
* returns an 8-bit bit set with each bit associated with a button. See the
* BUTTON_* and JOYSTICK_* definitions above for the meaning of each bit.
*
* Button support. (TODO: button is not yet supported)
************************************************************************************/
#ifdef CONFIG_ARCH_BUTTONS
@ -216,11 +211,25 @@ EXTERN void up_buttoninit(void);
EXTERN uint8_t up_buttons(void);
#endif
/* Other peripherals startup routines, all returning OK on success */
/************************************************************************************
* Memories
* - SDcard is tested to work up to 2 GB
* - RAMTRON has size of 128 kB
************************************************************************************/
EXTERN int up_sdcard(void);
EXTERN int up_ramtron(void);
/************************************************************************************
* Public Power Supply Contol
************************************************************************************/
void board_power_reboot(void);
void board_power_off(void);
#undef EXTERN
#if defined(__cplusplus)
}

71
configs/vsn/include/power.h Normal file
View File

@ -0,0 +1,71 @@
/************************************************************************************
* configs/vsn/include/power.h
* include/arch/board/power.h
*
* Copyright (C) 2011 Uros Platise. All rights reserved
*
* Authors: Uros Platise <uros.platise@isotel.eu>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_BOARD_POWER_H
#define __ARCH_BOARD_POWER_H
/************************************************************************************
* Included Files
************************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/************************************************************************************
* Public Power Supply Contol
************************************************************************************/
void board_power_reboot(void);
/* If this function returns, it means, that it was not possible to power-off the board */
void board_power_off(void);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_BOARD_POWER_H */

43
configs/vsn/nsh/defconfig
View File

@ -818,32 +818,47 @@ CONFIG_HEAP_BASE=
CONFIG_HEAP_SIZE=
########################################################################
# STM32 JTAG Options
#
# Full JTAG Enable (Parallel and Serial)
CONFIG_STM32_JTAG_FULL_ENABLE=n
# Full but without the JNTRST pin
CONFIG_STM32_JTAG_NOJNTRST_ENABLE=n
# Serial (SWJ) dual pin only which, can coexist besides the FRAM on SPI3
CONFIG_STM32_JTAG_SW_ENABLE=n
########################################################################
#
# Applications to be included within the NuttX binary as described
# under the apps/README.txt
# under the ../apps/README.txt
#
# Set this config parameter above to: CONFIG_TASK_NAME_SIZE=16
# in order to enable argv[0]=<task name> argument. Otherwise argv[0]
# will be noname.
# Set thi config parameter above to: CONFIG_TASK_NAME_SIZE=16
# In order to enable argv[0]=<task name> argument set the option
# CONFIG_TASK_NAME_SIZE=16
#
# Include builtin NuttX application (disabling this option will
# exclude all of the apps found under the nuttx/apps directory, but
# not the apps found under the ../apps directory unless _APPS_USER=n.
# Include builtin NuttX applications (general option)
CONFIG_BUILTIN_APPS_NUTTX=y
# Invoke the following application after NuttX starts
#CONFIG_BUILTIN_APP_START="hello"
# Individual selection of built-in applications:
# Hello world provide a simple skeleton/demo application
CONFIG_BUILTIN_APPS_HELLO=y
# Include user (external) applications located under ../apps directory?
CONFIG_BUILTIN_APPS_USER=y
# Provide poweroff command to switch off the board
CONFIG_BUILTIN_APPS_POWEROFF=y
# Invoke the following application after NuttX starts
# (enter app name, as: hello)
CONFIG_BUILTIN_APP_START=
# Provide JAVA Virtual Machine (the Darjeeling JVM)
CONFIG_BUILTIN_APPS_JVM=n
# CONFIG_EXAMPLES_NSH_BUILTIN_APPS - Support for running the builtin
# apps from command line. See apps/README for more information.
# CONFIG_EXAMPLES_NSH_BUILTIN_APPS - Enable invocation of all builtin
# apps from nsh command line. See apps/README for more information.
#
CONFIG_EXAMPLES_NSH_BUILTIN_APPS=y
CONFIG_SCHED_WAITPID=y

10
configs/vsn/src/README.txt
View File

@ -10,3 +10,13 @@ Execution starts in the following order:
- boot, performs initial chip and board initialization
- ...
- nsh, as central application last.
JTAG options:
=============
CONFIG_STM32_JTAG_FULL_ENABLE // Complete parallel and serial
CONFIG_STM32_JTAG_NOJNTRST_ENABLE // no JNTRST pin
CONFIG_STM32_JTAG_SW_ENABLE // serial (dual pin) only (can coexist besides the FRAM on SPI3)

12
configs/vsn/src/boot.c
View File

@ -75,17 +75,9 @@
void stm32_boardinitialize(void)
{
#ifdef CONFIG_STM32_SPI3
#warning JTAG Port Disabled as SPI3 NVRAM/FRAM support is enabled
/* Set start-up board voltage */
uint32_t val = getreg32(STM32_AFIO_MAPR);
val &= 0x00FFFFFF; // clear undefined readings ...
val |= AFIO_MAPR_DISAB; // set JTAG-DP and SW-DP Disabled
putreg32(val, STM32_AFIO_MAPR);
#endif
// Set Board Voltage to 3.3 V
board_power_setbootvoltage();
board_power_init();
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
* stm32_spiinitialize() has been brought into the link.

18
configs/vsn/src/leds.c
View File

@ -43,13 +43,17 @@
#include <nuttx/config.h>
#include <arch/board/board.h>
#include <arch/stm32/irq.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "vsn.h"
/****************************************************************************
* Definitions
****************************************************************************/
@ -73,6 +77,8 @@
* Private Data
****************************************************************************/
irqstate_t irqidle_mask;
/****************************************************************************
* Private Functions
****************************************************************************/
@ -101,7 +107,10 @@ void up_ledinit(void)
void up_ledon(int led)
{
if (led==LED_IDLE) stm32_gpiowrite(GPIO_LED, true);
if (led==LED_IDLE) {
irqidle_mask = irqsave();
stm32_gpiowrite(GPIO_LED, true);
}
}
/****************************************************************************
@ -110,7 +119,10 @@ void up_ledon(int led)
void up_ledoff(int led)
{
if (led==LED_IDLE) stm32_gpiowrite(GPIO_LED, false);
if (led==LED_IDLE) {
stm32_gpiowrite(GPIO_LED, false);
irqrestore(irqidle_mask);
}
}
#endif /* CONFIG_ARCH_LEDS */

48
configs/vsn/src/power.c
View File

@ -1,6 +1,6 @@
/****************************************************************************
* config/vsn/src/ramtron.c
* arch/arm/src/board/ramtron.c
* config/vsn/src/power.c
* arch/arm/src/board/power.c
*
* Copyright (C) 2011 Uros Platise. All rights reserved.
*
@ -37,21 +37,57 @@
#include <nuttx/config.h>
#include <arch/board/board.h>
#include <arch/stm32/irq.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <arch/board/board.h>
#include "stm32_gpio.h"
#include "vsn.h"
#include "up_arch.h"
void board_power_register(void);
void board_power_adjust(void);
void board_power_status(void);
void board_power_setbootvoltage(void)
void board_power_init(void)
{
stm32_configgpio(GPIO_PVS);
stm32_configgpio(GPIO_PST);
stm32_configgpio(GPIO_XPWR);
stm32_configgpio(GPIO_SCTC);
stm32_configgpio(GPIO_PCLR);
}
void board_power_reboot(void);
void board_power_off(void);
void board_power_reboot(void)
{
// low-level board reset (not just MCU reset)
// if external power is present, stimulate power-off as board
// will wake-up immediatelly, if power is not present, set an alarm
// before power off the board.
}
void board_power_off(void)
{
// Check if external supply is not present, otherwise return
// notifying that it is not possible to power-off the board
// \todo
// stop backgorund processes
irqsave();
// switch to internal HSI and get the PD0 and PD1 as GPIO
stm32_board_select_hsi();
// trigger shutdown with pull-up resistor (not push-pull!) and wait.
stm32_gpiowrite(GPIO_PCLR, true);
for(;;);
}

7
configs/vsn/src/ramtron.c
View File

@ -62,6 +62,11 @@ int up_ramtron(void)
/* Get the SPI port */
#if defined(CONFIG_STM32_JTAG_FULL_ENABLE) || defined(CONFIG_STM32_JTAG_NOJNTRST_ENABLE)
message("RAMTRON: Cannot open SPI3 port as JTAG is enabled. Switch to Serial JTAG mode.\n");
return -ENODEV;
#endif
spi = up_spiinitialize(3);
if (!spi)
{
@ -70,7 +75,7 @@ int up_ramtron(void)
}
message("RAMTRON: Initialized SPI3\n");
mtd = ramtron_initialize(spi);
mtd = (struct mtd_dev_s *)ramtron_initialize(spi);
if (!mtd)
{
message("RAMTRON: Device not found\n");

13
configs/vsn/src/sysclock.c
View File

@ -39,6 +39,7 @@
#include <arch/board/board.h>
#include "stm32_rcc.h"
#include "stm32_gpio.h"
#include "stm32_flash.h"
#include "up_internal.h"
#include "up_arch.h"
@ -123,6 +124,11 @@ void stm32_board_select_hsi(void)
// Wait until the selected source is used as the system clock source
while ((getreg32(STM32_RCC_CFGR) & RCC_CFGR_SWS_MASK) != STM32_SYSCLK_SWS);
// map port PD0 and PD1 on OSC pins
regval = getreg32(STM32_AFIO_MAPR);
regval |= AFIO_MAPR_PD01_REMAP;
putreg32(regval, STM32_AFIO_MAPR);
}
@ -140,6 +146,13 @@ void stm32_board_select_hsi(void)
*/
int stm32_board_select_hse(void)
{
uint32_t regval;
// be sure to release PD0 and PD1 pins from the OSC pins
regval = getreg32(STM32_AFIO_MAPR);
regval &= ~AFIO_MAPR_PD01_REMAP;
putreg32(regval, STM32_AFIO_MAPR);
// if (is cc1101 9 MHz clock output enabled), otherwise return with -1
// I think that clock register provides HSE valid signal to detect that as well.

22
configs/vsn/src/vsn.h
View File

@ -38,7 +38,7 @@
************************************************************************************/
#ifndef __CONFIGS_VSN_1_2_SRC_VSN_INTERNAL_H
#define __CONFIGS_VSN_1_2_SRC_VSN_INTERNAL_H
#define __CONFIGS_VSN_SRC_VSN_INTERNAL_H
/************************************************************************************
* Included Files
@ -55,7 +55,7 @@
/* LED */
#define GPIO_LED (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN2)
#define GPIO_LED (GPIO_OUTPUT|GPIO_CNF_OUTPP |GPIO_MODE_2MHz |GPIO_PORTB|GPIO_PIN2 |GPIO_OUTPUT_CLEAR)
/* BUTTON - Note that after a good second button causes hardware reset */
@ -63,11 +63,15 @@
/* Power Management Pins */
#define GPIO_PVS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN7)
#define GPIO_PVS (GPIO_OUTPUT|GPIO_CNF_OUTPP |GPIO_MODE_2MHz |GPIO_PORTC|GPIO_PIN7 |GPIO_OUTPUT_CLEAR)
#define GPIO_PST (GPIO_INPUT |GPIO_CNF_INPULLDWN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN13)
#define GPIO_SCTC (GPIO_INPUT |GPIO_CNF_INPULLDWN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN8 )
#define GPIO_PCLR (GPIO_INPUT |GPIO_CNF_INPULLDWN|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN1 ) // by default this pin is OSCOUT, requires REMAP
#define GPIO_XPWR (GPIO_INPUT |GPIO_CNF_INFLOAT |GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN4 )
/* FRAM */
#define GPIO_FRAM_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN15)
#define GPIO_FRAM_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP |GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN15|GPIO_OUTPUT_SET)
/* Debug ********************************************************************/
@ -123,16 +127,12 @@ extern void weak_function stm32_usbinitialize(void);
/************************************************************************************
* Power Module
*
* Description:
* - Provides power related board operations, such as voltage selection,
* proper reboot sequence, and power-off
* Init Power Module and set board system voltage
************************************************************************************/
extern void board_power_setbootvoltage(void); // Default voltage at boot time
extern void board_power_init(void);
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_VSN_1_2_SRC_VSN_INTERNAL_H */
#endif /* __CONFIGS_VSN_SRC_VSN_INTERNAL_H */