Implement irqsave/restore
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@747 42af7a65-404d-4744-a932-0658087f49c3
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@ -81,10 +81,10 @@ typedef long sint32;
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typedef unsigned long uint32;
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typedef unsigned long uint32;
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/* This is the size of the interrupt state save returned by irqsave().
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/* This is the size of the interrupt state save returned by irqsave().
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* It holds the contents of the interrupt vector address
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* It holds the AF regiser pair + a zero pad byte
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*/
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*/
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typedef ubyte irqstate_t;
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typedef uint24 irqstate_t;
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#endif /* __ASSEMBLY__ */
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#endif /* __ASSEMBLY__ */
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@ -43,7 +43,8 @@ CMN_CSRCS = up_initialize.c up_allocateheap.c up_createstack.c \
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up_reprioritizertr.c up_idle.c up_assert.c up_doirq.c \
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up_reprioritizertr.c up_idle.c up_assert.c up_doirq.c \
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up_mdelay.c up_udelay.c up_usestack.c
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up_mdelay.c up_udelay.c up_usestack.c
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CHIP_ASRCS = ez80_startup.asm ez80_saveusercontext.asm ez80_restorecontext.asm
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CHIP_ASRCS = ez80_startup.asm ez80_irqsave.asm \
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ez80_saveusercontext.asm ez80_restorecontext.asm
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ifeq ($(CONFIG_ARCH_CHIP_EZ80F91),y)
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ifeq ($(CONFIG_ARCH_CHIP_EZ80F91),y)
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CHIP_ASRCS += ez80f91_init.asm
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CHIP_ASRCS += ez80f91_init.asm
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endif
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endif
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@ -78,30 +78,13 @@ chipreg_t *current_regs;
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void up_irqinitialize(void)
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void up_irqinitialize(void)
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{
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{
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}
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current_regs = NULL;
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/* And finally, enable interrupts */
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/****************************************************************************
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#ifndef CONFIG_SUPPRESS_INTERRUPTS
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* Name: irqsave
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asm("ei");
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*
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#endif
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* Description:
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* Disable all interrupts; return previous interrupt state
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*
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****************************************************************************/
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irqstate_t irqsave(void)
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{
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}
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/****************************************************************************
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* Name: irqrestore
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*
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* Description:
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* Restore previous interrupt state
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*
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****************************************************************************/
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void irqrestore(irqstate_t flags)
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{
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}
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}
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/****************************************************************************
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/****************************************************************************
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88
arch/z80/src/ez80/ez80_irqsave.asm
Normal file
88
arch/z80/src/ez80/ez80_irqsave.asm
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@ -0,0 +1,88 @@
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;**************************************************************************
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; arch/z80/src/ez80/ez80_irqsave.asm
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;
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; Copyright (C) 2008 Gregory Nutt. All rights reserved.
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; Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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; are met:
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;
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; 1. Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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; 2. Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in
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; the documentation and/or other materials provided with the
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; distribution.
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; 3. Neither the name NuttX nor the names of its contributors may be
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; used to endorse or promote products derived from this software
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; without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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; POSSIBILITY OF SUCH DAMAGE.
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;
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;**************************************************************************
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;**************************************************************************
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; Global Symbols Imported
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;**************************************************************************
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;**************************************************************************
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; Global Symbols Expported
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;**************************************************************************
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xdef _irqsave
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xdef _irqrestore
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;**************************************************************************
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; Code
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;**************************************************************************
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segment CODE
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.assume ADL=1
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;****************************************************************************
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;* Name: irqstate_t irqsave(void)
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;*
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;* Description:
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;* Disable all interrupts; return previous interrupt state
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;*
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;****************************************************************************
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_irqsave:
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ld a, i ; AF = interrupt state
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di ; Interrupts are disabled (does not affect F)
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push af ; Transfer to HL via the stack
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pop hl ;
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ret ; And return
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;****************************************************************************
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;* Name: void irqrestore(irqstate_t flags)
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;*
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;* Description:
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;* Restore previous interrupt state
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;*
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;****************************************************************************
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_irqrestore:
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di ; Assume disabled
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pop hl ; HL = return address
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pop af ; AF Parity bit holds interrupt state
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jp po, _disabled ; Skip over re-enable if Parity odd
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ei ; Re-enable interrupts
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_disabled:
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push af ; Restore stack
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push hl ;
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ret ; and return
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end
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@ -81,20 +81,6 @@ irqhandler: macro vectno
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jp _ez80_rstcommon ; Remaining RST handling is common
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jp _ez80_rstcommon ; Remaining RST handling is common
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endmac irqhandler
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endmac irqhandler
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; Save Interrupt State
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irqsave: macro
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ld a, i ; sets parity bit to value of IEF2
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push af
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di ; disable interrupts while loading table
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endmac irqsave
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; Restore Interrupt State
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irqrestore: macro
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pop af
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jp po, $+5 ; parity bit is IEF2
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ei
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endmac irqrestore
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;**************************************************************************
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;**************************************************************************
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; Reset entry points
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; Reset entry points
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;**************************************************************************
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;**************************************************************************
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