arch/stm32/stm32_adc.c: cosmetics

This commit is contained in:
raiden00pl 2022-08-17 14:22:18 +02:00 committed by Xiang Xiao
parent b01ea50e44
commit d7e2704dff

View File

@ -45,7 +45,8 @@
#include "arm_internal.h"
#include "chip.h"
#include "stm32.h"
#include "stm32_rcc.h"
#include "stm32_tim.h"
#include "stm32_dma.h"
#include "stm32_adc.h"
@ -67,11 +68,6 @@
#ifdef CONFIG_STM32_ADC
/* Some ADC peripheral must be enabled */
#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || \
defined(CONFIG_STM32_ADC3) || defined(CONFIG_STM32_ADC4)
/* This implementation is for the STM32 ADC IP version 1 and 2 */
#if !defined(HAVE_IP_ADC_V1) && !defined(HAVE_IP_ADC_V2)
@ -1832,7 +1828,7 @@ static int adccmn_lock(struct stm32_dev_s *priv, bool lock)
* reset values. It could set all the ADCs configured.
*
* Input Parameters:
* regaddr - The register to read
* priv - A reference to the ADC block status
* reset - Condition, set or reset
*
* Returned Value:
@ -2516,7 +2512,7 @@ static void adc_voltreg_cfg(struct stm32_dev_s *priv)
#endif
/****************************************************************************
* Name: adc_voltreg_cfg
* Name: adc_sampletime_cfg
****************************************************************************/
static void adc_sampletime_cfg(struct adc_dev_s *dev)
@ -3233,8 +3229,8 @@ static int adc_extcfg_set(struct stm32_dev_s *priv, uint32_t extcfg)
/* Get EXTEN and EXTSEL from input */
exten = (extcfg & ADC_EXTREG_EXTEN_MASK);
extsel = (extcfg & ADC_EXTREG_EXTSEL_MASK);
exten = extcfg & ADC_EXTREG_EXTEN_MASK;
extsel = extcfg & ADC_EXTREG_EXTSEL_MASK;
/* EXTSEL selection: These bits select the external event used
* to trigger the start of conversion of a regular group. NOTE:
@ -3246,8 +3242,8 @@ static int adc_extcfg_set(struct stm32_dev_s *priv, uint32_t extcfg)
if (exten > 0)
{
setbits = (extsel | exten);
clrbits = (ADC_EXTREG_EXTEN_MASK | ADC_EXTREG_EXTSEL_MASK);
setbits = extsel | exten;
clrbits = ADC_EXTREG_EXTEN_MASK | ADC_EXTREG_EXTSEL_MASK;
ainfo("Initializing extsel = 0x%08" PRIx32 "\n", extsel);
@ -3274,8 +3270,8 @@ static int adc_jextcfg_set(struct stm32_dev_s *priv, uint32_t jextcfg)
/* Get JEXTEN and JEXTSEL from input */
jexten = (jextcfg & ADC_JEXTREG_JEXTEN_MASK);
jextsel = (jextcfg & ADC_JEXTREG_JEXTSEL_MASK);
jexten = jextcfg & ADC_JEXTREG_JEXTEN_MASK;
jextsel = jextcfg & ADC_JEXTREG_JEXTSEL_MASK;
/* JEXTSEL selection: These bits select the external event used
* to trigger the start of conversion of a injected group. NOTE:
@ -3287,8 +3283,8 @@ static int adc_jextcfg_set(struct stm32_dev_s *priv, uint32_t jextcfg)
if (jexten > 0)
{
setbits = (jexten | jextsel);
clrbits = (ADC_JEXTREG_JEXTEN_MASK | ADC_JEXTREG_JEXTSEL_MASK);
setbits = jexten | jextsel;
clrbits = ADC_JEXTREG_JEXTEN_MASK | ADC_JEXTREG_JEXTSEL_MASK;
ainfo("Initializing jextsel = 0x%08" PRIx32 "\n", jextsel);
@ -3721,7 +3717,7 @@ static int adc_set_ch(struct adc_dev_s *dev, uint8_t ch)
return -ENODEV;
}
priv->current = i;
priv->current = i;
priv->rnchannels = 1;
}
@ -4557,9 +4553,8 @@ static void adc_sampletime_write(struct stm32_adc_dev_s *dev)
* either for every channels or for only some predefined by user channel(s)
*
* Input Parameters:
* priv - pointer to the adc device structure
* pdi_high - true: The ADC is powered down when waiting for a start event
* false: The ADC is powered up when waiting for a start event
* dev - pointer to the adc device structure
* time_samples - pointe to the adc sample time configuration data
*
* Returned Value:
* None
@ -4758,6 +4753,10 @@ struct adc_dev_s *stm32_adcinitialize(int intf, const uint8_t *chanlist,
/* Configure regular channels */
DEBUGASSERT(cr_channels <= CONFIG_STM32_ADC_MAX_SAMPLES);
if (cr_channels > CONFIG_STM32_ADC_MAX_SAMPLES)
{
cr_channels = CONFIG_STM32_ADC_MAX_SAMPLES;
}
priv->cr_channels = cr_channels;
memcpy(priv->r_chanlist, chanlist, cr_channels);
@ -4766,6 +4765,10 @@ struct adc_dev_s *stm32_adcinitialize(int intf, const uint8_t *chanlist,
/* Configure injected channels */
DEBUGASSERT(cj_channels <= ADC_INJ_MAX_SAMPLES);
if (cj_channels > ADC_INJ_MAX_SAMPLES)
{
cj_channels = ADC_INJ_MAX_SAMPLES;
}
priv->cj_channels = cj_channels;
memcpy(priv->j_chanlist, j_chanlist, cj_channels);
@ -4808,7 +4811,4 @@ struct adc_dev_s *stm32_adcinitialize(int intf, const uint8_t *chanlist,
return dev;
}
#endif /* CONFIG_STM32_ADC1 || CONFIG_STM32_ADC2 ||
* CONFIG_STM32_ADC3 || CONFIG_STM32_ADC4
*/
#endif /* CONFIG_STM32_ADC */