boards/arm/s32k1xx/s32k146evb/scripts/s32k146.cfg and boards/arm/s32k1xx/s32k146evb/README.txt: Added configuration script and instructions for using Thread-Aware OpenOCD for the S32K146 with Eclipse.

boards/arm/s32k1xx/s32k146evb/README.txt

@@ -10,6 +10,7 @@ Contents
   o Serial Console
   o LEDs and Buttons
   o OpenSDA Notes
+  o Thread-Aware Debugging with Eclipse
   o Configurations
 
 Status
@@ -108,6 +109,29 @@ OpenSDA Notes
     in the center of the board and not the OpenSDA connector closer to the
     OpenSDA USB connector J7.
 
+Thread-Aware Debugging with Eclipse
+===================================
+
+  Based on correspondence with Han Raaijmakers <han.raaijmakers@nxp.com>
+
+  OpenOCD-nuttx build on Linux (NXW00504) making use of S32DS for ARM 2018R1. Nuttx is built with debug symbols.
+
+  Resulting debug window gives nuttx threads.  The full stack details can be viewed.
+
+  HOW TO GET THERE:
+
+  First we build openocd as described in:
+    https://micro-ros.github.io/docs/tutorials/advanced/debugging_gdb_openocd/
+
+  The nuttx parameters where exactly the same as found on this page
+
+  I've added a s32k146.cfg file in the scripts/ folder
+
+  Start openocd with following command (adapt the path info)
+
+    /usr/local/bin/openocd -f /usr/share/openocd/scripts/interface/jlink.cfg \
+    -f /home/han/data1Ta/s32k146/openocd-nuttx/tcl/target/s32k146.cfg -c init -c "reset halt"
+
 Configurations
 ==============
 

boards/arm/s32k1xx/s32k146evb/scripts/s32k146.cfg

@@ -0,0 +1,58 @@
+#
+# NXP S32K146 - 1x ARM Cortex-M4 @ up to 180 MHz
+#
+
+adapter_khz 4000
+transport select swd
+
+if { [info exists CHIPNAME] } {
+	set _CHIPNAME $CHIPNAME
+} else {
+	set _CHIPNAME s32k146
+}
+
+#
+# M4 JTAG mode TAP
+#
+if { [info exists M4_JTAG_TAPID] } {
+	set _M4_JTAG_TAPID $M4_JTAG_TAPID
+} else {
+	set _M4_JTAG_TAPID 0x4ba00477
+}
+
+#
+# M4 SWD mode TAP
+#
+if { [info exists M4_SWD_TAPID] } {
+	set _M4_SWD_TAPID $M4_SWD_TAPID
+} else {
+	set _M4_SWD_TAPID 0x2ba01477
+}
+
+source [find target/swj-dp.tcl]
+
+if { [using_jtag] } {
+	set _M4_TAPID $_M4_JTAG_TAPID
+} else {
+	set _M4_TAPID $_M4_SWD_TAPID
+}
+
+swj_newdap $_CHIPNAME m4 -irlen 4 -ircapture 0x1 -irmask 0xf \
+				-expected-id $_M4_TAPID
+
+target create $_CHIPNAME.m4 cortex_m -chain-position $_CHIPNAME.m4
+
+# S32K146 has 64+60 KB contiguous SRAM
+if { [info exists WORKAREASIZE] } {
+	set _WORKAREASIZE $WORKAREASIZE
+} else {
+	set _WORKAREASIZE 0x1F000
+}
+$_CHIPNAME.m4 configure -work-area-phys 0x1FFF0000 \
+                        -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+$_CHIPNAME.m4 configure -rtos nuttx
+
+if { ![using_hla] } {
+	cortex_m reset_config vectreset
+}