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armv7-r/armv7-m: Convert *err() to either *info() or add ERROR:, depending on if an error is reported

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This commit is contained in:
Gregory Nutt 2016-06-17 15:57:52 -06:00
parent ac18dc27ca
commit d88bbaa185
16 changed files with 116 additions and 138 deletions
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10
arch/arm/src/armv7-m/mpu.h
View File

@ -219,13 +219,13 @@ uint32_t mpu_subregion(uintptr_t base, size_t size, uint8_t l2size);
static inline void mpu_showtype(void)
{
#ifdef CONFIG_DEBUG_ERROR
#ifdef CONFIG_DEBUG_SCHED_INFO
uint32_t regval = getreg32(MPU_TYPE);
_err("%s MPU Regions: data=%d instr=%d\n",
(regval & MPU_TYPE_SEPARATE) != 0 ? "Separate" : "Unified",
(regval & MPU_TYPE_DREGION_MASK) >> MPU_TYPE_DREGION_SHIFT,
(regval & MPU_TYPE_IREGION_MASK) >> MPU_TYPE_IREGION_SHIFT);
sinfo("%s MPU Regions: data=%d instr=%d\n",
(regval & MPU_TYPE_SEPARATE) != 0 ? "Separate" : "Unified",
(regval & MPU_TYPE_DREGION_MASK) >> MPU_TYPE_DREGION_SHIFT,
(regval & MPU_TYPE_IREGION_MASK) >> MPU_TYPE_IREGION_SHIFT);
#endif
}

16
arch/arm/src/armv7-m/up_elf.c
View File

@ -82,7 +82,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
berr("ERROR: Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@ -90,7 +90,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
berr("ERROR: Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@ -102,7 +102,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
berr("ERROR: Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@ -177,7 +177,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
berr("ERROR: ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@ -298,7 +298,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC && (offset & 1) == 0)
{
berr(" ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
berr("ERROR: ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@ -308,7 +308,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
if (offset <= (int32_t)0xff000000 || offset >= (int32_t)0x01000000)
{
berr(" ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
berr("ERROR: ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@ -461,7 +461,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
break;
default:
berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
berr("ERROR: Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@ -471,7 +471,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
berr("RELA relocation not supported\n");
berr("ERROR: RELA relocation not supported\n");
return -ENOSYS;
}

70
arch/arm/src/armv7-m/up_hardfault.c
View File

@ -60,25 +60,13 @@
*/
#ifdef CONFIG_DEBUG_HARDFAULT
# define hferr(format, ...) _llerr(format, ##__VA_ARGS__)
# define hfalert(format, ...) _alert(format, ##__VA_ARGS__)
#else
# define hferr(x...)
# define hfalert(x...)
#endif
#define INSN_SVC0 0xdf00 /* insn: svc 0 */
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
@ -127,7 +115,7 @@ int up_hardfault(int irq, FAR void *context)
/* Fetch the instruction that caused the Hard fault */
uint16_t insn = *pc;
hferr(" PC: %p INSN: %04x\n", pc, insn);
hfalert(" PC: %p INSN: %04x\n", pc, insn);
/* If this was the instruction 'svc 0', then forward processing
* to the SVCall handler
@ -135,7 +123,7 @@ int up_hardfault(int irq, FAR void *context)
if (insn == INSN_SVC0)
{
hferr("Forward SVCall\n");
hfalert("Forward SVCall\n");
return up_svcall(irq, context);
}
}
@ -143,43 +131,43 @@ int up_hardfault(int irq, FAR void *context)
/* Dump some hard fault info */
hferr("Hard Fault:\n");
hferr(" IRQ: %d regs: %p\n", irq, regs);
hferr(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
getbasepri(), getprimask(), getipsr(), getcontrol());
hferr(" CFAULTS: %08x HFAULTS: %08x DFAULTS: %08x BFAULTADDR: %08x AFAULTS: %08x\n",
getreg32(NVIC_CFAULTS), getreg32(NVIC_HFAULTS),
getreg32(NVIC_DFAULTS), getreg32(NVIC_BFAULT_ADDR),
getreg32(NVIC_AFAULTS));
hferr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
hferr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
hfalert("Hard Fault:\n");
hfalert(" IRQ: %d regs: %p\n", irq, regs);
hfalert(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
getbasepri(), getprimask(), getipsr(), getcontrol());
hfalert(" CFAULTS: %08x HFAULTS: %08x DFAULTS: %08x BFAULTADDR: %08x AFAULTS: %08x\n",
getreg32(NVIC_CFAULTS), getreg32(NVIC_HFAULTS),
getreg32(NVIC_DFAULTS), getreg32(NVIC_BFAULT_ADDR),
getreg32(NVIC_AFAULTS));
hfalert(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
hfalert(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
#ifdef CONFIG_ARMV7M_USEBASEPRI
# ifdef REG_EXC_RETURN
hferr(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
CURRENT_REGS[REG_EXC_RETURN]);
hfalert(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
CURRENT_REGS[REG_EXC_RETURN]);
# else
hferr(" xPSR: %08x BASEPRI: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI]);
hfalert(" xPSR: %08x BASEPRI: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI]);
# endif
#else
# ifdef REG_EXC_RETURN
hferr(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
hfalert(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
# else
hferr(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
hfalert(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
# endif
#endif
(void)up_irq_save();
_llerr("PANIC!!! Hard fault: %08x\n", getreg32(NVIC_HFAULTS));
_alert("PANIC!!! Hard fault: %08x\n", getreg32(NVIC_HFAULTS));
PANIC();
return OK;
}

58
arch/arm/src/armv7-m/up_memfault.c
View File

@ -55,23 +55,13 @@
#undef DEBUG_MEMFAULTS /* Define to debug memory management faults */
#ifdef DEBUG_MEMFAULTS
# define mferr(format, ...) _llerr(format, ##__VA_ARGS__)
# define mferr(format, ...) _alert(format, ##__VA_ARGS__)
# define mfinfo(format, ...) _alert(format, ##__VA_ARGS__)
#else
# define mferr(x...)
# define mfinfo(x...)
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
@ -92,36 +82,36 @@ int up_memfault(int irq, FAR void *context)
/* Dump some memory management fault info */
(void)up_irq_save();
_llerr("PANIC!!! Memory Management Fault:\n");
mferr(" IRQ: %d context: %p\n", irq, regs);
_llerr(" CFAULTS: %08x MMFAR: %08x\n",
_alert("PANIC!!! Memory Management Fault:\n");
mfinfo(" IRQ: %d context: %p\n", irq, regs);
_alert(" CFAULTS: %08x MMFAR: %08x\n",
getreg32(NVIC_CFAULTS), getreg32(NVIC_MEMMANAGE_ADDR));
mferr(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
getbasepri(), getprimask(), getipsr(), getcontrol());
mferr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
mferr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
mfinfo(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
getbasepri(), getprimask(), getipsr(), getcontrol());
mfinfo(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
mfinfo(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
#ifdef CONFIG_ARMV7M_USEBASEPRI
# ifdef REG_EXC_RETURN
mferr(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
CURRENT_REGS[REG_EXC_RETURN]);
mfinfo(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
CURRENT_REGS[REG_EXC_RETURN]);
# else
mferr(" xPSR: %08x BASEPRI: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI]);
mfinfo(" xPSR: %08x BASEPRI: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI]);
# endif
#else
# ifdef REG_EXC_RETURN
mferr(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
mfinfo(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
# else
mferr(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
mfinfo(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
# endif
#endif

2
arch/arm/src/armv7-m/up_releasepending.c
View File

@ -66,7 +66,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
sllerr("From TCB=%p\n", rtcb);
sllinfo("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */

2
arch/arm/src/armv7-m/up_reprioritizertr.c
View File

@ -94,7 +94,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
sllerr("TCB=%p PRI=%d\n", tcb, priority);
sllinfo("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just removed the head

4
arch/arm/src/armv7-m/up_schedulesigaction.c
View File

@ -95,7 +95,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
DEBUGASSERT(tcb != NULL && sigdeliver != NULL);
/* Make sure that interrupts are disabled */
@ -110,7 +110,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{

4
arch/arm/src/armv7-m/up_sigdeliver.c
View File

@ -95,7 +95,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@ -138,7 +138,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
serr("Resuming\n");
sinfo("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;

46
arch/arm/src/armv7-r/arm_assert.c
View File

@ -98,7 +98,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t *)stack;
_llerr("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
_alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
@ -117,11 +117,11 @@ static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg)
/* Dump interesting properties of this task */
#if CONFIG_TASK_NAME_SIZE > 0
_llerr("%s: PID=%d Stack Used=%lu of %lu\n",
_alert("%s: PID=%d Stack Used=%lu of %lu\n",
tcb->name, tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#else
_llerr("PID: %d Stack Used=%lu of %lu\n",
_alert("PID: %d Stack Used=%lu of %lu\n",
tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#endif
@ -161,12 +161,12 @@ static inline void up_registerdump(void)
for (regs = REG_R0; regs <= REG_R15; regs += 8)
{
uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs];
_llerr("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
_alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
_llerr("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
_alert("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
}
}
#else
@ -230,7 +230,7 @@ static void up_dumpstate(void)
ustacksize = (uint32_t)rtcb->adj_stack_size;
}
_llerr("Current sp: %08x\n", sp);
_alert("Current sp: %08x\n", sp);
#if CONFIG_ARCH_INTERRUPTSTACK > 3
/* Get the limits on the interrupt stack memory */
@ -240,21 +240,21 @@ static void up_dumpstate(void)
/* Show interrupt stack info */
_llerr("Interrupt stack:\n");
_llerr(" base: %08x\n", istackbase);
_llerr(" size: %08x\n", istacksize);
_alert("Interrupt stack:\n");
_alert(" base: %08x\n", istackbase);
_alert(" size: %08x\n", istacksize);
#ifdef CONFIG_STACK_COLORATION
_llerr(" used: %08x\n", up_check_intstack());
_alert(" used: %08x\n", up_check_intstack());
#endif
#endif
/* Show user stack info */
_llerr("User stack:\n");
_llerr(" base: %08x\n", ustackbase);
_llerr(" size: %08x\n", ustacksize);
_alert("User stack:\n");
_alert(" base: %08x\n", ustackbase);
_alert(" size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
_llerr(" used: %08x\n", up_check_tcbstack(rtcb));
_alert(" used: %08x\n", up_check_tcbstack(rtcb));
#endif
#ifdef CONFIG_ARCH_KERNEL_STACK
@ -264,9 +264,9 @@ static void up_dumpstate(void)
{
kstackbase = (uint32_t)rtcb->xcp.kstack + CONFIG_ARCH_KERNEL_STACKSIZE - 4;
_llerr("Kernel stack:\n");
_llerr(" base: %08x\n", kstackbase);
_llerr(" size: %08x\n", CONFIG_ARCH_KERNEL_STACKSIZE);
_alert("Kernel stack:\n");
_alert(" base: %08x\n", kstackbase);
_alert(" size: %08x\n", CONFIG_ARCH_KERNEL_STACKSIZE);
}
#endif
@ -277,7 +277,7 @@ static void up_dumpstate(void)
{
/* Yes.. dump the interrupt stack */
_llerr("Interrupt Stack\n", sp);
_alert("Interrupt Stack\n", sp);
up_stackdump(sp, istackbase);
/* Extract the user stack pointer which should lie
@ -285,7 +285,7 @@ static void up_dumpstate(void)
*/
sp = g_intstackbase;
_llerr("User sp: %08x\n", sp);
_alert("User sp: %08x\n", sp);
}
#endif
@ -295,7 +295,7 @@ static void up_dumpstate(void)
if (sp > ustackbase - ustacksize && sp < ustackbase)
{
_llerr("User Stack\n", sp);
_alert("User Stack\n", sp);
up_stackdump(sp, ustackbase);
}
@ -306,7 +306,7 @@ static void up_dumpstate(void)
if (sp >= (uint32_t)rtcb->xcp.kstack && sp < kstackbase)
{
_llerr("Kernel Stack\n", sp);
_alert("Kernel Stack\n", sp);
up_stackdump(sp, kstackbase);
}
#endif
@ -373,10 +373,10 @@ void up_assert(const uint8_t *filename, int lineno)
board_autoled_on(LED_ASSERTION);
#if CONFIG_TASK_NAME_SIZE > 0
_llerr("Assertion failed at file:%s line: %d task: %s\n",
_alert("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
_llerr("Assertion failed at file:%s line: %d\n",
_alert("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif
up_dumpstate();

16
arch/arm/src/armv7-r/arm_elf.c
View File

@ -86,7 +86,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
berr("ERROR: Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
berr("ERROR: Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@ -106,7 +106,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
berr("ERROR: Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@ -114,7 +114,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if ((ehdr->e_entry & 3) != 0)
{
berr("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
berr("ERROR: Entry point is not properly aligned: %08x\n", ehdr->e_entry);
return -ENOEXEC;
}
@ -187,8 +187,8 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
berr("ERROR: ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
}
@ -258,7 +258,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
break;
default:
berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
berr("ERROR: Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@ -268,6 +268,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
berr("RELA relocation not supported\n");
berr("ERROR: RELA relocation not supported\n");
return -ENOSYS;
}

4
arch/arm/src/armv7-r/arm_l2cc_pl310.c
View File

@ -411,8 +411,8 @@ void up_l2ccinitialize(void)
putreg32(L2CC_CR_L2CEN, L2CC_CR);
}
_llerr("(%d ways) * (%d bytes/way) = %d bytes\n",
PL310_NWAYS, PL310_WAYSIZE, PL310_CACHE_SIZE);
sllinfo("(%d ways) * (%d bytes/way) = %d bytes\n",
PL310_NWAYS, PL310_WAYSIZE, PL310_CACHE_SIZE);
}
/****************************************************************************

2
arch/arm/src/armv7-r/arm_releasepending.c
View File

@ -67,7 +67,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
sllerr("From TCB=%p\n", rtcb);
sllinfo("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */

2
arch/arm/src/armv7-r/arm_reprioritizertr.c
View File

@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
sllerr("TCB=%p PRI=%d\n", tcb, priority);
sllinfo("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just

4
arch/arm/src/armv7-r/arm_schedulesigaction.c
View File

@ -94,7 +94,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{

4
arch/arm/src/armv7-r/arm_sigdeliver.c
View File

@ -83,7 +83,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@ -114,7 +114,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
serr("Resuming\n");
sinfo("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;

10
arch/arm/src/armv7-r/mpu.h
View File

@ -359,12 +359,12 @@ static inline void mpu_set_rgnr(unsigned int rgnr)
static inline void mpu_showtype(void)
{
#ifdef CONFIG_DEBUG_FEATURES
#ifdef CONFIG_DEBUG_SCHED_INFO
uint32_t regval = mpu_get_mpuir();
_err("%s MPU Regions: data=%d instr=%d\n",
(regval & MPUIR_SEPARATE) != 0 ? "Separate" : "Unified",
(regval & MPUIR_DREGION_MASK) >> MPUIR_DREGION_SHIFT,
(regval & MPUIR_IREGION_MASK) >> MPUIR_IREGION_SHIFT);
sinfo("%s MPU Regions: data=%d instr=%d\n",
(regval & MPUIR_SEPARATE) != 0 ? "Separate" : "Unified",
(regval & MPUIR_DREGION_MASK) >> MPUIR_DREGION_SHIFT,
(regval & MPUIR_IREGION_MASK) >> MPUIR_IREGION_SHIFT);
#endif
}