Add Kinetis clocking logic and some UART logic. Add K60 Tower configuration

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3876 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2011-08-13 16:11:26 +00:00
parent 6964199994
commit d8b0a610cf
3 changed files with 243 additions and 49 deletions

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@ -254,55 +254,49 @@ KwikStik-K40-specific Configuration Options
Individual subsystems can be enabled:
CONFIG_KINETIS_UART0
CONFIG_KINETIS_UART1
CONFIG_KINETIS_UART2
CONFIG_KINETIS_UART3
CONFIG_KINETIS_UART4
CONFIG_KINETIS_UART5
CONFIG_KINETIS_ETHERNET (K60 only)
CONFIG_KINETIS_RNGB (K60 only)
CONFIG_KINETIS_FLEXCAN0
CONFIG_KINETIS_FLEXCAN1
CONFIG_KINETIS_SPI0
CONFIG_KINETIS_SPI1
CONFIG_KINETIS_SPI2
CONFIG_KINETIS_I2C0
CONFIG_KINETIS_I2C1
CONFIG_KINETIS_I2S
CONFIG_KINETIS_DAC0
CONFIG_KINETIS_DAC1
CONFIG_KINETIS_ADC0
CONFIG_KINETIS_ADC1
CONFIG_KINETIS_CMP
CONFIG_KINETIS_VREF
CONFIG_KINETIS_SDHC
CONFIG_KINETIS_FTM0
CONFIG_KINETIS_FTM1
CONFIG_KINETIS_FTM2
CONFIG_KINETIS_LPTIMER
CONFIG_KINETIS_RTC
CONFIG_KINETIS_SLCD (K40 only)
CONFIG_KINETIS_EWM
CONFIG_KINETIS_CMT
CONFIG_KINETIS_USBOTG
CONFIG_KINETIS_USBDCD
CONFIG_KINETIS_LLWU
CONFIG_KINETIS_REGFILE
CONFIG_KINETIS_TSI
CONFIG_KINETIS_PORTA
CONFIG_KINETIS_PORTB
CONFIG_KINETIS_PORTC
CONFIG_KINETIS_PORTD
CONFIG_KINETIS_PORTE
CONFIG_KINETIS_FTFL
CONFIG_KINETIS_DMA
CONFIG_KINETIS_DMAMUX
CONFIG_KINETIS_CRC
CONFIG_KINETIS_PDB
CONFIG_KINETIS_PIT
CONFIG_KINETIS_FLEXBUS
CONFIG_KINETIS_MPU
CONFIG_KINETIS_TRACE -- Enable trace clocking on power up.
CONFIG_KINETIS_FLEXBUS -- Enable flexbus clocking on power up.
CONFIG_KINETIS_UART0 -- Support UART0
CONFIG_KINETIS_UART1 -- Support UART1
CONFIG_KINETIS_UART2 -- Support UART2
CONFIG_KINETIS_UART3 -- Support UART3
CONFIG_KINETIS_UART4 -- Support UART4
CONFIG_KINETIS_UART5 -- Support UART5
CONFIG_KINETIS_ETHERNET -- Support Ethernet (K60 only)
CONFIG_KINETIS_RNGB -- Support the random number generator(K60 only)
CONFIG_KINETIS_FLEXCAN0 -- Support FlexCAN0
CONFIG_KINETIS_FLEXCAN1 -- Support FlexCAN1
CONFIG_KINETIS_SPI0 -- Support SPI0
CONFIG_KINETIS_SPI1 -- Support SPI1
CONFIG_KINETIS_SPI2 -- Support SPI2
CONFIG_KINETIS_I2C0 -- Support I2C0
CONFIG_KINETIS_I2C1 -- Support I2C1
CONFIG_KINETIS_I2S -- Support I2S
CONFIG_KINETIS_DAC0 -- Support DAC0
CONFIG_KINETIS_DAC1 -- Support DAC1
CONFIG_KINETIS_ADC0 -- Support ADC0
CONFIG_KINETIS_ADC1 -- Support ADC1
CONFIG_KINETIS_CMP -- Support CMP
CONFIG_KINETIS_VREF -- Support VREF
CONFIG_KINETIS_SDHC -- Support SD host controller
CONFIG_KINETIS_FTM0 -- Support FlexTimer 0
CONFIG_KINETIS_FTM1 -- Support FlexTimer 1
CONFIG_KINETIS_FTM2 -- Support FlexTimer 2
CONFIG_KINETIS_LPTIMER -- Support the low power timer
CONFIG_KINETIS_RTC -- Support RTC
CONFIG_KINETIS_SLCD -- Support the segment LCD (K40 only)
CONFIG_KINETIS_EWM -- Support the external watchdog
CONFIG_KINETIS_CMT -- Support Carrier Modulator Transmitter
CONFIG_KINETIS_USBOTG -- Support USB OTG (see also CONFIG_USBHOST and CONFIG_USBDEV)
CONFIG_KINETIS_USBDCD -- Support the USB Device Charger Detection module
CONFIG_KINETIS_LLWU -- Support the Low Leakage Wake-Up Unit
CONFIG_KINETIS_TSI -- Support the touch screeen interface
CONFIG_KINETIS_FTFL -- Support FLASH
CONFIG_KINETIS_DMA -- Support DMA
CONFIG_KINETIS_CRC -- Support CRC
CONFIG_KINETIS_PDB -- Support the Programmable Delay Block
CONFIG_KINETIS_PIT -- Support Programmable Interval Timers
CONFIG_ARMV7M_MPU -- Support the MPU
Kinetis K40 specific device driver settings

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@ -51,6 +51,38 @@
************************************************************************************/
/* Clocking *************************************************************************/
/* The Kwikstik-K40 has a 4MHz crystal on board */
#undef BOARD_EXTCLOCK /* Crystal */
#define BOARD_EXTAL_FREQ 4000000 /* 4MHz crystal frequency (REFCLK) */
#define BOARD_XTAL32_FREQ 32768 /* 32KHz RTC Oscillator */
/* PLL Configuration. NOTE: Only even frequency crystals are supported that will
* produce a 2MHz reference clock to the PLL.
*
* PLL Input frequency: PLLIN = REFCLK/PRDIV = 4MHz/2 = 2MHz
* PLL Output frequency: PLLOUT = PLLIN*VDIV = 2Mhz*48 = 96MHz
* MCG Frequency: PLLOUT = 96MHz
*/
#define BOARD_PRDIV 2 /* PLL External Reference Divider */
#define BOARD_VDIV 48 /* PLL VCO Divider (frequency multiplier) */
#define BOARD_PLLIN_FREQ (BOARD_EXTAL_FREQ / BOARD_PRDIV)
#define BOARD_PLLOUT_FREQ (BOARD_EXTAL_FREQ * BOARD_VDIV)
#define BOARD_MCG_FREQ BOARD_PLL_FREQ
/* SIM CLKDIV1 dividers */
#define BOARD_OUTDIV1 1 /* Core = MCG, 96MHz */
#define BOARD_OUTDIV2 2 /* Bus = MCG/2, 48MHz */
#define BOARD_OUTDIV3 2 /* FlexBus = MCG/2, 48MHz */
#define BOARD_OUTDIV4 4 /* Flash clock = MCG/4, 24MHz */
#define BOARD_CORECLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV1)
#define BOARD_BUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV2)
#define BOARD_FLEXBUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV3)
#define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4)
/* LED definitions ******************************************************************/

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@ -0,0 +1,168 @@
/************************************************************************************
* configs/twr-k60n512/include/board.h
* include/arch/board/board.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_BOARD_BOARD_H
#define __ARCH_BOARD_BOARD_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
/************************************************************************************
* Definitions
************************************************************************************/
/* Clocking *************************************************************************/
/* The K60 tower board uses a 50MHz external clock */
#define BOARD_EXTCLOCK 1 /* External clock */
#define BOARD_EXTAL_FREQ 50000000 /* 50MHz Oscillator */
#define BOARD_XTAL32_FREQ 32768 /* 32KHz RTC Oscillator */
/* PLL Configuration. Either the external clock or crystal frequency is used to
* select the PRDIV value. Only reference clock frequencies are supported that will
* produce a 2MHz reference clock to the PLL.
*
* PLL Input frequency: PLLIN = REFCLK/PRDIV = 50MHz/25 = 2MHz
* PLL Output frequency: PLLOUT = PLLIN*VDIV = 2Mhz*48 = 96MHz
* MCG Frequency: PLLOUT = 96MHz
*/
#define BOARD_PRDIV 25 /* PLL External Reference Divider */
#define BOARD_VDIV 48 /* PLL VCO Divider (frequency multiplier) */
#define BOARD_PLLIN_FREQ (BOARD_EXTAL_FREQ / BOARD_PRDIV)
#define BOARD_PLLOUT_FREQ (BOARD_EXTAL_FREQ * BOARD_VDIV)
#define BOARD_MCG_FREQ BOARD_PLL_FREQ
/* SIM CLKDIV1 dividers */
#define BOARD_OUTDIV1 1 /* Core = MCG, 96MHz */
#define BOARD_OUTDIV2 2 /* Bus = MCG/2, 48MHz */
#define BOARD_OUTDIV3 2 /* FlexBus = MCG/2, 48MHz */
#define BOARD_OUTDIV4 4 /* Flash clock = MCG/4, 24MHz */
#define BOARD_CORECLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV1)
#define BOARD_BUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV2)
#define BOARD_FLEXBUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV3)
#define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4)
/* LED definitions ******************************************************************/
#define LED_STARTED 0
#define LED_HEAPALLOCATE 1
#define LED_IRQSENABLED 2
#define LED_STACKCREATED 3
#define LED_INIRQ 4
#define LED_SIGNAL 5
#define LED_ASSERTION 6
#define LED_PANIC 7
/* Button definitions ***************************************************************/
/************************************************************************************
* Public Data
************************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
/************************************************************************************
* Name: kinetis_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/
EXTERN void kinetis_boardinitialize(void);
/************************************************************************************
* Button support.
*
* Description:
* up_buttoninit() must be called to initialize button resources. After
* that, up_buttons() may be called to collect the current state of all
* buttons or up_irqbutton() may be called to register button interrupt
* handlers.
*
* After up_buttoninit() has been called, up_buttons() may be called to
* collect the state of all buttons. up_buttons() returns an 8-bit bit set
* with each bit associated with a button. See the BUTTON_*_BIT and JOYSTICK_*_BIT
* definitions in board.h for the meaning of each bit.
*
* up_irqbutton() may be called to register an interrupt handler that will
* be called when a button is depressed or released. The ID value is a
* button enumeration value that uniquely identifies a button resource. See the
* BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration
* value. The previous interrupt handler address is returned (so that it may
* restored, if so desired).
*
************************************************************************************/
#ifdef CONFIG_ARCH_BUTTONS
EXTERN void up_buttoninit(void);
EXTERN uint8_t up_buttons(void);
#ifdef CONFIG_ARCH_IRQBUTTONS
EXTERN xcpt_t up_irqbutton(int id, xcpt_t irqhandler);
#endif
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_BOARD_BOARD_H */