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Review/modifications for change of last merge

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Gregory Nutt 2015-01-31 14:10:53 -06:00
parent e4b0df0431
commit d9d530850a
4 changed files with 189 additions and 189 deletions
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145
arch/avr/include/atmega/irq.h
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@ -1,7 +1,7 @@
/**************************************************************************** /****************************************************************************
* arch/avr/include/atmega/irq.h * arch/avr/include/atmega/irq.h
* *
* Copyright (C) 2011 Gregory Nutt. All rights reserved. * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org> * Author: Gregory Nutt <gnutt@nuttx.org>
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -56,80 +56,80 @@
*/ */
#if defined(CONFIG_ARCH_CHIP_ATMEGA128) #if defined(CONFIG_ARCH_CHIP_ATMEGA128)
#define ATMEGA_IRQ_INT0 0 /* 0x0002 External Interrupt Request 0 */ # define ATMEGA_IRQ_INT0 0 /* 0x0002 External Interrupt Request 0 */
#define ATMEGA_IRQ_INT1 1 /* 0x0004 External Interrupt Request 1 */ # define ATMEGA_IRQ_INT1 1 /* 0x0004 External Interrupt Request 1 */
#define ATMEGA_IRQ_INT2 2 /* 0x0006 External Interrupt Request 2 */ # define ATMEGA_IRQ_INT2 2 /* 0x0006 External Interrupt Request 2 */
#define ATMEGA_IRQ_INT3 3 /* 0x0008 External Interrupt Request 3 */ # define ATMEGA_IRQ_INT3 3 /* 0x0008 External Interrupt Request 3 */
#define ATMEGA_IRQ_INT4 4 /* 0x000a External Interrupt Request 4 */ # define ATMEGA_IRQ_INT4 4 /* 0x000a External Interrupt Request 4 */
#define ATMEGA_IRQ_INT5 5 /* 0x000c External Interrupt Request 5 */ # define ATMEGA_IRQ_INT5 5 /* 0x000c External Interrupt Request 5 */
#define ATMEGA_IRQ_INT6 6 /* 0x000e External Interrupt Request 6 */ # define ATMEGA_IRQ_INT6 6 /* 0x000e External Interrupt Request 6 */
#define ATMEGA_IRQ_INT7 7 /* 0x0010 External Interrupt Request 7 */ # define ATMEGA_IRQ_INT7 7 /* 0x0010 External Interrupt Request 7 */
#define ATMEGA_IRQ_T2COMP 8 /* 0x0012 TIMER2 COMP Timer/Counter2 Compare Match */ # define ATMEGA_IRQ_T2COMP 8 /* 0x0012 TIMER2 COMP Timer/Counter2 Compare Match */
#define ATMEGA_IRQ_T2OVF 9 /* 0x0014 TIMER2 OVF Timer/Counter2 Overflow */ # define ATMEGA_IRQ_T2OVF 9 /* 0x0014 TIMER2 OVF Timer/Counter2 Overflow */
#define ATMEGA_IRQ_T1CAPT 10 /* 0x0016 TIMER1 CAPT Timer/Counter1 Capture Event */ # define ATMEGA_IRQ_T1CAPT 10 /* 0x0016 TIMER1 CAPT Timer/Counter1 Capture Event */
#define ATMEGA_IRQ_T1COMPA 11 /* 0x0018 TIMER1 COMPA Timer/Counter1 Compare Match A */ # define ATMEGA_IRQ_T1COMPA 11 /* 0x0018 TIMER1 COMPA Timer/Counter1 Compare Match A */
#define ATMEGA_IRQ_T1COMPB 12 /* 0x001a TIMER1 COMPB Timer/Counter1 Compare Match B */ # define ATMEGA_IRQ_T1COMPB 12 /* 0x001a TIMER1 COMPB Timer/Counter1 Compare Match B */
#define ATMEGA_IRQ_T1OVF 13 /* 0x001c TIMER1 OVF Timer/Counter1 Overflow */ # define ATMEGA_IRQ_T1OVF 13 /* 0x001c TIMER1 OVF Timer/Counter1 Overflow */
#define ATMEGA_IRQ_T0COMP 14 /* 0x001e TIMER0 COMP Timer/Counter0 Compare Match */ # define ATMEGA_IRQ_T0COMP 14 /* 0x001e TIMER0 COMP Timer/Counter0 Compare Match */
#define ATMEGA_IRQ_T0OVF 15 /* 0x0020 TIMER0 OVF Timer/Counter0 Overflow */ # define ATMEGA_IRQ_T0OVF 15 /* 0x0020 TIMER0 OVF Timer/Counter0 Overflow */
#define ATMEGA_IRQ_SPI 16 /* 0x0022 STC SPI Serial Transfer Complete */ # define ATMEGA_IRQ_SPI 16 /* 0x0022 STC SPI Serial Transfer Complete */
#define ATMEGA_IRQ_U0RX 17 /* 0x0024 USART0 Rx Complete */ # define ATMEGA_IRQ_U0RX 17 /* 0x0024 USART0 Rx Complete */
#define ATMEGA_IRQ_U0DRE 18 /* 0x0026 USART0 Data Register Empty */ # define ATMEGA_IRQ_U0DRE 18 /* 0x0026 USART0 Data Register Empty */
#define ATMEGA_IRQ_U0TX 19 /* 0x0028 USART0 Tx Complete */ # define ATMEGA_IRQ_U0TX 19 /* 0x0028 USART0 Tx Complete */
#define ATMEGA_IRQ_ADC 20 /* 0x002a ADC Conversion Complete */ # define ATMEGA_IRQ_ADC 20 /* 0x002a ADC Conversion Complete */
#define ATMEGA_IRQ_EE 21 /* 0x002c EEPROM Ready */ # define ATMEGA_IRQ_EE 21 /* 0x002c EEPROM Ready */
#define ATMEGA_IRQ_ANACOMP 22 /* 0x002e ANALOG COMP Analog Comparator */ # define ATMEGA_IRQ_ANACOMP 22 /* 0x002e ANALOG COMP Analog Comparator */
#define ATMEGA_IRQ_T1COMPC 23 /* 0x0030 TIMER1 COMPC Timer/Countre1 Compare Match C */ # define ATMEGA_IRQ_T1COMPC 23 /* 0x0030 TIMER1 COMPC Timer/Countre1 Compare Match C */
#define ATMEGA_IRQ_T3CAPT 24 /* 0x0032 TIMER3 CAPT Timer/Counter3 Capture Event */ # define ATMEGA_IRQ_T3CAPT 24 /* 0x0032 TIMER3 CAPT Timer/Counter3 Capture Event */
#define ATMEGA_IRQ_T3COMPA 25 /* 0x0034 TIMER3 COMPA Timer/Counter3 Compare Match A */ # define ATMEGA_IRQ_T3COMPA 25 /* 0x0034 TIMER3 COMPA Timer/Counter3 Compare Match A */
#define ATMEGA_IRQ_T3COMPB 26 /* 0x0036 TIMER3 COMPB Timer/Counter3 Compare Match B */ # define ATMEGA_IRQ_T3COMPB 26 /* 0x0036 TIMER3 COMPB Timer/Counter3 Compare Match B */
#define ATMEGA_IRQ_T3COMPC 27 /* 0x0038 TIMER3 COMPC Timer/Counter3 Compare Match C */ # define ATMEGA_IRQ_T3COMPC 27 /* 0x0038 TIMER3 COMPC Timer/Counter3 Compare Match C */
#define ATMEGA_IRQ_T3OVF 28 /* 0x003a TIMER3 OVF Timer/Counter3 Overflow */ # define ATMEGA_IRQ_T3OVF 28 /* 0x003a TIMER3 OVF Timer/Counter3 Overflow */
#define ATMEGA_IRQ_U1RX 29 /* 0x003c USART1 Rx Complete */ # define ATMEGA_IRQ_U1RX 29 /* 0x003c USART1 Rx Complete */
#define ATMEGA_IRQ_U1DRE 30 /* 0x003e USART1 Data Register Empty */ # define ATMEGA_IRQ_U1DRE 30 /* 0x003e USART1 Data Register Empty */
#define ATMEGA_IRQ_U1TX 31 /* 0x0040 USART1 Tx Complete */ # define ATMEGA_IRQ_U1TX 31 /* 0x0040 USART1 Tx Complete */
#define ATMEGA_IRQ_TWI 32 /* 0x0042 TWI Two-wire Serial Interface */ # define ATMEGA_IRQ_TWI 32 /* 0x0042 TWI Two-wire Serial Interface */
#define ATMEGA_IRQ_SPMRDY 33 /* 0x0044 Store Program Memory Ready */ # define ATMEGA_IRQ_SPMRDY 33 /* 0x0044 Store Program Memory Ready */
#elif defined(CONFIG_ARCH_CHIP_ATMEGA1284P) #elif defined(CONFIG_ARCH_CHIP_ATMEGA1284P)
#define ATMEGA_IRQ_INT0 0 /* 0x0002 External Interrupt Request 0 */ # define ATMEGA_IRQ_INT0 0 /* 0x0002 External Interrupt Request 0 */
#define ATMEGA_IRQ_INT1 1 /* 0x0004 External Interrupt Request 1 */ # define ATMEGA_IRQ_INT1 1 /* 0x0004 External Interrupt Request 1 */
#define ATMEGA_IRQ_INT2 2 /* 0x0006 External Interrupt Request 2 */ # define ATMEGA_IRQ_INT2 2 /* 0x0006 External Interrupt Request 2 */
#define ATMEGA_IRQ_PCINT0 3 /* 0x0008 Pin Change Interrupt Request 0 */ # define ATMEGA_IRQ_PCINT0 3 /* 0x0008 Pin Change Interrupt Request 0 */
#define ATMEGA_IRQ_PCINT1 4 /* 0x000a Pin Change Interrupt Request 1 */ # define ATMEGA_IRQ_PCINT1 4 /* 0x000a Pin Change Interrupt Request 1 */
#define ATMEGA_IRQ_PCINT2 5 /* 0x000c Pin Change Interrupt Request 2 */ # define ATMEGA_IRQ_PCINT2 5 /* 0x000c Pin Change Interrupt Request 2 */
#define ATMEGA_IRQ_PCINT3 6 /* 0x000e Pin Change Interrupt Request 3 */ # define ATMEGA_IRQ_PCINT3 6 /* 0x000e Pin Change Interrupt Request 3 */
#define ATMEGA_IRQ_WDT 7 /* 0x0010 Watchdog Time-Out Interrupt */ # define ATMEGA_IRQ_WDT 7 /* 0x0010 Watchdog Time-Out Interrupt */
#define ATMEGA_IRQ_T2COMPA 8 /* 0x0012 TIMER2 COMPA Timer/Counter2 Compare Match */ # define ATMEGA_IRQ_T2COMPA 8 /* 0x0012 TIMER2 COMPA Timer/Counter2 Compare Match */
#define ATMEGA_IRQ_T2COMPB 9 /* 0x0014 TIMER2 COMPB Timer/Counter2 Compare Match */ # define ATMEGA_IRQ_T2COMPB 9 /* 0x0014 TIMER2 COMPB Timer/Counter2 Compare Match */
#define ATMEGA_IRQ_T2OVF 10 /* 0x0016 TIMER2 OVF Timer/Counter2 Overflow */ # define ATMEGA_IRQ_T2OVF 10 /* 0x0016 TIMER2 OVF Timer/Counter2 Overflow */
#define ATMEGA_IRQ_T1CAPT 11 /* 0x0018 TIMER1 CAPT Timer/Counter1 Capture Event */ # define ATMEGA_IRQ_T1CAPT 11 /* 0x0018 TIMER1 CAPT Timer/Counter1 Capture Event */
#define ATMEGA_IRQ_T1COMPA 12 /* 0x001a TIMER1 COMPA Timer/Counter1 Compare Match A */ # define ATMEGA_IRQ_T1COMPA 12 /* 0x001a TIMER1 COMPA Timer/Counter1 Compare Match A */
#define ATMEGA_IRQ_T1COMPB 13 /* 0x001c TIMER1 COMPB Timer/Counter1 Compare Match B */ # define ATMEGA_IRQ_T1COMPB 13 /* 0x001c TIMER1 COMPB Timer/Counter1 Compare Match B */
#define ATMEGA_IRQ_T1OVF 14 /* 0x001e TIMER1 OVF Timer/Counter1 Overflow */ # define ATMEGA_IRQ_T1OVF 14 /* 0x001e TIMER1 OVF Timer/Counter1 Overflow */
#define ATMEGA_IRQ_T0COMPA 15 /* 0x0020 TIMER0 COMP Timer/Counter0 Compare Match */ # define ATMEGA_IRQ_T0COMPA 15 /* 0x0020 TIMER0 COMP Timer/Counter0 Compare Match */
#define ATMEGA_IRQ_T0COMPB 16 /* 0x0022 TIMER0 COMP Timer/Counter0 Compare Match */ # define ATMEGA_IRQ_T0COMPB 16 /* 0x0022 TIMER0 COMP Timer/Counter0 Compare Match */
#define ATMEGA_IRQ_T0OVF 17 /* 0x0024 TIMER0 OVF Timer/Counter0 Overflow */ # define ATMEGA_IRQ_T0OVF 17 /* 0x0024 TIMER0 OVF Timer/Counter0 Overflow */
#define ATMEGA_IRQ_SPI 18 /* 0x0026 STC SPI Serial Transfer Complete */ # define ATMEGA_IRQ_SPI 18 /* 0x0026 STC SPI Serial Transfer Complete */
#define ATMEGA_IRQ_U0RX 19 /* 0x0028 USART0 Rx Complete */ # define ATMEGA_IRQ_U0RX 19 /* 0x0028 USART0 Rx Complete */
#define ATMEGA_IRQ_U0DRE 20 /* 0x002a USART0 Data Register Empty */ # define ATMEGA_IRQ_U0DRE 20 /* 0x002a USART0 Data Register Empty */
#define ATMEGA_IRQ_U0TX 21 /* 0x002c USART0 Tx Complete */ # define ATMEGA_IRQ_U0TX 21 /* 0x002c USART0 Tx Complete */
#define ATMEGA_IRQ_ANACOMP 22 /* 0x002e ANALOG COMP Analog Comparator */ # define ATMEGA_IRQ_ANACOMP 22 /* 0x002e ANALOG COMP Analog Comparator */
#define ATMEGA_IRQ_ADC 23 /* 0x0030 ADC Conversion Complete */ # define ATMEGA_IRQ_ADC 23 /* 0x0030 ADC Conversion Complete */
#define ATMEGA_IRQ_EE 24 /* 0x0032 EEPROM Ready */ # define ATMEGA_IRQ_EE 24 /* 0x0032 EEPROM Ready */
#define ATMEGA_IRQ_TWI 25 /* 0x0034 TWI Two-wire Serial Interface */ # define ATMEGA_IRQ_TWI 25 /* 0x0034 TWI Two-wire Serial Interface */
#define ATMEGA_IRQ_SPMRDY 26 /* 0x0036 Store Program Memory Ready */ # define ATMEGA_IRQ_SPMRDY 26 /* 0x0036 Store Program Memory Ready */
#define ATMEGA_IRQ_U1RX 27 /* 0x0038 USART1 Rx Complete */ # define ATMEGA_IRQ_U1RX 27 /* 0x0038 USART1 Rx Complete */
#define ATMEGA_IRQ_U1DRE 28 /* 0x003a USART1 Data Register Empty */ # define ATMEGA_IRQ_U1DRE 28 /* 0x003a USART1 Data Register Empty */
#define ATMEGA_IRQ_U1TX 29 /* 0x003c USART1 Tx Complete */ # define ATMEGA_IRQ_U1TX 29 /* 0x003c USART1 Tx Complete */
#define ATMEGA_IRQ_T3CAPT 30 /* 0x003e TIMER3 CAPT Timer/Counter3 Capture Event */ # define ATMEGA_IRQ_T3CAPT 30 /* 0x003e TIMER3 CAPT Timer/Counter3 Capture Event */
#define ATMEGA_IRQ_T3COMPA 31 /* 0x0040 TIMER3 COMPA Timer/Counter3 Compare Match A */ # define ATMEGA_IRQ_T3COMPA 31 /* 0x0040 TIMER3 COMPA Timer/Counter3 Compare Match A */
#define ATMEGA_IRQ_T3COMPB 32 /* 0x0042 TIMER3 COMPB Timer/Counter3 Compare Match B */ # define ATMEGA_IRQ_T3COMPB 32 /* 0x0042 TIMER3 COMPB Timer/Counter3 Compare Match B */
#define ATMEGA_IRQ_T3OVF 33 /* 0x0044 TIMER3 OVF Timer/Counter3 Overflow */ # define ATMEGA_IRQ_T3OVF 33 /* 0x0044 TIMER3 OVF Timer/Counter3 Overflow */
#else #else
#error "Unrecognized chip" #error "Unrecognized chip"
#endif #endif
#define NR_IRQS 34 #define NR_IRQS 34
/**************************************************************************** /****************************************************************************
* Public Types * Public Types
@ -153,7 +153,8 @@
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
#ifdef __cplusplus #ifdef __cplusplus
#define EXTERN extern "C" #define EXTERN extern "C"
extern "C" { extern "C"
{
#else #else
#define EXTERN extern #define EXTERN extern
#endif #endif

75
arch/avr/src/atmega/atmega_exceptions.S
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@ -1,7 +1,7 @@
/******************************************************************************************** /********************************************************************************************
* arch/avr/src/atmega/atmega_exceptions.S * arch/avr/src/atmega/atmega_exceptions.S
* *
* Copyright (C) 2011 Gregory Nutt. All rights reserved. * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org> * Author: Gregory Nutt <gnutt@nuttx.org>
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -97,42 +97,42 @@
HANDLER atmega_twi, ATMEGA_IRQ_TWI, excpt_common /* TWI two-wire serial interface */ HANDLER atmega_twi, ATMEGA_IRQ_TWI, excpt_common /* TWI two-wire serial interface */
HANDLER atmega_spmrdy, ATMEGA_IRQ_SPMRDY, excpt_common /* Store program memory ready */ HANDLER atmega_spmrdy, ATMEGA_IRQ_SPMRDY, excpt_common /* Store program memory ready */
#elif defined(CONFIG_ARCH_CHIP_ATMEGA1284P) #elif defined(CONFIG_ARCH_CHIP_ATMEGA1284P)
HANDLER atmega_int0, ATMEGA_IRQ_INT0, excpt_common /* External interrupt request 0 */ HANDLER atmega_int0, ATMEGA_IRQ_INT0, excpt_common /* External interrupt request 0 */
HANDLER atmega_int1, ATMEGA_IRQ_INT1, excpt_common /* External interrupt request 1 */ HANDLER atmega_int1, ATMEGA_IRQ_INT1, excpt_common /* External interrupt request 1 */
HANDLER atmega_int2, ATMEGA_IRQ_INT2, excpt_common /* External interrupt request 2 */ HANDLER atmega_int2, ATMEGA_IRQ_INT2, excpt_common /* External interrupt request 2 */
HANDLER atmega_pcint0, ATMEGA_IRQ_PCINT0, excpt_common /* Pin change interrupt request 0 */ HANDLER atmega_pcint0, ATMEGA_IRQ_PCINT0, excpt_common /* Pin change interrupt request 0 */
HANDLER atmega_pcint1, ATMEGA_IRQ_PCINT1, excpt_common /* Pin change interrupt request 1 */ HANDLER atmega_pcint1, ATMEGA_IRQ_PCINT1, excpt_common /* Pin change interrupt request 1 */
HANDLER atmega_pcint2, ATMEGA_IRQ_PCINT2, excpt_common /* Pin change interrupt request 2 */ HANDLER atmega_pcint2, ATMEGA_IRQ_PCINT2, excpt_common /* Pin change interrupt request 2 */
HANDLER atmega_pcint3, ATMEGA_IRQ_PCINT3, excpt_common /* Pin change interrupt request 3 */ HANDLER atmega_pcint3, ATMEGA_IRQ_PCINT3, excpt_common /* Pin change interrupt request 3 */
HANDLER atmega_wdt, ATMEGA_IRQ_WDT, excpt_common /* Watchdog time-out interrupt */ HANDLER atmega_wdt, ATMEGA_IRQ_WDT, excpt_common /* Watchdog time-out interrupt */
HANDLER atmega_t2compa, ATMEGA_IRQ_T2COMPA, excpt_common /* TIMER2 COMPA timer/counter2 compare match */ HANDLER atmega_t2compa, ATMEGA_IRQ_T2COMPA, excpt_common /* TIMER2 COMPA timer/counter2 compare match */
HANDLER atmega_t2compb, ATMEGA_IRQ_T2COMPB, excpt_common /* TIMER2 COMPB timer/counter2 compare match */ HANDLER atmega_t2compb, ATMEGA_IRQ_T2COMPB, excpt_common /* TIMER2 COMPB timer/counter2 compare match */
HANDLER atmega_t2ovf, ATMEGA_IRQ_T2OVF, excpt_common /* TIMER2 OVF timer/counter2 overflow */ HANDLER atmega_t2ovf, ATMEGA_IRQ_T2OVF, excpt_common /* TIMER2 OVF timer/counter2 overflow */
HANDLER atmega_t1capt, ATMEGA_IRQ_T1CAPT, excpt_common /* TIMER1 CAPT timer/counter1 capture event */ HANDLER atmega_t1capt, ATMEGA_IRQ_T1CAPT, excpt_common /* TIMER1 CAPT timer/counter1 capture event */
HANDLER atmega_t1compa, ATMEGA_IRQ_T1COMPA, excpt_common /* TIMER1 COMPA timer/counter1 compare match a */ HANDLER atmega_t1compa, ATMEGA_IRQ_T1COMPA, excpt_common /* TIMER1 COMPA timer/counter1 compare match a */
HANDLER atmega_t1compb, ATMEGA_IRQ_T1COMPB, excpt_common /* TIMER1 COMPB timer/counter1 compare match b */ HANDLER atmega_t1compb, ATMEGA_IRQ_T1COMPB, excpt_common /* TIMER1 COMPB timer/counter1 compare match b */
HANDLER atmega_t1ovf, ATMEGA_IRQ_T1OVF, excpt_common /* TIMER1 OVF timer/counter1 overflow */ HANDLER atmega_t1ovf, ATMEGA_IRQ_T1OVF, excpt_common /* TIMER1 OVF timer/counter1 overflow */
HANDLER atmega_t0compa, ATMEGA_IRQ_T0COMPA, excpt_common /* TIMER0 COMPA timer/counter0 compare match */ HANDLER atmega_t0compa, ATMEGA_IRQ_T0COMPA, excpt_common /* TIMER0 COMPA timer/counter0 compare match */
HANDLER atmega_t0compb, ATMEGA_IRQ_T0COMPB, excpt_common /* TIMER0 COMPB timer/counter0 compare match */ HANDLER atmega_t0compb, ATMEGA_IRQ_T0COMPB, excpt_common /* TIMER0 COMPB timer/counter0 compare match */
HANDLER atmega_t0ovf, ATMEGA_IRQ_T0OVF, excpt_common /* TIMER0 OVF timer/counter0 overflow */ HANDLER atmega_t0ovf, ATMEGA_IRQ_T0OVF, excpt_common /* TIMER0 OVF timer/counter0 overflow */
HANDLER atmega_spi, ATMEGA_IRQ_SPI, excpt_common /* STC SPI serial transfer complete */ HANDLER atmega_spi, ATMEGA_IRQ_SPI, excpt_common /* STC SPI serial transfer complete */
HANDLER atmega_u0rx, ATMEGA_IRQ_U0RX, excpt_common /* USART0 RX complete */ HANDLER atmega_u0rx, ATMEGA_IRQ_U0RX, excpt_common /* USART0 RX complete */
HANDLER atmega_u0dre, ATMEGA_IRQ_U0DRE, excpt_common /* USART0 data register empty */ HANDLER atmega_u0dre, ATMEGA_IRQ_U0DRE, excpt_common /* USART0 data register empty */
HANDLER atmega_u0tx, ATMEGA_IRQ_U0TX, excpt_common /* USART0 TX complete */ HANDLER atmega_u0tx, ATMEGA_IRQ_U0TX, excpt_common /* USART0 TX complete */
HANDLER atmega_anacomp, ATMEGA_IRQ_ANACOMP, excpt_common /* ANALOG COMP analog comparator */ HANDLER atmega_anacomp, ATMEGA_IRQ_ANACOMP, excpt_common /* ANALOG COMP analog comparator */
HANDLER atmega_adc, ATMEGA_IRQ_ADC, excpt_common /* ADC conversion complete */ HANDLER atmega_adc, ATMEGA_IRQ_ADC, excpt_common /* ADC conversion complete */
HANDLER atmega_ee, ATMEGA_IRQ_EE, excpt_common /* EEPROM ready */ HANDLER atmega_ee, ATMEGA_IRQ_EE, excpt_common /* EEPROM ready */
HANDLER atmega_twi , ATMEGA_IRQ_TWI, excpt_common /* TWI two-wire serial interface */ HANDLER atmega_twi , ATMEGA_IRQ_TWI, excpt_common /* TWI two-wire serial interface */
HANDLER atmega_spmrdy, ATMEGA_IRQ_SPMRDY, excpt_common /* Store program memory ready */ HANDLER atmega_spmrdy, ATMEGA_IRQ_SPMRDY, excpt_common /* Store program memory ready */
HANDLER atmega_u1rx, ATMEGA_IRQ_U1RX, excpt_common /* USART1 RX complete */ HANDLER atmega_u1rx, ATMEGA_IRQ_U1RX, excpt_common /* USART1 RX complete */
HANDLER atmega_u1dre, ATMEGA_IRQ_U1DRE, excpt_common /* USART1 data register empty */ HANDLER atmega_u1dre, ATMEGA_IRQ_U1DRE, excpt_common /* USART1 data register empty */
HANDLER atmega_u1tx, ATMEGA_IRQ_U1TX, excpt_common /* USART1 TX complete */ HANDLER atmega_u1tx, ATMEGA_IRQ_U1TX, excpt_common /* USART1 TX complete */
HANDLER atmega_t3capt, ATMEGA_IRQ_T3CAPT, excpt_common /* TIMER3 CAPT timer/counter3 capture event */ HANDLER atmega_t3capt, ATMEGA_IRQ_T3CAPT, excpt_common /* TIMER3 CAPT timer/counter3 capture event */
HANDLER atmega_t3compa, ATMEGA_IRQ_T3COMPA, excpt_common /* TIMER3 COMPA timer/counter3 compare match a */ HANDLER atmega_t3compa, ATMEGA_IRQ_T3COMPA, excpt_common /* TIMER3 COMPA timer/counter3 compare match a */
HANDLER atmega_t3compb, ATMEGA_IRQ_T3COMPB, excpt_common /* TIMER3 COMPB timer/counter3 compare match b */ HANDLER atmega_t3compb, ATMEGA_IRQ_T3COMPB, excpt_common /* TIMER3 COMPB timer/counter3 compare match b */
HANDLER atmega_t3ovf, ATMEGA_IRQ_T3OVF, excpt_common /* TIMER3 OVF timer/counter3 overflow */ HANDLER atmega_t3ovf, ATMEGA_IRQ_T3OVF, excpt_common /* TIMER3 OVF timer/counter3 overflow */
#else #else
#error "Unrecognized chip" # error "Unrecognized chip"
#endif #endif
/******************************************************************************************** /********************************************************************************************
@ -162,7 +162,7 @@ excpt_common:
*/ */
in r28, _SFR_IO_ADDR(SPL) /* Get the save structure pointer in a Call-saved register pair */ in r28, _SFR_IO_ADDR(SPL) /* Get the save structure pointer in a Call-saved register pair */
in r29, _SFR_IO_ADDR(SPH) /* Pointer can be obtained from the stack pointer */ in r29, _SFR_IO_ADDR(SPH) /* Pointer can be obtained from the stack pointer */
adiw r28, 1 /* Remembering that push post-decrements */ adiw r28, 1 /* Remembering that push post-decrements */
movw r22, r28 /* Pass register save structure as the parameter 2 */ movw r22, r28 /* Pass register save structure as the parameter 2 */
USE_INTSTACK rx, ry, rz /* Switch to the interrupt stack */ USE_INTSTACK rx, ry, rz /* Switch to the interrupt stack */
@ -206,4 +206,3 @@ up_interruptstack:
.size up_interruptstack, .-up_interruptstack .size up_interruptstack, .-up_interruptstack
#endif #endif
.end .end

154
arch/avr/src/atmega/atmega_head.S
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@ -1,7 +1,7 @@
/**************************************************************************** /****************************************************************************
* arch/avr/src/atmega/atmega_head.S * arch/avr/src/atmega/atmega_head.S
* *
* Copyright (C) 2011 Gregory Nutt. All rights reserved. * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org> * Author: Gregory Nutt <gnutt@nuttx.org>
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -9,14 +9,14 @@
* are met: * are met:
* *
* 1. Redistributions of source code must retain the above copyright * 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer. * notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright * 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in * notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the * the documentation and/or other materials provided with the
* distribution. * distribution.
* 3. Neither the name NuttX nor the names of its contributors may be * 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software * used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@ -113,40 +113,40 @@
.global atmega_twi /* TWI two-wire serial interface */ .global atmega_twi /* TWI two-wire serial interface */
.global atmega_spmrdy /* Store program memory ready */ .global atmega_spmrdy /* Store program memory ready */
#elif defined(CONFIG_ARCH_CHIP_ATMEGA1284P) #elif defined(CONFIG_ARCH_CHIP_ATMEGA1284P)
.global atmega_int0 /* External interrupt request 0 */ .global atmega_int0 /* External interrupt request 0 */
.global atmega_int1 /* External interrupt request 1 */ .global atmega_int1 /* External interrupt request 1 */
.global atmega_int2 /* External interrupt request 2 */ .global atmega_int2 /* External interrupt request 2 */
.global atmega_pcint0 /* Pin change interrupt request 0 */ .global atmega_pcint0 /* Pin change interrupt request 0 */
.global atmega_pcint1 /* Pin change interrupt request 1 */ .global atmega_pcint1 /* Pin change interrupt request 1 */
.global atmega_pcint2 /* Pin change interrupt request 2 */ .global atmega_pcint2 /* Pin change interrupt request 2 */
.global atmega_pcint3 /* Pin change interrupt request 3 */ .global atmega_pcint3 /* Pin change interrupt request 3 */
.global atmega_wdt /* Watchdog time-out interrupt */ .global atmega_wdt /* Watchdog time-out interrupt */
.global atmega_t2compa /* TIMER2 COMPA timer/counter2 compare match */ .global atmega_t2compa /* TIMER2 COMPA timer/counter2 compare match */
.global atmega_t2compb /* TIMER2 COMPB timer/counter2 compare match */ .global atmega_t2compb /* TIMER2 COMPB timer/counter2 compare match */
.global atmega_t2ovf /* TIMER2 OVF timer/counter2 overflow */ .global atmega_t2ovf /* TIMER2 OVF timer/counter2 overflow */
.global atmega_t1capt /* TIMER1 CAPT timer/counter1 capture event */ .global atmega_t1capt /* TIMER1 CAPT timer/counter1 capture event */
.global atmega_t1compa /* TIMER1 COMPA timer/counter1 compare match a */ .global atmega_t1compa /* TIMER1 COMPA timer/counter1 compare match a */
.global atmega_t1compb /* TIMER1 COMPB timer/counter1 compare match b */ .global atmega_t1compb /* TIMER1 COMPB timer/counter1 compare match b */
.global atmega_t1ovf /* TIMER1 OVF timer/counter1 overflow */ .global atmega_t1ovf /* TIMER1 OVF timer/counter1 overflow */
.global atmega_t0compa /* TIMER0 COMPA timer/counter0 compare match */ .global atmega_t0compa /* TIMER0 COMPA timer/counter0 compare match */
.global atmega_t0compb /* TIMER0 COMPB timer/counter0 compare match */ .global atmega_t0compb /* TIMER0 COMPB timer/counter0 compare match */
.global atmega_t0ovf /* TIMER0 OVF timer/counter0 overflow */ .global atmega_t0ovf /* TIMER0 OVF timer/counter0 overflow */
.global atmega_spi /* STC SPI serial transfer complete */ .global atmega_spi /* STC SPI serial transfer complete */
.global atmega_u0rx /* USART0 RX complete */ .global atmega_u0rx /* USART0 RX complete */
.global atmega_u0dre /* USART0 data register empty */ .global atmega_u0dre /* USART0 data register empty */
.global atmega_u0tx /* USART0 TX complete */ .global atmega_u0tx /* USART0 TX complete */
.global atmega_anacomp /* ANALOG COMP analog comparator */ .global atmega_anacomp /* ANALOG COMP analog comparator */
.global atmega_adc /* ADC conversion complete */ .global atmega_adc /* ADC conversion complete */
.global atmega_ee /* EEPROM ready */ .global atmega_ee /* EEPROM ready */
.global atmega_twi /* TWI two-wire serial interface */ .global atmega_twi /* TWI two-wire serial interface */
.global atmega_spmrdy /* Store program memory ready */ .global atmega_spmrdy /* Store program memory ready */
.global atmega_u1rx /* USART1 RX complete */ .global atmega_u1rx /* USART1 RX complete */
.global atmega_u1dre /* USART1 data register empty */ .global atmega_u1dre /* USART1 data register empty */
.global atmega_u1tx /* USART1 TX complete */ .global atmega_u1tx /* USART1 TX complete */
.global atmega_t3capt /* TIMER3 CAPT timer/counter3 capture event */ .global atmega_t3capt /* TIMER3 CAPT timer/counter3 capture event */
.global atmega_t3compa /* TIMER3 COMPA timer/counter3 compare match a */ .global atmega_t3compa /* TIMER3 COMPA timer/counter3 compare match a */
.global atmega_t3compb /* TIMER3 COMPB timer/counter3 compare match b */ .global atmega_t3compb /* TIMER3 COMPB timer/counter3 compare match b */
.global atmega_t3ovf /* TIMER3 OVF timer/counter3 overflow */ .global atmega_t3ovf /* TIMER3 OVF timer/counter3 overflow */
#else #else
#error "Unrecognized chip" #error "Unrecognized chip"
#endif #endif
@ -207,40 +207,40 @@ vectortab:
vector atmega_twi /* 33: TWI two-wire serial interface */ vector atmega_twi /* 33: TWI two-wire serial interface */
vector atmega_spmrdy /* 34: Store program memory ready */ vector atmega_spmrdy /* 34: Store program memory ready */
#elif defined(CONFIG_ARCH_CHIP_ATMEGA1284P) #elif defined(CONFIG_ARCH_CHIP_ATMEGA1284P)
vector atmega_int0 /* External interrupt request 0 */ vector atmega_int0 /* External interrupt request 0 */
vector atmega_int1 /* External interrupt request 1 */ vector atmega_int1 /* External interrupt request 1 */
vector atmega_int2 /* External interrupt request 2 */ vector atmega_int2 /* External interrupt request 2 */
vector atmega_pcint0 /* Pin change interrupt request 0 */ vector atmega_pcint0 /* Pin change interrupt request 0 */
vector atmega_pcint1 /* Pin change interrupt request 1 */ vector atmega_pcint1 /* Pin change interrupt request 1 */
vector atmega_pcint2 /* Pin change interrupt request 2 */ vector atmega_pcint2 /* Pin change interrupt request 2 */
vector atmega_pcint3 /* Pin change interrupt request 3 */ vector atmega_pcint3 /* Pin change interrupt request 3 */
vector atmega_wdt /* Watchdog time-out interrupt */ vector atmega_wdt /* Watchdog time-out interrupt */
vector atmega_t2compa /* TIMER2 COMPA timer/counter2 compare match */ vector atmega_t2compa /* TIMER2 COMPA timer/counter2 compare match */
vector atmega_t2compb /* TIMER2 COMPB timer/counter2 compare match */ vector atmega_t2compb /* TIMER2 COMPB timer/counter2 compare match */
vector atmega_t2ovf /* TIMER2 OVF timer/counter2 overflow */ vector atmega_t2ovf /* TIMER2 OVF timer/counter2 overflow */
vector atmega_t1capt /* TIMER1 CAPT timer/counter1 capture event */ vector atmega_t1capt /* TIMER1 CAPT timer/counter1 capture event */
vector atmega_t1compa /* TIMER1 COMPA timer/counter1 compare match a */ vector atmega_t1compa /* TIMER1 COMPA timer/counter1 compare match a */
vector atmega_t1compb /* TIMER1 COMPB timer/counter1 compare match b */ vector atmega_t1compb /* TIMER1 COMPB timer/counter1 compare match b */
vector atmega_t1ovf /* TIMER1 OVF timer/counter1 overflow */ vector atmega_t1ovf /* TIMER1 OVF timer/counter1 overflow */
vector atmega_t0compa /* TIMER0 COMPA timer/counter0 compare match */ vector atmega_t0compa /* TIMER0 COMPA timer/counter0 compare match */
vector atmega_t0compb /* TIMER0 COMPB timer/counter0 compare match */ vector atmega_t0compb /* TIMER0 COMPB timer/counter0 compare match */
vector atmega_t0ovf /* TIMER0 OVF timer/counter0 overflow */ vector atmega_t0ovf /* TIMER0 OVF timer/counter0 overflow */
vector atmega_spi /* STC SPI serial transfer complete */ vector atmega_spi /* STC SPI serial transfer complete */
vector atmega_u0rx /* USART0 RX complete */ vector atmega_u0rx /* USART0 RX complete */
vector atmega_u0dre /* USART0 data register empty */ vector atmega_u0dre /* USART0 data register empty */
vector atmega_u0tx /* USART0 TX complete */ vector atmega_u0tx /* USART0 TX complete */
vector atmega_anacomp /* ANALOG COMP analog comparator */ vector atmega_anacomp /* ANALOG COMP analog comparator */
vector atmega_adc /* ADC conversion complete */ vector atmega_adc /* ADC conversion complete */
vector atmega_ee /* EEPROM ready */ vector atmega_ee /* EEPROM ready */
vector atmega_twi /* TWI two-wire serial interface */ vector atmega_twi /* TWI two-wire serial interface */
vector atmega_spmrdy /* Store program memory ready */ vector atmega_spmrdy /* Store program memory ready */
vector atmega_u1rx /* USART1 RX complete */ vector atmega_u1rx /* USART1 RX complete */
vector atmega_u1dre /* USART1 data register empty */ vector atmega_u1dre /* USART1 data register empty */
vector atmega_u1tx /* USART1 TX complete */ vector atmega_u1tx /* USART1 TX complete */
vector atmega_t3capt /* TIMER3 CAPT timer/counter3 capture event */ vector atmega_t3capt /* TIMER3 CAPT timer/counter3 capture event */
vector atmega_t3compa /* TIMER3 COMPA timer/counter3 compare match a */ vector atmega_t3compa /* TIMER3 COMPA timer/counter3 compare match a */
vector atmega_t3compb /* TIMER3 COMPB timer/counter3 compare match b */ vector atmega_t3compb /* TIMER3 COMPB timer/counter3 compare match b */
vector atmega_t3ovf /* TIMER3 OVF timer/counter3 overflow */ vector atmega_t3ovf /* TIMER3 OVF timer/counter3 overflow */
#else #else
#error "Unrecognized chip" #error "Unrecognized chip"
#endif #endif
@ -267,7 +267,7 @@ __start:
/* Copy initial global data values from FLASH into RAM */ /* Copy initial global data values from FLASH into RAM */
.global __do_copy_data; /* Required to suppress dragging in logic from libgcc */ .global __do_copy_data; /* Required to suppress dragging in logic from libgcc */
__do_copy_data: __do_copy_data:
#ifdef HAVE_RAMPZ #ifdef HAVE_RAMPZ
@ -308,7 +308,7 @@ __do_copy_data:
/* Clear uninitialized data */ /* Clear uninitialized data */
.global __do_clear_bss; /* Required to suppress dragging in logic from libgcc */ .global __do_clear_bss; /* Required to suppress dragging in logic from libgcc */
__do_clear_bss: __do_clear_bss:
ldi r17, hi8(_ebss) ldi r17, hi8(_ebss)

4
arch/avr/src/atmega/atmega_lowconsole.c
View File

@ -52,7 +52,7 @@
#include "atmega_internal.h" #include "atmega_internal.h"
/****************************************************************************** /******************************************************************************
* Private Definitions * Pre-processor Definitions
******************************************************************************/ ******************************************************************************/
/* USART0 Baud rate settings for normal and double speed modes */ /* USART0 Baud rate settings for normal and double speed modes */
@ -329,6 +329,7 @@ void usart0_configure(void)
DDRD |= (1 << 1); /* Force Port D pin 1 to be an output -- should not be necessary */ DDRD |= (1 << 1); /* Force Port D pin 1 to be an output -- should not be necessary */
PORTD |= (1 << 0); /* Set pull-up on Port D pin 0 */ PORTD |= (1 << 0); /* Set pull-up on Port D pin 0 */
#else #else
/* Pin Configuration: None necessary, Port E bits 0&1 are automatically /* Pin Configuration: None necessary, Port E bits 0&1 are automatically
* configured: * configured:
@ -471,4 +472,3 @@ void up_lowputc(char ch)
# endif # endif
#endif #endif
} }