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All ARMV7-M IRQ setup: Always set the NVIC vector table address. This is needed in cases where the code is running with a bootload and when the code is running from RAM. It is also needed by the logic of up_ramvec_initialize() which gets the vector base address from the NVIC. Suggested by Pavel Pisa

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This commit is contained in:
Gregory Nutt 2015-08-21 08:42:24 -06:00
parent 0b3b104b74
commit da6c5aabdf
9 changed files with 161 additions and 39 deletions
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21
arch/arm/src/efm32/efm32_irq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/efm32/efm32_irq.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -79,8 +79,18 @@
* Public Data
****************************************************************************/
/* This is the address of current interrupt saved state data. Used for
* context switching. Only value during interrupt handling.
*/
volatile uint32_t *current_regs;
/* This is the address of the exception vector table (determined by the
* linker script).
*/
extern uint32_t _vectors[];
/****************************************************************************
* Private Data
****************************************************************************/
@ -363,6 +373,15 @@ void up_irqinitialize(void)
}
#endif
/* Make sure that we are using the correct vector table. The default
* vector address is 0x0000:0000 but if we are executing code that is
* positioned in SRAM or in external FLASH, then we may need to reset
* the interrupt vector so that it refers to the table in SRAM or in
* external FLASH.
*/
putreg32((uint32_t)_vectors, NVIC_VECTAB);
#ifdef CONFIG_ARCH_RAMVECTORS
/* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
* vector table that requires special initialization.

23
arch/arm/src/kinetis/kinetis_irq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc17/kinetis_irq.c
*
* Copyright (C) 2011, 2013-14 Gregory Nutt. All rights reserved.
* Copyright (C) 2011, 2013-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -75,8 +75,18 @@
* Public Data
****************************************************************************/
/* This is the address of current interrupt saved state data. Used for
* context switching. Only value during interrupt handling.
*/
volatile uint32_t *current_regs;
/* This is the address of the exception vector table (determined by the
* linker script).
*/
extern uint32_t _vectors[];
/****************************************************************************
* Private Data
****************************************************************************/
@ -341,11 +351,20 @@ void up_irqinitialize(void)
putreg32(0, regaddr);
}
/* Make sure that we are using the correct vector table. The default
* vector address is 0x0000:0000 but if we are executing code that is
* positioned in SRAM or in external FLASH, then we may need to reset
* the interrupt vector so that it refers to the table in SRAM or in
* external FLASH.
*/
putreg32((uint32_t)_vectors, NVIC_VECTAB);
#ifdef CONFIG_ARCH_RAMVECTORS
/* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
* vector table that requires special initialization.
*/
#ifdef CONFIG_ARCH_RAMVECTORS
up_ramvec_initialize();
#endif

10
arch/arm/src/lpc17xx/lpc17_irq.c
View File

@ -76,11 +76,17 @@
* Public Data
****************************************************************************/
/* This is the address of current interrupt saved state data. Used for
* context switching. Only value during interrupt handling.
*/
volatile uint32_t *current_regs;
/* This is the address of the vector table */
/* This is the address of the exception vector table (determined by the
* linker script).
*/
extern unsigned _vectors[];
extern uint32_t _vectors[];
/****************************************************************************
* Private Functions

23
arch/arm/src/lpc43xx/lpc43_irq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc43/lpc43_irq.c
*
* Copyright (C) 2012-2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2012-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -77,11 +77,17 @@
* Public Data
****************************************************************************/
/* This is the address of current interrupt saved state data. Used for
* context switching. Only value during interrupt handling.
*/
volatile uint32_t *current_regs;
/* This is the address of the vector table */
/* This is the address of the exception vector table (determined by the
* linker script).
*/
extern unsigned _vectors[];
extern uint32_t _vectors[];
/****************************************************************************
* Private Data
@ -316,15 +322,16 @@ void up_irqinitialize(void)
* positioned in SRAM or in external FLASH, then we may need to reset
* the interrupt vector so that it refers to the table in SRAM or in
* external FLASH.
*
* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
*/
putreg32((uint32_t)_vectors, NVIC_VECTAB);
#ifdef CONFIG_ARCH_RAMVECTORS
/* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
* vector table that requires special initialization.
*/
#ifdef CONFIG_ARCH_RAMVECTORS
up_ramvec_initialize();
#else
putreg32((uint32_t)_vectors, NVIC_VECTAB);
#endif
/* Set all interrupts (and exceptions) to the default priority */

26
arch/arm/src/sam34/sam_irq.c
View File

@ -78,7 +78,16 @@
* Public Data
****************************************************************************/
/* This is the address of current interrupt saved state data. Used for
* context switching. Only value during interrupt handling.
*/
volatile uint32_t *current_regs;
/* This is the address of the exception vector table (determined by the
* linker script).
*/
extern uint32_t _vectors[];
/****************************************************************************
@ -378,16 +387,21 @@ void up_irqinitialize(void)
}
#endif
/* Set up the vector table address.
*
* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
/* Make sure that we are using the correct vector table. The default
* vector address is 0x0000:0000 but if we are executing code that is
* positioned in SRAM or in external FLASH, then we may need to reset
* the interrupt vector so that it refers to the table in SRAM or in
* external FLASH.
*/
putreg32((uint32_t)_vectors, NVIC_VECTAB);
#ifdef CONFIG_ARCH_RAMVECTORS
/* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
* vector table that requires special initialization.
*/
#if defined(CONFIG_ARCH_RAMVECTORS)
up_ramvec_initialize();
#elif defined(CONFIG_SAM_BOOTLOADER)
putreg32((uint32_t)_vectors, NVIC_VECTAB);
#endif
/* Set all interrupts (and exceptions) to the default priority */

26
arch/arm/src/samv7/sam_irq.c
View File

@ -78,7 +78,16 @@
* Public Data
****************************************************************************/
/* This is the address of current interrupt saved state data. Used for
* context switching. Only value during interrupt handling.
*/
volatile uint32_t *current_regs;
/* This is the address of the exception vector table (determined by the
* linker script).
*/
extern uint32_t _vectors[];
/****************************************************************************
@ -378,16 +387,21 @@ void up_irqinitialize(void)
}
#endif
/* Set up the vector table address.
*
* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
/* Make sure that we are using the correct vector table. The default
* vector address is 0x0000:0000 but if we are executing code that is
* positioned in SRAM or in external FLASH, then we may need to reset
* the interrupt vector so that it refers to the table in SRAM or in
* external FLASH.
*/
putreg32((uint32_t)_vectors, NVIC_VECTAB);
#ifdef CONFIG_ARCH_RAMVECTORS
/* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
* vector table that requires special initialization.
*/
#if defined(CONFIG_ARCH_RAMVECTORS)
up_ramvec_initialize();
#elif defined(CONFIG_SAM_BOOTLOADER)
putreg32((uint32_t)_vectors, NVIC_VECTAB);
#endif
/* Set all interrupts (and exceptions) to the default priority */

23
arch/arm/src/stm32/stm32_irq.c
View File

@ -2,7 +2,7 @@
* arch/arm/src/stm32/stm32_irq.c
* arch/arm/src/chip/stm32_irq.c
*
* Copyright (C) 2009-2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -76,8 +76,18 @@
* Public Data
****************************************************************************/
/* This is the address of current interrupt saved state data. Used for
* context switching. Only value during interrupt handling.
*/
volatile uint32_t *current_regs;
/* This is the address of the exception vector table (determined by the
* linker script).
*/
extern uint32_t _vectors[];
/****************************************************************************
* Private Data
****************************************************************************/
@ -320,15 +330,16 @@ void up_irqinitialize(void)
* at address 0x0800:0000. If we are using the STMicro DFU bootloader, then
* the vector table will be offset to a different location in FLASH and we
* will need to set the NVIC vector location to this alternative location.
*
* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
*/
putreg32((uint32_t)_vectors, NVIC_VECTAB);
#ifdef CONFIG_ARCH_RAMVECTORS
/* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
* vector table that requires special initialization.
*/
#if defined(CONFIG_ARCH_RAMVECTORS)
up_ramvec_initialize();
#elif defined(CONFIG_STM32_DFU)
putreg32((uint32_t)_vectors, NVIC_VECTAB);
#endif
/* Set all interrupts (and exceptions) to the default priority */

26
arch/arm/src/stm32f7/stm32_irq.c
View File

@ -80,7 +80,16 @@
* Public Data
****************************************************************************/
/* This is the address of current interrupt saved state data. Used for
* context switching. Only value during interrupt handling.
*/
volatile uint32_t *current_regs;
/* This is the address of the exception vector table (determined by the
* linker script).
*/
extern uint32_t _vectors[];
/****************************************************************************
@ -412,16 +421,21 @@ void up_irqinitialize(void)
}
#endif
/* Set up the vector table address.
*
* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
/* Make sure that we are using the correct vector table. The default
* vector address is 0x0000:0000 but if we are executing code that is
* positioned in SRAM or in external FLASH, then we may need to reset
* the interrupt vector so that it refers to the table in SRAM or in
* external FLASH.
*/
putreg32((uint32_t)_vectors, NVIC_VECTAB);
#ifdef CONFIG_ARCH_RAMVECTORS
/* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
* vector table that requires special initialization.
*/
#if defined(CONFIG_ARCH_RAMVECTORS)
up_ramvec_initialize();
#elif defined(CONFIG_STM32F7_BOOTLOADER)
putreg32((uint32_t)_vectors, NVIC_VECTAB);
#endif
/* Set all interrupts (and exceptions) to the default priority */

22
arch/arm/src/tiva/tiva_irq.c
View File

@ -77,8 +77,18 @@
* Public Data
****************************************************************************/
/* This is the address of current interrupt saved state data. Used for
* context switching. Only value during interrupt handling.
*/
volatile uint32_t *current_regs;
/* This is the address of the exception vector table (determined by the
* linker script).
*/
extern uint32_t _vectors[];
/****************************************************************************
* Private Data
****************************************************************************/
@ -380,11 +390,20 @@ void up_irqinitialize(void)
putreg32(0, regaddr);
}
/* Make sure that we are using the correct vector table. The default
* vector address is 0x0000:0000 but if we are executing code that is
* positioned in SRAM or in external FLASH, then we may need to reset
* the interrupt vector so that it refers to the table in SRAM or in
* external FLASH.
*/
putreg32((uint32_t)_vectors, NVIC_VECTAB);
#ifdef CONFIG_ARCH_RAMVECTORS
/* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
* vector table that requires special initialization.
*/
#ifdef CONFIG_ARCH_RAMVECTORS
up_ramvec_initialize();
#endif
@ -392,7 +411,6 @@ void up_irqinitialize(void)
putreg32((uint32_t)CONFIG_RAM_START, NVIC_VECTAB);
#endif
/* Set all interrupts (and exceptions) to the default priority */
putreg32(DEFPRIORITY32, NVIC_SYSH4_7_PRIORITY);