STM32F7: default CONFIG_STM32F7_DMACAPABLE to 'n'. STM32F7 does not have CCM RAM but DTCM, so this option does not need to enabled. DTCM RAM is DMA-able through CPU AHBS bus.
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@ -1884,8 +1884,7 @@ config STM32F7_DTCM_PROCFS
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config STM32F7_DMACAPABLE
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bool "Workaround non-DMA capable memory"
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depends on ARCH_DMA
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default y if !STM32F7_CCMEXCLUDE
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default n if STM32F7_CCMEXCLUDE
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default n
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---help---
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This option enables the DMA interface stm32_dmacapable that can be
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used to check if it is possible to do DMA from the selected address.
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@ -635,8 +635,8 @@ struct stm32_ethmac_s
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* 1. Be a multiple of the D-Cache line size. This requirement is assured
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* by the definition of RXDMA buffer size above.
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* 2. Be aligned a D-Cache line boundaries, and
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* 3. Be positioned in DMA-able memory (*NOT* DTCM memory). This must
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* be managed by logic in the linker script file.
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* 3. Be positioned in DMA-able memory. This must be managed by logic
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* in the linker script file.
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*
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* These DMA buffers are defined sequentially here to best assure optimal
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* packing of the buffers.
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@ -383,8 +383,7 @@ static const struct uart_ops_s g_uart_dma_ops =
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* 1. Be a multiple of the D-Cache line size. This requirement is assured
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* by the definition of RXDMA buffer size above.
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* 2. Be aligned a D-Cache line boundaries, and
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* 3. Be positioned in DMA-able memory (*NOT* DTCM memory). This must
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* be managed by logic in the linker script file.
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* 3. Be positioned in DMA-able memory.
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*
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* These DMA buffers are defined sequentially here to best assure optimal
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* packing of the buffers.
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