STM32F7: default CONFIG_STM32F7_DMACAPABLE to 'n'. STM32F7 does not have CCM RAM but DTCM, so this option does not need to enabled. DTCM RAM is DMA-able through CPU AHBS bus.

This commit is contained in:
Jussi Kivilinna 2017-04-06 08:44:53 -06:00 committed by Gregory Nutt
parent e180522854
commit dabf45f100
3 changed files with 4 additions and 6 deletions

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@ -1884,8 +1884,7 @@ config STM32F7_DTCM_PROCFS
config STM32F7_DMACAPABLE
bool "Workaround non-DMA capable memory"
depends on ARCH_DMA
default y if !STM32F7_CCMEXCLUDE
default n if STM32F7_CCMEXCLUDE
default n
---help---
This option enables the DMA interface stm32_dmacapable that can be
used to check if it is possible to do DMA from the selected address.

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@ -635,8 +635,8 @@ struct stm32_ethmac_s
* 1. Be a multiple of the D-Cache line size. This requirement is assured
* by the definition of RXDMA buffer size above.
* 2. Be aligned a D-Cache line boundaries, and
* 3. Be positioned in DMA-able memory (*NOT* DTCM memory). This must
* be managed by logic in the linker script file.
* 3. Be positioned in DMA-able memory. This must be managed by logic
* in the linker script file.
*
* These DMA buffers are defined sequentially here to best assure optimal
* packing of the buffers.

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@ -383,8 +383,7 @@ static const struct uart_ops_s g_uart_dma_ops =
* 1. Be a multiple of the D-Cache line size. This requirement is assured
* by the definition of RXDMA buffer size above.
* 2. Be aligned a D-Cache line boundaries, and
* 3. Be positioned in DMA-able memory (*NOT* DTCM memory). This must
* be managed by logic in the linker script file.
* 3. Be positioned in DMA-able memory.
*
* These DMA buffers are defined sequentially here to best assure optimal
* packing of the buffers.