arch/stm32: Fix nxstyle errors
arch/arm/src/stm32/stm32_dma.h:
* Fix nxstyle issues.
This commit is contained in:
Nathan Hartman
Xiang Xiao
parent
ace6e70f57
commit
dad32ccd47
@ -1,4 +1,4 @@
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/************************************************************************************
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/****************************************************************************
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* arch/arm/src/stm32/stm32_dma.h
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*
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* Copyright (C) 2009, 2011-2013 Gregory Nutt. All rights reserved.
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@ -31,14 +31,14 @@
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32_STM32_DMA_H
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#define __ARCH_ARM_SRC_STM32_STM32_DMA_H
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/************************************************************************************
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/****************************************************************************
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* Included Files
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************************************************************************************/
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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@ -47,8 +47,8 @@
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#include "hardware/stm32_dma.h"
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/* These definitions provide the bit encoding of the 'status' parameter passed to the
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* DMA callback function (see dma_callback_t).
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/* These definitions provide the bit encoding of the 'status' parameter
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* passed to the DMA callback function (see dma_callback_t).
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*/
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#if defined(HAVE_IP_DMA_V1)
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@ -58,22 +58,22 @@
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# define DMA_STATUS_HTIF DMA_CHAN_HTIF_BIT /* Channel Half Transfer */
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# define DMA_STATUS_TCIF DMA_CHAN_TCIF_BIT /* Channel Transfer Complete */
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#elif defined(HAVE_IP_DMA_V2)
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# define DMA_STATUS_FEIF 0 /* Stream FIFO error (ignored) */
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# define DMA_STATUS_DMEIF DMA_STREAM_DMEIF_BIT /* Stream direct mode error */
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# define DMA_STATUS_TEIF DMA_STREAM_TEIF_BIT /* Stream Transfer Error */
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# define DMA_STATUS_HTIF DMA_STREAM_HTIF_BIT /* Stream Half Transfer */
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# define DMA_STATUS_TCIF DMA_STREAM_TCIF_BIT /* Stream Transfer Complete */
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# define DMA_STATUS_FEIF 0 /* Stream FIFO error (ignored) */
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# define DMA_STATUS_DMEIF DMA_STREAM_DMEIF_BIT /* Stream direct mode error */
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# define DMA_STATUS_TEIF DMA_STREAM_TEIF_BIT /* Stream Transfer Error */
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# define DMA_STATUS_HTIF DMA_STREAM_HTIF_BIT /* Stream Half Transfer */
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# define DMA_STATUS_TCIF DMA_STREAM_TCIF_BIT /* Stream Transfer Complete */
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#endif
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#define DMA_STATUS_ERROR (DMA_STATUS_FEIF|DMA_STATUS_DMEIF|DMA_STATUS_TEIF)
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#define DMA_STATUS_SUCCESS (DMA_STATUS_TCIF|DMA_STATUS_HTIF)
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#define DMA_STATUS_ERROR (DMA_STATUS_FEIF | DMA_STATUS_DMEIF | DMA_STATUS_TEIF)
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#define DMA_STATUS_SUCCESS (DMA_STATUS_TCIF | DMA_STATUS_HTIF)
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/************************************************************************************
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/****************************************************************************
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* Public Types
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************************************************************************************/
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****************************************************************************/
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/* DMA_HANDLE provides an opaque are reference that can be used to represent a DMA
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* channel (F1) or a DMA stream (F4).
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/* DMA_HANDLE provides an opaque are reference that can be used to represent
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* a DMA channel (F1) or a DMA stream (F4).
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*/
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typedef FAR void *DMA_HANDLE;
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@ -84,10 +84,10 @@ typedef FAR void *DMA_HANDLE;
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*
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* Input Parameters:
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* handle - Refers tot he DMA channel or stream
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* status - A bit encoded value that provides the completion status. See the
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* DMASTATUS_* definitions above.
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* arg - A user-provided value that was provided when stm32_dmastart() was
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* called.
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* status - A bit encoded value that provides the completion status. See
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* the DMASTATUS_* definitions above.
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* arg - A user-provided value that was provided when stm32_dmastart()
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* was called.
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*/
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typedef void (*dma_callback_t)(DMA_HANDLE handle, uint8_t status, void *arg);
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@ -120,9 +120,9 @@ struct stm32_dmaregs_s
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#endif
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#endif
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/************************************************************************************
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/****************************************************************************
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* Public Data
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************************************************************************************/
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****************************************************************************/
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#ifndef __ASSEMBLY__
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@ -135,9 +135,9 @@ extern "C"
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#define EXTERN extern
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#endif
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_dmachannel
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@ -184,11 +184,13 @@ DMA_HANDLE stm32_dmachannel(unsigned int chan);
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* Name: stm32_dmafree
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*
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* Description:
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* Release a DMA channel. If another thread is waiting for this DMA channel
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* in a call to stm32_dmachannel, then this function will re-assign the
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* DMA channel to that thread and wake it up. NOTE: The 'handle' used
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* in this argument must NEVER be used again until stm32_dmachannel() is
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* called again to re-gain access to the channel.
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* Release a DMA channel. If another thread is waiting for this DMA
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* channel in a call to stm32_dmachannel, then this function will re-
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* assign the DMA channel to that thread and wake it up.
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*
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* NOTE: The 'handle' used in this argument must NEVER be used again
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* until stm32_dmachannel() is called again to re-gain access to the
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* channel.
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*
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* Returned Value:
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* None
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@ -261,8 +263,8 @@ size_t stm32_dmaresidual(DMA_HANDLE handle);
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* Description:
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* Check if the DMA controller can transfer data to/from given memory
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* address with the given configuration. This depends on the internal
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* connections in the ARM bus matrix of the processor. Note that this
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* only applies to memory addresses, it will return false for any peripheral
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* connections in the ARM bus matrix of the processor. Note that this only
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* applies to memory addresses, it will return false for any peripheral
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* address.
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*
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* Returned Value:
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