arm/assert: fix build warning on clang
common/arm_assert.c:80:14: warning: format specifies type 'unsigned int' but the argument has type 'uint32_t' (aka 'unsigned long') [-Wformat] stack, ptr[0], ptr[1], ptr[2], ptr[3], ^~~~~ include/debug.h:119:59: note: expanded from macro '_alert' __arch_syslog(LOG_EMERG, EXTRA_FMT format EXTRA_ARG, ##__VA_ARGS__) ~~~~~~ ^~~~~~~~~~~ Signed-off-by: chao.an <anchao@xiaomi.com>
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@ -76,7 +76,9 @@ static void arm_stackdump(uint32_t sp, uint32_t stack_top)
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for (stack = sp & ~0x1f; stack < (stack_top & ~0x1f); stack += 32)
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for (stack = sp & ~0x1f; stack < (stack_top & ~0x1f); stack += 32)
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{
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{
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uint32_t *ptr = (uint32_t *)stack;
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uint32_t *ptr = (uint32_t *)stack;
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_alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
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_alert("%08" PRIx32 ": %08" PRIx32 " %08" PRIx32 " %08" PRIx32
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" %08" PRIx32 " %08" PRIx32 " %08" PRIx32 " %08" PRIx32
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" %08" PRIx32 "\n",
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stack, ptr[0], ptr[1], ptr[2], ptr[3],
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stack, ptr[0], ptr[1], ptr[2], ptr[3],
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ptr[4], ptr[5], ptr[6], ptr[7]);
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ptr[4], ptr[5], ptr[6], ptr[7]);
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}
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}
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@ -90,34 +92,42 @@ static void arm_registerdump(volatile uint32_t *regs)
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{
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{
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/* Dump the interrupt registers */
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/* Dump the interrupt registers */
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_alert("R0: %08x R1: %08x R2: %08x R3: %08x\n",
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_alert("R0: %08" PRIx32 " R1: %08" PRIx32
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" R2: %08" PRIx32 " R3: %08" PRIx32 "\n",
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regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3]);
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regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3]);
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#ifdef CONFIG_ARM_THUMB
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#ifdef CONFIG_ARM_THUMB
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_alert("R4: %08x R5: %08x R6: %08x FP: %08x\n",
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_alert("R4: %08" PRIx32 " R5: %08" PRIx32
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" R6: %08" PRIx32 " FP: %08" PRIx32 "\n",
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regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
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regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
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_alert("R8: %08x SB: %08x SL: %08x R11: %08x\n",
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_alert("R8: %08" PRIx32 " SB: %08" PRIx32
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" SL: %08" PRIx32 " R11: %08" PRIx32 "\n",
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regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11]);
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regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11]);
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#else
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#else
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_alert("R4: %08x R5: %08x R6: %08x R7: %08x\n",
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_alert("R4: %08" PRIx32 " R5: %08" PRIx32
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" R6: %08" PRIx32 " R7: %08" PRIx32 "\n",
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regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
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regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
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_alert("R8: %08x SB: %08x SL: %08x FP: %08x\n",
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_alert("R8: %08" PRIx32 " SB: %08" PRIx32
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" SL: %08" PRIx32 " FP: %08" PRIx32 "\n",
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regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11]);
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regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11]);
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#endif
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#endif
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_alert("IP: %08x SP: %08x LR: %08x PC: %08x\n",
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_alert("IP: %08" PRIx32 " SP: %08" PRIx32
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" LR: %08" PRIx32 " PC: %08" PRIx32 "\n",
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regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
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regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
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#if defined(REG_BASEPRI)
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#if defined(REG_BASEPRI)
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_alert("xPSR: %08x BASEPRI: %08x CONTROL: %08x\n",
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_alert("xPSR: %08" PRIx32 " BASEPRI: %08" PRIx32
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" CONTROL: %08" PRIx32 "\n",
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regs[REG_XPSR], regs[REG_BASEPRI], getcontrol());
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regs[REG_XPSR], regs[REG_BASEPRI], getcontrol());
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#elif defined(REG_PRIMASK)
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#elif defined(REG_PRIMASK)
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_alert("xPSR: %08x PRIMASK: %08x CONTROL: %08x\n",
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_alert("xPSR: %08" PRIx32 " PRIMASK: %08" PRIx32
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" CONTROL: %08" PRIx32 "\n",
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regs[REG_XPSR], regs[REG_PRIMASK], getcontrol());
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regs[REG_XPSR], regs[REG_PRIMASK], getcontrol());
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#elif defined(REG_CPSR)
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#elif defined(REG_CPSR)
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_alert("CPSR: %08x\n", regs[REG_CPSR]);
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_alert("CPSR: %08" PRIx32 "\n", regs[REG_CPSR]);
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#endif
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#endif
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#ifdef REG_EXC_RETURN
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#ifdef REG_EXC_RETURN
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_alert("EXC_RETURN: %08x\n", regs[REG_EXC_RETURN]);
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_alert("EXC_RETURN: %08" PRIx32 "\n", regs[REG_EXC_RETURN]);
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#endif
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#endif
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}
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}
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@ -328,9 +338,9 @@ static void arm_dump_stack(const char *tag, uint32_t sp,
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uint32_t top = base + size;
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uint32_t top = base + size;
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_alert("%s Stack:\n", tag);
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_alert("%s Stack:\n", tag);
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_alert("sp: %08x\n", sp);
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_alert("sp: %08" PRIx32 "\n", sp);
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_alert(" base: %08x\n", base);
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_alert(" base: %08" PRIx32 "\n", base);
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_alert(" size: %08x\n", size);
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_alert(" size: %08" PRIx32 "\n", size);
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if (sp >= base && sp < top)
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if (sp >= base && sp < top)
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{
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{
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