Make it clear that GIC support is GICv2
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@ -5,7 +5,7 @@
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comment "ARMv7-A Configuration Options"
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comment "ARMv7-A Configuration Options"
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config ARMV7A_HAVE_GIC
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config ARMV7A_HAVE_GICv2
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bool
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bool
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default n
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default n
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---help---
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---help---
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@ -1,5 +1,5 @@
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/****************************************************************************
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/****************************************************************************
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* arch/arm/src/armv7-a/arm_gic.c
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* arch/arm/src/armv7-a/arm_gicv2.c
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*
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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@ -52,7 +52,7 @@
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#include "up_internal.h"
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#include "up_internal.h"
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#include "gic.h"
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#include "gic.h"
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#ifdef CONFIG_ARMV7A_HAVE_GIC
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#ifdef CONFIG_ARMV7A_HAVE_GICv2
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/****************************************************************************
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/****************************************************************************
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* Public Functions
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* Public Functions
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@ -534,4 +534,4 @@ int arm_cpu_sgi(int sgi, unsigned int cpuset)
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return OK;
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return OK;
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}
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}
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#endif /* CONFIG_ARMV7A_HAVE_GIC */
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#endif /* CONFIG_ARMV7A_HAVE_GICv2 */
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@ -1,6 +1,6 @@
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/****************************************************************************
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/****************************************************************************
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* arch/arm/src/armv7-a/gic.h
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* arch/arm/src/armv7-a/gic.h
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* Generic Interrupt Controller Definitions
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* Generic Interrupt Controller Version 2 Definitions
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*
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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@ -52,7 +52,7 @@
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#include <stdint.h>
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#include <stdint.h>
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#include "mpcore.h"
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#include "mpcore.h"
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#ifdef CONFIG_ARMV7A_HAVE_GIC
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#ifdef CONFIG_ARMV7A_HAVE_GICv2
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/****************************************************************************
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/****************************************************************************
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* Pre-processor Definitions
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* Pre-processor Definitions
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@ -631,5 +631,5 @@ int arm_pause_handler(int irq, FAR void *context);
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#endif
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_ARMV7A_HAVE_GIC */
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#endif /* CONFIG_ARMV7A_HAVE_GICv2 */
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#endif /* __ARCH_ARM_SRC_ARMV7_A_GIC_H */
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#endif /* __ARCH_ARM_SRC_ARMV7_A_GIC_H */
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@ -20,21 +20,21 @@ config ARCH_CHIP_IMX6_6SOLO
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config ARCH_CHIP_IMX6_6DUALLITE
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config ARCH_CHIP_IMX6_6DUALLITE
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bool "i.MX 6DualLite"
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bool "i.MX 6DualLite"
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select ARCH_HAVE_MULTICPU
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select ARCH_HAVE_MULTICPU
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select ARMV7A_HAVE_GIC
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select ARMV7A_HAVE_GICv2
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select ARMV7A_HAVE_GTM
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select ARMV7A_HAVE_GTM
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select ARMV7A_HAVE_PTM
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select ARMV7A_HAVE_PTM
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config ARCH_CHIP_IMX6_6DUAL
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config ARCH_CHIP_IMX6_6DUAL
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bool "i.MX 6Dual"
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bool "i.MX 6Dual"
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select ARCH_HAVE_MULTICPU
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select ARCH_HAVE_MULTICPU
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select ARMV7A_HAVE_GIC
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select ARMV7A_HAVE_GICv2
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select ARMV7A_HAVE_GTM
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select ARMV7A_HAVE_GTM
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select ARMV7A_HAVE_PTM
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select ARMV7A_HAVE_PTM
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config ARCH_CHIP_IMX6_6QUAD
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config ARCH_CHIP_IMX6_6QUAD
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bool "i.MX 6Quad"
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bool "i.MX 6Quad"
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select ARCH_HAVE_MULTICPU
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select ARCH_HAVE_MULTICPU
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select ARMV7A_HAVE_GIC
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select ARMV7A_HAVE_GICv2
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select ARMV7A_HAVE_GTM
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select ARMV7A_HAVE_GTM
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select ARMV7A_HAVE_PTM
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select ARMV7A_HAVE_PTM
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@ -71,7 +71,7 @@ CMN_CSRCS += up_puts.c up_mdelay.c up_stackframe.c up_udelay.c
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CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
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CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
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CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c
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CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c
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CMN_CSRCS += arm_doirq.c arm_gic.c arm_initialstate.c arm_mmu.c
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CMN_CSRCS += arm_doirq.c arm_gicv2.c arm_initialstate.c arm_mmu.c
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CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_reprioritizertr.c
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CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
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CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c
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CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c
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