reconcile architectures w/o interrupt controllers

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1153 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2008-11-07 16:59:36 +00:00
parent eb5a191b24
commit dcca7be53e
14 changed files with 68 additions and 66 deletions

View File

@ -1327,6 +1327,12 @@ The system can be re-made subsequently by just typing <code>make</code>.
For use in C code</li>
<li><code>CONFIG_ENDIAN_BIG</code>:
Define if big endian (default is little endian).</li>
<li><code>CONFIG_ARCH_NOINTC</code>:
Define if the architecture does not support an interrupt controller
or otherwise cannot support APIs like up_enable_irq() and up_disable_irq().</li>
<li><code>CONFIG_ARCH_IRQPRIO</code>:
Define if the architecture suports prioritizaton of interrupts and the
up_prioritize_irq() API.</li>
</ul>
<p>

View File

@ -110,8 +110,6 @@ extern "C" {
* Public Functions
************************************************************************************/
EXTERN int up_irqpriority(int irq, ubyte priority); /* Set interrupt priority (0-15) */
#undef EXTERN
#ifdef __cplusplus
}

View File

@ -169,14 +169,14 @@ void up_maskack_irq(int irq)
}
/****************************************************************************
* Name: up_irqpriority
* Name: up_prioritize_irq
*
* Description:
* set interrupt priority
*
****************************************************************************/
int up_irqpriority(int irq, ubyte priority)
int up_prioritize_irq(int irq, int priority)
{
uint32 addr;
uint32 reg32;

View File

@ -184,7 +184,7 @@ void up_timerinit(void)
/* Set the IRQ interrupt priority */
up_irqpriority(STR71X_IRQ_SYSTIMER, 1);
up_prioritize_irq(STR71X_IRQ_SYSTIMER, 1);
/* Attach the timer interrupt vector */

View File

@ -81,7 +81,7 @@ void up_doirq(int irq, uint32* regs)
current_regs = regs;
/* Mask and acknowledge the interrupt */
/* Mask and acknowledge the interrupt (if supported by the chip) */
up_maskack_irq(irq);

View File

@ -171,9 +171,13 @@ extern void up_wdtinit(void);
extern void up_timerinit(void);
/* Defined in up_irq.c */
/* Defined in chip-specific logic if CONFIG_ARCH_NOINTC is not set */
#ifndef CONFIG_ARCH_NOINTC
extern void up_maskack_irq(int irq);
#else
# define up_maskack_irq(irq)
#endif
/* Defined in board/up_leds.c */

View File

@ -232,7 +232,7 @@ __start0:
add #4, r0 /* R0: Address of next byte to clear in BSS */
cmp/ge r0, r1 /* End of BSS? */
bt 3b /* Loop until the end of BSS */
nop /* Delay slot
nop /* Delay slot */
/* Configure the uart so that we can get debug output as soon
* as possible.

View File

@ -88,54 +88,14 @@ void up_irqinitialize(void)
}
/****************************************************************************
* Name: up_disable_irq
*
* Description:
* Disable the IRQ specified by 'irq'
*
****************************************************************************/
void up_disable_irq(int irq)
{
#warning "To be provided"
}
/****************************************************************************
* Name: up_enable_irq
*
* Description:
* Enable the IRQ specified by 'irq'
*
****************************************************************************/
void up_enable_irq(int irq)
{
#warning "To be provided"
}
/****************************************************************************
* Name: up_maskack_irq
*
* Description:
* Mask the IRQ and acknowledge it
*
****************************************************************************/
void up_maskack_irq(int irq)
{
#warning "To be provided"
}
/****************************************************************************
* Name: up_irqpriority
* Name: up_prioritize_irq
*
* Description:
* set interrupt priority
*
****************************************************************************/
#warning "Should this be supported?"
void up_irqpriority(int irq, ubyte priority)
void up_prioritize_irq(int irq, int priority)
{
#warning "To be provided"
}

View File

@ -425,24 +425,16 @@ static int up_attach(struct uart_dev_s *dev)
/* Attach the RDR full IRQ */
ret = irq_attach(priv->irq + , up_interrupt);
ret = irq_attach(priv->irq + SH1_RXI_IRQ_OFFSET, up_interrupt);
if (ret == OK)
{
/* Enable the interrupt
*/
/* Attach the TDR empty IRQ */
up_enable_irq(priv->irq);
}
/* Enable the RDR full and TDR empty interrupts at the interupt controller
* (RX and TX interrupts are still disabled in the SCI)
*/
if (ret == OK)
{
up_enable_irq(priv->irq);
up_enable_irq(priv->irq);
ret = irq_attach(priv->irq + SH1_TXI_IRQ_OFFSET, up_interrupt);
if (ret < 0)
{
(void)irq_detach(priv->irq + SH1_RXI_IRQ_OFFSET);
}
}
return ret;

View File

@ -104,7 +104,7 @@ void up_timerinit(void)
/* Set the IRQ interrupt priority */
up_irqpriority(STR71X_IRQ_SYSTIMER, 1);
up_prioritize_irq(STR71X_IRQ_SYSTIMER, 1);
/* Attach the timer interrupt vector */

View File

@ -126,6 +126,12 @@ defconfig -- This is a configuration file similar to the Linux
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_ARCH_NOINTC - define if the architecture does not
support an interrupt controller or otherwise cannot support
APIs like up_enable_irq() and up_disable_irq().
CONFIG_ARCH_IRQPRIO
Define if the architecture suports prioritizaton of interrupts
and the up_prioritize_irq() API.
Some architectures require a description of the RAM configuration:

View File

@ -46,6 +46,12 @@
# the board that supports the particular chip or SoC.
# CONFIG_ENDIAN_BIG - define if big endian (default is little endian)
# CONFIG_ARCH_BOARD_name - for use in C code
# CONFIG_ARCH_NOINTC - define if the architecture does not
# support an interrupt controller or otherwise cannot support
# APIs like up_enable_irq() and up_disable_irq().
# CONFIG_ARCH_IRQPRIO
# Define if the architecture suports prioritizaton of interrupts
# and the up_prioritize_irq() API.
# CONFIG_BOARD_LOOPSPERMSEC - for delay loops
# CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to Olimex STR-P711
# CONFIG_ARCH_BUTTONS - Support reading buttons. Unique to Olimex STR-P711
@ -62,6 +68,8 @@ CONFIG_ARCH_CHIP=str71x
CONFIG_ARCH_STR71X=y
CONFIG_ARCH_BOARD=olimex-strp711
CONFIG_ARCH_BOARD_OLIMEX_STRP711=y
CONFIG_ARCH_NOINTC=n
CONFIG_ARCH_IRQPRIO=y
CONFIG_BOARD_LOOPSPERMSEC=3270
CONFIG_ARCH_LEDS=y
CONFIG_ARCH_BUTTONS=y

View File

@ -46,6 +46,12 @@
# the board that supports the particular chip or SoC.
# CONFIG_ENDIAN_BIG - define if big endian (default is little endian)
# CONFIG_ARCH_BOARD_name - for use in C code
# CONFIG_ARCH_NOINTC - define if the architecture does not
# support an interrupt controller or otherwise cannot support
# APIs like up_enable_irq() and up_disable_irq().
# CONFIG_ARCH_IRQPRIO
# Define if the architecture suports prioritizaton of interrupts
# and the up_prioritize_irq() API.
# CONFIG_ENDIAN_BIG - Define for big-endian operation
# CONFIG_BOARD_LOOPSPERMSEC - for delay loops
# CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to Olimex STR-P711
@ -65,6 +71,8 @@ CONFIG_ARCH_SH7032=y
CONFIG_ARCH_BOARD=us7032evb1
CONFIG_ARCH_BOARD_US7032EVB1=y
CONFIG_ENDIAN_BIG=y
CONFIG_ARCH_NOINTC=y
CONFIG_ARCH_IRQPRIO=y
CONFIG_BOARD_LOOPSPERMSEC=3270
CONFIG_ARCH_LEDS=y
CONFIG_ARCH_BUTTONS=y

View File

@ -394,7 +394,9 @@ EXTERN boolean up_interrupt_context(void);
*
****************************************************************************/
#ifndef CONFIG_ARCH_NOINTC
EXTERN void up_enable_irq(int irq);
#endif
/****************************************************************************
* Name: up_disable_irq
@ -410,7 +412,25 @@ EXTERN void up_enable_irq(int irq);
*
****************************************************************************/
#ifndef CONFIG_ARCH_NOINTC
EXTERN void up_disable_irq(int irq);
#endif
/****************************************************************************
* Name: up_prioritize_irq
*
* Description:
* Set the priority of an IRQ.
*
* Since this API is not supported on all architectures, it should be
* avoided in common implementations where possible.
*
****************************************************************************/
#ifdef CONFIG_ARCH_IRQPRIO
EXTERN int up_prioritize_irq(int irq, int priority);
#endif
/****************************************************************************
* These are standard interfaces that are exported by the OS