From dd1d980c3a5a29f825a4d7369b180ab59035a39f Mon Sep 17 00:00:00 2001 From: Xiang Xiao Date: Mon, 5 Apr 2021 13:01:15 +0800 Subject: [PATCH] arch/sim: Move setjmp/longjmp to libc/machine/sim Signed-off-by: Xiang Xiao --- arch/Kconfig | 2 + arch/sim/include/irq.h | 32 +--- arch/sim/include/setjmp.h | 146 ++++++++++++++++++ arch/sim/src/Makefile | 4 - arch/sim/src/nuttx-names.in | 2 + arch/sim/src/sim/up_blocktask.c | 6 +- arch/sim/src/sim/up_cpuidlestack.c | 2 - arch/sim/src/sim/up_exit.c | 3 +- arch/sim/src/sim/up_internal.h | 69 --------- arch/sim/src/sim/up_interruptcontext.c | 4 +- arch/sim/src/sim/up_releasepending.c | 6 +- arch/sim/src/sim/up_releasestack.c | 2 - arch/sim/src/sim/up_reprioritizertr.c | 6 +- arch/sim/src/sim/up_schedulesigaction.c | 1 - arch/sim/src/sim/up_stackframe.c | 2 - arch/sim/src/sim/up_unblocktask.c | 6 +- arch/sim/src/sim/up_vfork.c | 1 - arch/sim/src/sim/up_vfork32.S | 3 +- arch/sim/src/sim/up_vfork64.S | 3 +- arch/sim/src/sim/up_vfork_arm.S | 4 +- libs/libc/machine/risc-v/common/Make.defs | 2 +- libs/libc/machine/sim/Make.defs | 26 +++- .../libc/machine/sim/arch_setjmp.S | 20 +-- .../libc/machine/sim/arch_setjmp64.S | 20 +-- .../libc/machine/sim/arch_setjmp_arm.S | 14 +- 25 files changed, 225 insertions(+), 161 deletions(-) create mode 100644 arch/sim/include/setjmp.h rename arch/sim/src/sim/up_setjmp32.S => libs/libc/machine/sim/arch_setjmp.S (88%) rename arch/sim/src/sim/up_setjmp64.S => libs/libc/machine/sim/arch_setjmp64.S (93%) rename arch/sim/src/sim/up_setjmp_arm.S => libs/libc/machine/sim/arch_setjmp_arm.S (95%) diff --git a/arch/Kconfig b/arch/Kconfig index bacc1ec4bd..ac10cd2383 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -76,6 +76,8 @@ config ARCH_SIM select ARCH_HAVE_POWEROFF select ARCH_HAVE_TESTSET select ARCH_HAVE_VFORK + select ARCH_HAVE_SETJMP + select ARCH_SETJMP_H select ALARM_ARCH select ONESHOT select SERIAL_CONSOLE diff --git a/arch/sim/include/irq.h b/arch/sim/include/irq.h index a0c96cf904..94b85dcaf7 100644 --- a/arch/sim/include/irq.h +++ b/arch/sim/include/irq.h @@ -25,48 +25,30 @@ #ifndef __ARCH_SIM_INCLUDE_IRQ_H #define __ARCH_SIM_INCLUDE_IRQ_H +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ #define NR_IRQS 64 -/* Number of registers saved in context switch */ - -#if defined(CONFIG_HOST_X86_64) && !defined(CONFIG_SIM_M32) - /* Storage order: %rbx, %rsp, %rbp, %r12, %r13, %r14, %r15, %rip */ - -# define XCPTCONTEXT_REGS 8 -# define XCPTCONTEXT_SIZE (8 * XCPTCONTEXT_REGS) -#elif defined(CONFIG_HOST_X86) || defined(CONFIG_SIM_M32) - /* Storage order: %ebx, %esi, %edi, %ebp, sp, and return PC */ - -# define XCPTCONTEXT_REGS 6 -# define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS) -#elif defined(CONFIG_HOST_ARM) -# define XCPTCONTEXT_REGS 16 -# define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS) -#endif - /**************************************************************************** * Public Types ****************************************************************************/ #ifndef __ASSEMBLY__ -#if defined(CONFIG_HOST_X86_64) && !defined(CONFIG_SIM_M32) -typedef unsigned long xcpt_reg_t; -#else -typedef unsigned int xcpt_reg_t; -#endif - /* This struct defines the way the registers are stored */ struct xcptcontext { void *sigdeliver; /* Actual type is sig_deliver_t */ - - xcpt_reg_t regs[XCPTCONTEXT_REGS]; + jmp_buf regs; }; #endif diff --git a/arch/sim/include/setjmp.h b/arch/sim/include/setjmp.h new file mode 100644 index 0000000000..a564b57c1b --- /dev/null +++ b/arch/sim/include/setjmp.h @@ -0,0 +1,146 @@ +/**************************************************************************** + * arch/sim/include/setjmp.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_SIM_INCLUDE_SETJUMP_H +#define __ARCH_SIM_INCLUDE_SETJUMP_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Number of registers saved in context switch */ + +#if defined(CONFIG_HOST_X86_64) && !defined(CONFIG_SIM_M32) + /* Storage order: %rbx, %rsp, %rbp, %r12, %r13, %r14, %r15, %rip */ + +# define XCPTCONTEXT_REGS 8 +# define XCPTCONTEXT_SIZE (8 * XCPTCONTEXT_REGS) + +# ifdef __ASSEMBLY__ +# define JB_RBX (0*8) +# define JB_RSP (1*8) +# define JB_RBP (2*8) +# define JB_R12 (3*8) +# define JB_R13 (4*8) +# define JB_R14 (5*8) +# define JB_R15 (6*8) +# define JB_RSI (7*8) + +# else +# define JB_RBX (0) +# define JB_RSP (1) +# define JB_RBP (2) +# define JB_R12 (3) +# define JB_R13 (4) +# define JB_R14 (5) +# define JB_R15 (6) +# define JB_RSI (7) + +# endif /* __ASSEMBLY__ */ + +/* Compatibility definitions */ + +# define JB_FP JB_RBP +# define JB_SP JB_RSP +# define JB_PC JB_RSI + +#elif defined(CONFIG_HOST_X86) || defined(CONFIG_SIM_M32) + /* Storage order: %ebx, %esi, %edi, %ebp, sp, and return PC */ + +# define XCPTCONTEXT_REGS 6 +# define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS) + +# ifdef __ASSEMBLY__ +# define JB_EBX (0*4) +# define JB_ESI (1*4) +# define JB_EDI (2*4) +# define JB_EBP (3*4) +# define JB_SP (4*4) +# define JB_PC (5*4) + +# else +# define JB_EBX (0) +# define JB_ESI (1) +# define JB_EDI (2) +# define JB_EBP (3) +# define JB_SP (4) +# define JB_PC (5) + +# endif /* __ASSEMBLY__ */ + +/* Compatibility definitions */ + +# define JB_FP JB_EBP + +#elif defined(CONFIG_HOST_ARM) +# define XCPTCONTEXT_REGS 16 +# define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS) + +# define JB_FP 7 +# define JB_SP 8 +# define JB_PC 9 +#endif + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#if defined(CONFIG_HOST_X86_64) && !defined(CONFIG_SIM_M32) +typedef unsigned long xcpt_reg_t; +#else +typedef unsigned int xcpt_reg_t; +#endif + +typedef xcpt_reg_t jmp_buf[XCPTCONTEXT_REGS]; +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +int setjmp(jmp_buf env); +void longjmp(jmp_buf env, int val) noreturn_function; + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __ARCH_SIM_INCLUDE_SETJUMP_H */ diff --git a/arch/sim/src/Makefile b/arch/sim/src/Makefile index cf56d7d189..0819f388e1 100644 --- a/arch/sim/src/Makefile +++ b/arch/sim/src/Makefile @@ -41,17 +41,13 @@ REQUIREDOBJS = $(LINKOBJS) ifeq ($(CONFIG_HOST_X86_64),y) ifeq ($(CONFIG_SIM_M32),y) - ASRCS += up_setjmp32.S ASRCS += up_vfork32.S else - ASRCS += up_setjmp64.S ASRCS += up_vfork64.S endif else ifeq ($(CONFIG_HOST_X86),y) - ASRCS += up_setjmp32.S ASRCS += up_vfork32.S else ifeq ($(CONFIG_HOST_ARM),y) - ASRCS += up_setjmp_arm.S ASRCS += up_vfork_arm.S endif diff --git a/arch/sim/src/nuttx-names.in b/arch/sim/src/nuttx-names.in index d59e436d71..776d1ddea2 100644 --- a/arch/sim/src/nuttx-names.in +++ b/arch/sim/src/nuttx-names.in @@ -47,6 +47,7 @@ NXSYMBOLS(fsync) NXSYMBOLS(ftruncate) NXSYMBOLS(if_nametoindex) NXSYMBOLS(ioctl) +NXSYMBOLS(longjmp) NXSYMBOLS(lseek) NXSYMBOLS(malloc) NXSYMBOLS(mallinfo) @@ -83,6 +84,7 @@ NXSYMBOLS(rmdir) NXSYMBOLS(sched_yield) NXSYMBOLS(select) NXSYMBOLS(sendmsg) +NXSYMBOLS(setjmp) NXSYMBOLS(shutdown) NXSYMBOLS(sigaction) NXSYMBOLS(sigaddset) diff --git a/arch/sim/src/sim/up_blocktask.c b/arch/sim/src/sim/up_blocktask.c index 4a843c834c..48195301cd 100644 --- a/arch/sim/src/sim/up_blocktask.c +++ b/arch/sim/src/sim/up_blocktask.c @@ -106,11 +106,11 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state) } /* Copy the exception context into the TCB at the (old) head of the - * ready-to-run Task list. if up_setjmp returns a non-zero + * ready-to-run Task list. if setjmp returns a non-zero * value, then this is really the previously running task restarting! */ - else if (!up_setjmp(rtcb->xcp.regs)) + else if (!setjmp(rtcb->xcp.regs)) { /* Restore the exception context of the rtcb at the (new) head * of the ready-to-run task list. @@ -125,7 +125,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state) /* Then switch contexts */ - up_longjmp(rtcb->xcp.regs, 1); + longjmp(rtcb->xcp.regs, 1); } else { diff --git a/arch/sim/src/sim/up_cpuidlestack.c b/arch/sim/src/sim/up_cpuidlestack.c index b4db71eb51..e878f2c810 100644 --- a/arch/sim/src/sim/up_cpuidlestack.c +++ b/arch/sim/src/sim/up_cpuidlestack.c @@ -29,8 +29,6 @@ #include #include -#include "up_internal.h" - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/arch/sim/src/sim/up_exit.c b/arch/sim/src/sim/up_exit.c index 5269d137fb..ca15be3aef 100644 --- a/arch/sim/src/sim/up_exit.c +++ b/arch/sim/src/sim/up_exit.c @@ -31,7 +31,6 @@ #include "task/task.h" #include "sched/sched.h" -#include "up_internal.h" /**************************************************************************** * Public Functions @@ -79,7 +78,7 @@ void up_exit(int status) /* Then switch contexts */ - up_longjmp(tcb->xcp.regs, 1); + longjmp(tcb->xcp.regs, 1); /* The function does not return */ diff --git a/arch/sim/src/sim/up_internal.h b/arch/sim/src/sim/up_internal.h index a201af15a0..8a00b25687 100644 --- a/arch/sim/src/sim/up_internal.h +++ b/arch/sim/src/sim/up_internal.h @@ -49,70 +49,6 @@ # endif #endif -/* Context Switching Definitions ********************************************/ - -#if defined(CONFIG_HOST_X86_64) && !defined(CONFIG_SIM_M32) - /* Storage order: %rbx, %rsp, %rbp, %r12, %r13, %r14, %r15, %rip */ - -# ifdef __ASSEMBLY__ -# define JB_RBX (0*8) -# define JB_RSP (1*8) -# define JB_RBP (2*8) -# define JB_R12 (3*8) -# define JB_R13 (4*8) -# define JB_R14 (5*8) -# define JB_R15 (6*8) -# define JB_RSI (7*8) - -# else -# define JB_RBX (0) -# define JB_RSP (1) -# define JB_RBP (2) -# define JB_R12 (3) -# define JB_R13 (4) -# define JB_R14 (5) -# define JB_R15 (6) -# define JB_RSI (7) - -# endif /* __ASSEMBLY__ */ - -/* Compatibility definitions */ - -# define JB_FP JB_RBP -# define JB_SP JB_RSP -# define JB_PC JB_RSI - -#elif defined(CONFIG_HOST_X86) || defined(CONFIG_SIM_M32) -/* Storage order: %ebx, $esi, %edi, %ebp, sp, and return PC */ - -# ifdef __ASSEMBLY__ -# define JB_EBX (0*4) -# define JB_ESI (1*4) -# define JB_EDI (2*4) -# define JB_EBP (3*4) -# define JB_SP (4*4) -# define JB_PC (5*4) - -# else -# define JB_EBX (0) -# define JB_ESI (1) -# define JB_EDI (2) -# define JB_EBP (3) -# define JB_SP (4) -# define JB_PC (5) - -# endif /* __ASSEMBLY__ */ - -/* Compatibility definitions */ - -# define JB_FP JB_EBP - -#elif defined(CONFIG_HOST_ARM) -# define JB_FP 7 -# define JB_SP 8 -# define JB_PC 9 -#endif - /* Simulated Heap Definitions ***********************************************/ /* Size of the simulated heap */ @@ -202,11 +138,6 @@ void *up_doirq(int irq, void *regs); void host_abort(int status); -/* up_setjmp32.S ************************************************************/ - -int up_setjmp(void *jb); -void up_longjmp(void *jb, int val); - /* up_hostmemory.c **********************************************************/ void *host_alloc_heap(size_t sz); diff --git a/arch/sim/src/sim/up_interruptcontext.c b/arch/sim/src/sim/up_interruptcontext.c index b1731a9de4..78a8d3134d 100644 --- a/arch/sim/src/sim/up_interruptcontext.c +++ b/arch/sim/src/sim/up_interruptcontext.c @@ -63,7 +63,7 @@ void *up_doirq(int irq, void *context) */ #ifdef CONFIG_SMP - if (up_setjmp(regs) == 0) + if (setjmp(regs) == 0) { #endif @@ -95,7 +95,7 @@ void *up_doirq(int irq, void *context) /* Then switch contexts */ - up_longjmp(regs, 1); + longjmp(regs, 1); } #endif diff --git a/arch/sim/src/sim/up_releasepending.c b/arch/sim/src/sim/up_releasepending.c index 4c28e80872..f1b3b8875a 100644 --- a/arch/sim/src/sim/up_releasepending.c +++ b/arch/sim/src/sim/up_releasepending.c @@ -75,11 +75,11 @@ void up_release_pending(void) } /* Copy the exception context into the TCB of the task that was - * currently active. if up_setjmp returns a non-zero value, then + * currently active. if setjmp returns a non-zero value, then * this is really the previously running task restarting! */ - else if (!up_setjmp(rtcb->xcp.regs)) + else if (!setjmp(rtcb->xcp.regs)) { /* Restore the exception context of the rtcb at the (new) head * of the ready-to-run task list. @@ -94,7 +94,7 @@ void up_release_pending(void) /* Then switch contexts */ - up_longjmp(rtcb->xcp.regs, 1); + longjmp(rtcb->xcp.regs, 1); } else { diff --git a/arch/sim/src/sim/up_releasestack.c b/arch/sim/src/sim/up_releasestack.c index aab3f50b5d..a9e33c2272 100644 --- a/arch/sim/src/sim/up_releasestack.c +++ b/arch/sim/src/sim/up_releasestack.c @@ -29,8 +29,6 @@ #include #include -#include "up_internal.h" - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/arch/sim/src/sim/up_reprioritizertr.c b/arch/sim/src/sim/up_reprioritizertr.c index d64358d3a0..d0cdc48ec9 100644 --- a/arch/sim/src/sim/up_reprioritizertr.c +++ b/arch/sim/src/sim/up_reprioritizertr.c @@ -129,12 +129,12 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) } /* Copy the exception context into the TCB at the (old) head of the - * ready-to-run Task list. if up_setjmp returns a non-zero + * ready-to-run Task list. if setjmp returns a non-zero * value, then this is really the previously running task * restarting! */ - else if (!up_setjmp(rtcb->xcp.regs)) + else if (!setjmp(rtcb->xcp.regs)) { /* Restore the exception context of the rtcb at the (new) head * of the ready-to-run task list. @@ -149,7 +149,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) /* Then switch contexts */ - up_longjmp(rtcb->xcp.regs, 1); + longjmp(rtcb->xcp.regs, 1); } else { diff --git a/arch/sim/src/sim/up_schedulesigaction.c b/arch/sim/src/sim/up_schedulesigaction.c index 54343f3767..e0e18e4a8b 100644 --- a/arch/sim/src/sim/up_schedulesigaction.c +++ b/arch/sim/src/sim/up_schedulesigaction.c @@ -30,7 +30,6 @@ #include #include "sched/sched.h" -#include "up_internal.h" /**************************************************************************** * Public Functions diff --git a/arch/sim/src/sim/up_stackframe.c b/arch/sim/src/sim/up_stackframe.c index 8736f6259e..8c50d033f5 100644 --- a/arch/sim/src/sim/up_stackframe.c +++ b/arch/sim/src/sim/up_stackframe.c @@ -32,8 +32,6 @@ #include #include -#include "up_internal.h" - /**************************************************************************** * Pre-processor Macros ****************************************************************************/ diff --git a/arch/sim/src/sim/up_unblocktask.c b/arch/sim/src/sim/up_unblocktask.c index 79799b7e9c..f485107713 100644 --- a/arch/sim/src/sim/up_unblocktask.c +++ b/arch/sim/src/sim/up_unblocktask.c @@ -106,11 +106,11 @@ void up_unblock_task(FAR struct tcb_s *tcb) } /* Copy the exception context into the TCB of the task that was - * previously active. if up_setjmp returns a non-zero value, then + * previously active. if setjmp returns a non-zero value, then * this is really the previously running task restarting! */ - else if (!up_setjmp(rtcb->xcp.regs)) + else if (!setjmp(rtcb->xcp.regs)) { /* Restore the exception context of the new task that is ready to * run (probably tcb). This is the new rtcb at the head of the @@ -126,7 +126,7 @@ void up_unblock_task(FAR struct tcb_s *tcb) /* Then switch contexts */ - up_longjmp(rtcb->xcp.regs, 1); + longjmp(rtcb->xcp.regs, 1); } else { diff --git a/arch/sim/src/sim/up_vfork.c b/arch/sim/src/sim/up_vfork.c index 9ea63056a8..116bad2cef 100644 --- a/arch/sim/src/sim/up_vfork.c +++ b/arch/sim/src/sim/up_vfork.c @@ -35,7 +35,6 @@ #include #include -#include "up_internal.h" #include "sched/sched.h" /**************************************************************************** diff --git a/arch/sim/src/sim/up_vfork32.S b/arch/sim/src/sim/up_vfork32.S index 6fee7bbe3c..8dad26b0cb 100644 --- a/arch/sim/src/sim/up_vfork32.S +++ b/arch/sim/src/sim/up_vfork32.S @@ -23,7 +23,6 @@ ************************************************************************************/ #include -#include "up_internal.h" #include /************************************************************************************ @@ -99,7 +98,7 @@ SYMBOL(vfork): sub $XCPTCONTEXT_SIZE, %esp push %esp - call SYMBOL(up_setjmp) + call SYMBOL(setjmp) sub $1, %eax jz child diff --git a/arch/sim/src/sim/up_vfork64.S b/arch/sim/src/sim/up_vfork64.S index 465b1c8703..fa76ac1509 100644 --- a/arch/sim/src/sim/up_vfork64.S +++ b/arch/sim/src/sim/up_vfork64.S @@ -23,7 +23,6 @@ ************************************************************************************/ #include -#include "up_internal.h" #include /************************************************************************************ @@ -103,7 +102,7 @@ SYMBOL(vfork): #else /* if defined(CONFIG_SIM_X8664_SYSTEMV) */ mov %rsp, %rdi #endif - call SYMBOL(up_setjmp) + call SYMBOL(setjmp) sub $1, %eax jz child diff --git a/arch/sim/src/sim/up_vfork_arm.S b/arch/sim/src/sim/up_vfork_arm.S index 72a7bdfdf6..b75870c45c 100644 --- a/arch/sim/src/sim/up_vfork_arm.S +++ b/arch/sim/src/sim/up_vfork_arm.S @@ -23,7 +23,7 @@ ************************************************************************************/ #include -#include "up_internal.h" +#include /************************************************************************************ * Pre-processor Definitions @@ -87,7 +87,7 @@ vfork: sub sp, sp, #XCPTCONTEXT_SIZE mov r0, sp - bl up_setjmp + bl setjmp subs r0, #1 jz child diff --git a/libs/libc/machine/risc-v/common/Make.defs b/libs/libc/machine/risc-v/common/Make.defs index a046a1f492..95f3202dbb 100644 --- a/libs/libc/machine/risc-v/common/Make.defs +++ b/libs/libc/machine/risc-v/common/Make.defs @@ -23,7 +23,7 @@ CSRCS += arch_elf.c endif ifeq ($(CONFIG_ARCH_SETJMP_H),y) -ASRCS += arch_setjmp.S +ASRCS += arch_setjmp.S endif DEPPATH += --dep-path machine/risc-v/common diff --git a/libs/libc/machine/sim/Make.defs b/libs/libc/machine/sim/Make.defs index e14a216f1e..cd755257ee 100644 --- a/libs/libc/machine/sim/Make.defs +++ b/libs/libc/machine/sim/Make.defs @@ -21,18 +21,34 @@ # XXX ELF relocations are not actually sim-dependent. # We should share the code with eg. ../x86/arch_elf.c. -ifeq ($(CONFIG_LIBC_ARCH_ELF),y) ifeq ($(CONFIG_HOST_X86_64),y) ifeq ($(CONFIG_SIM_M32),y) +ifeq ($(CONFIG_LIBC_ARCH_ELF),y) CSRCS += arch_elf.c -else -CSRCS += arch_elf64.c +endif +ifeq ($(CONFIG_ARCH_SETJMP_H),y) +ASRCS += arch_setjmp.S endif else +ifeq ($(CONFIG_LIBC_ARCH_ELF),y) +CSRCS += arch_elf64.c +endif +ifeq ($(CONFIG_ARCH_SETJMP_H),y) +ASRCS += arch_setjmp64.S +endif +endif +else ifeq ($(CONFIG_HOST_X86),y) +ifeq ($(CONFIG_LIBC_ARCH_ELF),y) CSRCS += arch_elf.c endif +ifeq ($(CONFIG_ARCH_SETJMP_H),y) +ASRCS += arch_setjmp.S +endif +else ifeq ($(CONFIG_HOST_ARM),y) +ifeq ($(CONFIG_ARCH_SETJMP_H),y) +ASRCS += arch_setjmp_arm.S +endif +endif DEPPATH += --dep-path machine/sim VPATH += :machine/sim - -endif diff --git a/arch/sim/src/sim/up_setjmp32.S b/libs/libc/machine/sim/arch_setjmp.S similarity index 88% rename from arch/sim/src/sim/up_setjmp32.S rename to libs/libc/machine/sim/arch_setjmp.S index 9e99db1b69..ac703705ba 100644 --- a/arch/sim/src/sim/up_setjmp32.S +++ b/libs/libc/machine/sim/arch_setjmp.S @@ -1,5 +1,5 @@ /************************************************************************** - * arch/sim/src/sim/up_setjmp32.S + * libs/libc/machine/sim/arch_setjmp.S * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -22,7 +22,7 @@ * Included Files **************************************************************************/ -#include "up_internal.h" +#include /************************************************************************** * Pre-processor Definitions @@ -41,11 +41,11 @@ **************************************************************************/ .text - .globl SYMBOL(up_setjmp) + .globl SYMBOL(setjmp) #ifdef __ELF__ - .type SYMBOL(up_setjmp), @function + .type SYMBOL(setjmp), @function #endif -SYMBOL(up_setjmp): +SYMBOL(setjmp): /* %ebx, %esi, %edi, and %ebp must be preserved. * save %ebx, $esi, and %edi now... */ @@ -74,13 +74,13 @@ SYMBOL(up_setjmp): xorl %eax, %eax ret #ifdef __ELF__ - .size SYMBOL(up_setjmp), . - SYMBOL(up_setjmp) + .size SYMBOL(setjmp), . - SYMBOL(setjmp) #endif - .globl SYMBOL(up_longjmp) + .globl SYMBOL(longjmp) #ifdef __ELF__ - .type SYMBOL(up_longjmp), @function + .type SYMBOL(longjmp), @function #endif -SYMBOL(up_longjmp): +SYMBOL(longjmp): movl 4(%esp), %ecx /* jmpbuf in %ecx. */ movl 8(%esp), %eax /* Second argument is return value. */ @@ -100,5 +100,5 @@ SYMBOL(up_longjmp): jmp *%edx #ifdef __ELF__ - .size SYMBOL(up_longjmp), . - SYMBOL(up_longjmp) + .size SYMBOL(longjmp), . - SYMBOL(longjmp) #endif diff --git a/arch/sim/src/sim/up_setjmp64.S b/libs/libc/machine/sim/arch_setjmp64.S similarity index 93% rename from arch/sim/src/sim/up_setjmp64.S rename to libs/libc/machine/sim/arch_setjmp64.S index eb8f584c8f..b2659ae894 100644 --- a/arch/sim/src/sim/up_setjmp64.S +++ b/libs/libc/machine/sim/arch_setjmp64.S @@ -1,5 +1,5 @@ /************************************************************************** - * arch/sim/src/sim/up_setjmp64.S + * libs/libc/machine/sim/arch_setjmp64.S * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -22,7 +22,7 @@ * Included Files **************************************************************************/ -#include "up_internal.h" +#include /************************************************************************** * Pre-processor Definitions @@ -76,11 +76,11 @@ .text .align 4 - .globl SYMBOL(up_setjmp) + .globl SYMBOL(setjmp) #ifdef __ELF__ - .type SYMBOL(up_setjmp), @function + .type SYMBOL(setjmp), @function #endif -SYMBOL(up_setjmp): +SYMBOL(setjmp): /* Get the return address, adjusting the stack pointer */ @@ -115,15 +115,15 @@ SYMBOL(up_setjmp): ret #ifdef __ELF__ - .size SYMBOL(up_setjmp), . - SYMBOL(up_setjmp) + .size SYMBOL(setjmp), . - SYMBOL(setjmp) #endif .align 4 - .globl SYMBOL(up_longjmp) + .globl SYMBOL(longjmp) #ifdef __ELF__ - .type SYMBOL(up_longjmp), @function + .type SYMBOL(longjmp), @function #endif -SYMBOL(up_longjmp): +SYMBOL(longjmp): /* Setup return value */ @@ -144,5 +144,5 @@ SYMBOL(up_longjmp): jmp *JB_RSI(REGS) #ifdef __ELF__ - .size SYMBOL(up_longjmp), . - SYMBOL(up_longjmp) + .size SYMBOL(longjmp), . - SYMBOL(longjmp) #endif diff --git a/arch/sim/src/sim/up_setjmp_arm.S b/libs/libc/machine/sim/arch_setjmp_arm.S similarity index 95% rename from arch/sim/src/sim/up_setjmp_arm.S rename to libs/libc/machine/sim/arch_setjmp_arm.S index 180d9b74c0..8279776be6 100644 --- a/arch/sim/src/sim/up_setjmp_arm.S +++ b/libs/libc/machine/sim/arch_setjmp_arm.S @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/sim/src/sim/up_setjmp_arm.h + * libs/libc/machine/sim/arch_setjmp_arm.S * * Copyright (C) 2017 Gregory Nutt. All rights reserved. * Author: Nickolay Semyonov (RPI) @@ -37,9 +37,9 @@ ****************************************************************************/ .syntax unified -.global up_setjmp -.type up_setjmp,%function -up_setjmp: +.global setjmp +.type setjmp,%function +setjmp: mov ip,r0 stmia ip!,{v1,v2,v3,v4,v5,v6,sl,fp} mov r2,sp @@ -75,9 +75,9 @@ up_setjmp: 3: bx lr .syntax unified -.global up_longjmp -.type up_longjmp,%function -up_longjmp: +.global longjmp +.type longjmp,%function +longjmp: mov ip,r0 movs r0,r1 moveq r0,#1