diff --git a/arch/arm/src/imx6/chip/imx_memorymap.h b/arch/arm/src/imx6/chip/imx_memorymap.h
index a3e981a651..dfdb44fb8d 100644
--- a/arch/arm/src/imx6/chip/imx_memorymap.h
+++ b/arch/arm/src/imx6/chip/imx_memorymap.h
@@ -498,7 +498,7 @@
 #define IMX_EIM_NSECTIONS        _NSECTIONS(IMX_EIM_SECSIZE)
 #define IMX_MMDCDDR_NSECTIONS    _NSECTIONS(IMX_MMDCDDR_SECSIZE)
 
-/* Section MMU Flags 
+/* Section MMU Flags
  *
  * SDRAM is a special case because it requires non-cached access of its
  * initial configuration, then cached access thereafter.
diff --git a/arch/arm/src/imx6/imx_gpio.c b/arch/arm/src/imx6/imx_gpio.c
index cc33bb87dd..1fe7a65ea7 100644
--- a/arch/arm/src/imx6/imx_gpio.c
+++ b/arch/arm/src/imx6/imx_gpio.c
@@ -198,7 +198,7 @@ void imx_gpio_write(gpio_pinset_t pinset, bool value)
   irqstate_t flags;
   int port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
   int pin  = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
-  
+
   flags = enter_critical_section();
   imx_gpio_setoutput(port, pin, value);
   leave_critical_section(flags);
@@ -218,7 +218,7 @@ bool imx_gpio_read(gpio_pinset_t pinset)
   int port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
   int pin  = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
   bool value;
-  
+
   flags = enter_critical_section();
   value = imx_gpio_getinput(port, pin);
   leave_critical_section(flags);
diff --git a/arch/arm/src/imx6/imx_gpio.h b/arch/arm/src/imx6/imx_gpio.h
index 5522d0ee8c..c8f3661ede 100644
--- a/arch/arm/src/imx6/imx_gpio.h
+++ b/arch/arm/src/imx6/imx_gpio.h
@@ -110,7 +110,7 @@
 
 #define GPIO_SLEW_SLOW         (0)        /* Bit 12: 0=Slow Slew Rate */
 #define GPIO_SLEW_FAST         (1 << 12)  /* Bit 12: 1=Fast Slew Rate */
- 
+
 /* Output Speed:
  *
  *   GPIO OUTPUT ...1 .... .... SS.. .... ....
@@ -129,7 +129,7 @@
 
 #define GPIO_OUTPUT_ZERO       (0)        /* Bit 9: 0=Initial output is low */
 #define GPIO_OUTPUT_ONE        (1 << 9)   /* Bit 9: 1=Initial output is high */
- 
+
 /* Input Schmitt Trigger:
  *
  *   GPIO INPUT  ...0 .... .... ...T .... ....