Addng M16C logic

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1485 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2009-02-08 22:55:04 +00:00
parent c5b4c3e2e5
commit dd8994fcb3
2 changed files with 32 additions and 13 deletions

View File

@ -41,7 +41,7 @@
# particular chip or SoC that the architecture is implemented # particular chip or SoC that the architecture is implemented
# in. # in.
# CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory # CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
# CONFIG_ARCH_CHIP_name - For use in C code # CONFIG_ARCH_CHIP_name - Identifies the specific chip variant For use in C code
# CONFIG_ARCH_BOARD - identifies the configs subdirectory and, hence, # CONFIG_ARCH_BOARD - identifies the configs subdirectory and, hence,
# the board that supports the particular chip or SoC. # the board that supports the particular chip or SoC.
# CONFIG_ARCH_BOARD_name - for use in C code # CONFIG_ARCH_BOARD_name - for use in C code
@ -59,7 +59,7 @@
CONFIG_ARCH=sh CONFIG_ARCH=sh
CONFIG_ARCH_SH=y CONFIG_ARCH_SH=y
CONFIG_ARCH_CHIP=m16c CONFIG_ARCH_CHIP=m16c
CONFIG_ARCH_CHIP_M16C=y CONFIG_ARCH_CHIP_M30262F8=y
CONFIG_ARCH_BOARD=skp16c26 CONFIG_ARCH_BOARD=skp16c26
CONFIG_ARCH_BOARD_SKP16C26=y CONFIG_ARCH_BOARD_SKP16C26=y
CONFIG_ENDIAN_BIG=y CONFIG_ENDIAN_BIG=y

View File

@ -37,7 +37,7 @@ OUTPUT_ARCH(m32c)
ENTRY(_stext) ENTRY(_stext)
SECTIONS SECTIONS
{ {
/* Flash memory begins at address 0xf0000 for the M20262F8 part and /* "Far" flash memory begins at address 0xf0000 for the M20262F8 part and
* ends at address 0xfffff (all parts). The program entry point is * ends at address 0xfffff (all parts). The program entry point is
* the first address in flash * the first address in flash
*/ */
@ -55,9 +55,9 @@ SECTIONS
_etext = ABSOLUTE(.); _etext = ABSOLUTE(.);
} }
_eronly = ABSOLUTE(.); /* End of read-only values */ _enronly = ABSOLUTE(.); /* End of read-only values */
/* .data will be relocated from */ /* .ndata will be relocated */
/* this address */ /* from this address */
/* The "variable" vector table will be fixed at the following address */ /* The "variable" vector table will be fixed at the following address */
@ -84,7 +84,7 @@ SECTIONS
_efixvect = ABSOLUTE(.); _efixvect = ABSOLUTE(.);
} }
/* Internal RAM begins at address 0x00400 (all parts) and ends at /* Internal "near" RAM begins at address 0x00400 (all parts) and ends at
* address 0x00bff (M20262F6 and M20262F8 parts). With the RAM * address 0x00bff (M20262F6 and M20262F8 parts). With the RAM
* region, used is .data followed by .bss. The remainder of RAM * region, used is .data followed by .bss. The remainder of RAM
* carved up by the start-up code into stacks and heaps. * carved up by the start-up code into stacks and heaps.
@ -92,19 +92,38 @@ SECTIONS
. = 0x00400; . = 0x00400;
.data : { .ndata : {
_sdata = ABSOLUTE(.); _sndata = ABSOLUTE(.);
*(.data) *(.data)
CONSTRUCTORS CONSTRUCTORS
_edata = ABSOLUTE(.); _endata = ABSOLUTE(.);
} }
.bss : { /* BSS */ .nbss : { /* BSS */
_sbss = ABSOLUTE(.); _snbss = ABSOLUTE(.);
*(.bss) *(.bss)
*(COMMON) *(COMMON)
_ebss = ABSOLUTE(.); _enbss = ABSOLUTE(.);
} }
/* "Far" RAM begins at 0x10000. The SKP16C26 has no far RAM */
/*
. = 0x10000;
.fdata : {
_sfdata = ABSOLUTE(.);
*(.data)
CONSTRUCTORS
_efdata = ABSOLUTE(.);
}
.fbss : { /* BSS */
_sfbss = ABSOLUTE(.);
*(.bss)
*(COMMON)
_efbss = ABSOLUTE(.);
}
*/
/* Stabs debugging sections. */ /* Stabs debugging sections. */
.stab 0 : { *(.stab) } .stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) } .stabstr 0 : { *(.stabstr) }