diff --git a/arch/arm/src/sam34/sam_spi.c b/arch/arm/src/sam34/sam_spi.c
index 7dbd23f23a..ae7b982a74 100644
--- a/arch/arm/src/sam34/sam_spi.c
+++ b/arch/arm/src/sam34/sam_spi.c
@@ -1149,7 +1149,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
  *
  * Input Parameters:
  *   dev -  Device-specific state data
- *   nbits - The number of bits requests
+ *   nbits - The number of bits requested
  *
  * Returned Value:
  *   none
@@ -1164,7 +1164,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
   unsigned int offset;
 
   spiinfo("cs=%d nbits=%d\n", spics->cs, nbits);
-  DEBUGASSERT(spics && nbits > 7 && nbits < 17);
+  DEBUGASSERT(nbits > 7 && nbits < 17);
 
   /* Has the number of bits changed? */
 
@@ -1180,7 +1180,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
 
       spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
 
-      /* Save the selection so the subsequence re-configurations will be
+      /* Save the selection so the subsequent re-configurations will be
        * faster.
        */
 
diff --git a/arch/arm/src/sama5/sam_spi.c b/arch/arm/src/sama5/sam_spi.c
index 0205425b53..36ee5aae97 100644
--- a/arch/arm/src/sama5/sam_spi.c
+++ b/arch/arm/src/sama5/sam_spi.c
@@ -1137,7 +1137,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
  *
  * Input Parameters:
  *   dev -  Device-specific state data
- *   nbits - The number of bits requests
+ *   nbits - The number of bits requested
  *
  * Returned Value:
  *   none
@@ -1152,7 +1152,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
   unsigned int offset;
 
   spiinfo("cs=%d nbits=%d\n", spics->cs, nbits);
-  DEBUGASSERT(spics && nbits > 7 && nbits < 17);
+  DEBUGASSERT(nbits > 7 && nbits < 17);
 
   /* NOTE:  The logic in spi_send and in spi_exchange only handles 8-bit
    * data at the present time.  So the following extra assertion is a
@@ -1175,8 +1175,8 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
 
       spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
 
-      /* Save the selection so the subsequence re-configurations will be
-       * faster
+      /* Save the selection so that subsequent re-configurations will be
+       * faster.
        */
 
       spics->nbits = nbits;
diff --git a/arch/arm/src/samd2l2/sam_spi.c b/arch/arm/src/samd2l2/sam_spi.c
index 33291f8e61..2f30efca56 100644
--- a/arch/arm/src/samd2l2/sam_spi.c
+++ b/arch/arm/src/samd2l2/sam_spi.c
@@ -859,7 +859,9 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
       frequency = maxfreq;
     }
 
-  /* Check if the requested frequency is the same as the frequency selection */
+  /* Check if the requested frequency is the same as the frequency
+   * selection.
+   */
 
   if (priv->frequency == frequency)
     {
@@ -868,7 +870,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
       return priv->actual;
     }
 
-  /* For synchronous mode, the BAUAD rate (Fbaud) is generated from the
+  /* For synchronous mode, the BAUD rate (Fbaud) is generated from the
    * source clock frequency (Fref) as follows:
    *
    *   Fbaud = Fref / (2 * (BAUD + 1))
@@ -1017,8 +1019,9 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
   struct sam_spidev_s *priv = (struct sam_spidev_s *)dev;
   uint32_t regval;
 
+  DEBUGASSERT(priv != NULL);
   spiinfo("sercom=%d nbits=%d\n", priv->sercom, nbits);
-  DEBUGASSERT(priv && nbits > 7 && nbits < 10);
+  DEBUGASSERT(nbits > 7 && nbits < 10);
 
   /* Has the number of bits changed? */
 
@@ -1036,7 +1039,9 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
 
       spi_putreg32(priv, regval, SAM_SPI_CTRLB_OFFSET);
 
-      /* Save the selection so the subsequence re-configurations will be faster */
+      /* Save the selection so that subsequent re-configurations will be
+       * faster.
+       */
 
       priv->nbits = nbits;
     }
diff --git a/arch/arm/src/samd5e5/sam_spi.c b/arch/arm/src/samd5e5/sam_spi.c
index 6c7a207385..696055f34a 100644
--- a/arch/arm/src/samd5e5/sam_spi.c
+++ b/arch/arm/src/samd5e5/sam_spi.c
@@ -953,7 +953,9 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
       frequency = maxfreq;
     }
 
-  /* Check if the requested frequency is the same as the frequency selection */
+  /* Check if the requested frequency is the same as the frequency
+   * selection.
+   */
 
   if (priv->frequency == frequency)
     {
@@ -962,7 +964,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
       return priv->actual;
     }
 
-  /* For synchronous mode, the BAUAD rate (Fbaud) is generated from the
+  /* For synchronous mode, the BAUD rate (Fbaud) is generated from the
    * source clock frequency (Fref) as follows:
    *
    *   Fbaud = Fref / (2 * (BAUD + 1))
@@ -1099,7 +1101,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
  *
  * Input Parameters:
  *   dev -  Device-specific state data
- *   nbits - The number of bits requests
+ *   nbits - The number of bits requested
  *
  * Returned Value:
  *   none
@@ -1111,8 +1113,9 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
   struct sam_spidev_s *priv = (struct sam_spidev_s *)dev;
   uint32_t regval;
 
+  DEBUGASSERT(priv != NULL);
   spiinfo("sercom=%d nbits=%d\n", priv->sercom, nbits);
-  DEBUGASSERT(priv && nbits > 7 && nbits < 10);
+  DEBUGASSERT(nbits > 7 && nbits < 10);
 
   /* Has the number of bits changed? */
 
@@ -1130,7 +1133,9 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
 
       spi_putreg32(priv, regval, SAM_SPI_CTRLB_OFFSET);
 
-      /* Save the selection so the subsequence re-configurations will be faster */
+      /* Save the selection so that subsequent re-configurations will be
+       * faster.
+       */
 
       priv->nbits = nbits;
     }
diff --git a/arch/arm/src/samv7/sam_spi.c b/arch/arm/src/samv7/sam_spi.c
index e895dc2f7a..cec21f8cab 100644
--- a/arch/arm/src/samv7/sam_spi.c
+++ b/arch/arm/src/samv7/sam_spi.c
@@ -1378,7 +1378,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
  *
  * Input Parameters:
  *   dev -  Device-specific state data
- *   nbits - The number of bits requests
+ *   nbits - The number of bits requested
  *
  * Returned Value:
  *   none
@@ -1393,7 +1393,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
   unsigned int offset;
 
   spiinfo("cs=%d nbits=%d\n", spics->cs, nbits);
-  DEBUGASSERT(spics && nbits > 7 && nbits < 17);
+  DEBUGASSERT(nbits > 7 && nbits < 17);
 
   /* Has the number of bits changed? */
 
@@ -1409,7 +1409,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
 
       spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
 
-      /* Save the selection so the subsequence re-configurations will be
+      /* Save the selection so that subsequent re-configurations will be
        * faster.
        */
 
diff --git a/arch/arm/src/xmc4/xmc4_spi.c b/arch/arm/src/xmc4/xmc4_spi.c
index 8d14e0665d..492d6c1eef 100644
--- a/arch/arm/src/xmc4/xmc4_spi.c
+++ b/arch/arm/src/xmc4/xmc4_spi.c
@@ -1251,7 +1251,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
  *
  * Input Parameters:
  *   dev -  Device-specific state data
- *   nbits - The number of bits requests
+ *   nbits - The number of bits requested
  *
  * Returned Value:
  *   none
@@ -1265,7 +1265,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
   uint32_t regval;
 
   spiinfo("cs=%d nbits=%d\n", spics->cs, nbits);
-  DEBUGASSERT(spics && nbits > 7 && nbits < 17);
+  DEBUGASSERT(nbits > 7 && nbits < 17);
 
   /* Has the number of bits changed? */
 
@@ -1280,7 +1280,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
 
       spiinfo("SCTR = %08x\n", regval);
 
-      /* Save the selection so the subsequence re-configs will be faster */
+      /* Save the selection so that subsequent re-configs will be faster. */
 
       spics->nbits = nbits;
     }
diff --git a/arch/mips/src/pic32mx/pic32mx_spi.c b/arch/mips/src/pic32mx/pic32mx_spi.c
index c60bc26ec0..1815637c2b 100644
--- a/arch/mips/src/pic32mx/pic32mx_spi.c
+++ b/arch/mips/src/pic32mx/pic32mx_spi.c
@@ -615,7 +615,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
       spi_putreg(priv, PIC32MX_SPI_CON_OFFSET, regval);
       spiinfo("CON: %08x\n", regval);
 
-      /* Save the mode so that subsequent re-configuratins will be faster */
+      /* Save the mode so that subsequent re-configurations will be faster */
 
       priv->mode = mode;
     }
@@ -629,7 +629,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
  *
  * Input Parameters:
  *   dev -  Device-specific state data
- *   nbits - The number of bits requests
+ *   nbits - The number of bits requested
  *
  * Returned Value:
  *   none
@@ -642,12 +642,12 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
   uint32_t setting;
   uint32_t regval;
 
+  DEBUGASSERT(priv != NULL);
   spiinfo("Old nbits: %d New nbits: %d\n", priv->nbits, nbits);
+  DEBUGASSERT(nbits > 7 && nbits < 17);
 
   /* Has the number of bits changed? */
 
-  DEBUGASSERT(priv && nbits > 7 && nbits < 17);
-
   if (nbits != priv->nbits)
     {
       /* Yes... Set the CON register appropriately */
@@ -676,8 +676,8 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
       regval = spi_getreg(priv, PIC32MX_SPI_CON_OFFSET);
       spiinfo("CON: %08x\n", regval);
 
-      /* Save the selection so the subsequence re-configurations will be
-       * faster
+      /* Save the selection so that subsequent re-configurations will be
+       * faster.
        */
 
       priv->nbits = nbits;