Add logic to support the FSMC SRAM in the NuttX heap
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4433 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
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@ -2514,3 +2514,5 @@
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* Makefile: Use the more common .hex extension for Intel hex files instead of
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more precise .ihx extension. This change has ripple effects to many build-
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related scripts and programs and could cause some short-term problems.
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* configs/stm3240g-eval/, arch/arm/src/stm32/up_allocateheap.c: Add support
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for the 16-mbit SRAM on-board the STM3240G-EVAL board.
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@ -54,35 +54,208 @@
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/****************************************************************************
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* Private Definitions
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****************************************************************************/
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/* Internal SRAM is available in all members of the STM32 family. The
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* following definitions must be provided to specify the size and
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* location of internal(system) SRAM:
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*
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* CONFIG_DRAM_END : End address (+1) of SRAM (F1 family only, the
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* : F4 family uses the a priori end of SRAM)
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*
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* The F4 family also contains internal TCM SRAM. This SRAM is different
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* because it cannot be used for DMA. So if DMA needed, then the following
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* should be defined to exclude TCM SRAM from the heap:
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*
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* CONFIG_STM32_TCMEXCLUDE : Exclude TCM SRAM from the HEAP
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*
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* In addition to internal SRAM, SRAM may also be available through the FSMC.
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* In order to use FSMC SRAM, the following additional things need to be
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* present in the NuttX configuration file:
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*
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* CONFIG_STM32_FSMC=y : Enables the FSMC
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* CONFIG_STM32_FSMC_SRAM=y : Indicates that SRAM is available via the
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* FSMC (as opposed to an LCD or FLASH).
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* CONFIG_HEAP2_BASE : The base address of the SRAM in the FSMC
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* address space
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* CONFIG_HEAP2_END : The end (+1) of the SRAM in the FSMC
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* address space
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* CONFIG_MM_REGIONS : Must be set to a large enough value to
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* include the FSMC SRAM (as determined by the rules provided below)
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*/
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/* For the STM312F10xxx family, all SRAM is in a contiguous block starting
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* at g_heapbase and extending through CONFIG_DRAM_END (my apologies for
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* the bad naming).
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#ifndef CONFIG_STM32_FSMC
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# undef CONFIG_STM32_FSMC_SRAM
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#endif
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/* For the STM312F10xxx family, all internal SRAM is in one contiguous block
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* starting at g_heapbase and extending through CONFIG_DRAM_END (my apologies for
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* the bad naming). In addition, external FSMC SRAM may be available.
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*/
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#if defined(CONFIG_STM32_STM32F10XX)
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/* Set the end of system SRAM */
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# define SRAM1_END CONFIG_DRAM_END
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/* Check if external FSMC SRAM is provided */
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# if CONFIG_STM32_FSMC_SRAM
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# if CONFIG_MM_REGIONS < 2
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# warning "FSMC SRAM not included in the heap"
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# undef CONFIG_STM32_FSMC_SRAM
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# elif CONFIG_MM_REGIONS > 2
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# error "CONFIG_MM_REGIONS > 2 but I don't know what any of the region(s) are"
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# undef CONFIG_MM_REGIONS
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# define CONFIG_MM_REGIONS 2
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# endif
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# elif CONFIG_MM_REGIONS > 1
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# error "CONFIG_MM_REGIONS > 1 but I don't know what any of the region(s) are"
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# endif
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/* The STM32 F1 has not TCM SRAM */
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# undef CONFIG_STM32_TCMEXCLUDE
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# define CONFIG_STM32_TCMEXCLUDE 1
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/* All members of the STM32F40xxx family have 192Kb in three banks:
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*
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* 1) 112Kb of SRAM beginning at address 0x2000:0000
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* 2) 16Kb of SRAM beginning at address 0x2001:c000
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* 1) 112Kb of System SRAM beginning at address 0x2000:0000
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* 2) 16Kb of System SRAM beginning at address 0x2001:c000
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* 3) 64Kb of TCM SRAM beginning at address 0x1000:0000
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*
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* As determined by ld.script, g_heapbase lies in the 112Kb memory
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* region and that extends to 0x2001:0000. But the first and second memory
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* regions are contiguous and treated as one in this logic that extends to
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* 0x2002:0000.
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*
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* As a complication, it appears that TCM SRAM cannot be used for DMA. So, if
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* STM32 DMA is enabled, TCM SRAM should probably be excluded from the heap.
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*
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* In addition, external FSMC SRAM may be available.
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*/
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#elif defined(CONFIG_STM32_STM32F40XX)
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/* Set the end of system SRAM */
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# define SRAM1_END 0x20020000
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/* Set the range of TCM SRAM as well (although we may not use it) */
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# define SRAM2_START 0x10000000
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# define SRAM2_END 0x10010000
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/* There are 4 possible SRAM configurations:
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*
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* Configuration 1. System SRAM (only)
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* CONFIG_MM_REGIONS == 1
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* CONFIG_STM32_FSMC_SRAM NOT defined
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* CONFIG_STM32_TCMEXCLUDE defined
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* Configuration 2. System SRAM and TCM SRAM
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* CONFIG_MM_REGIONS == 2
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* CONFIG_STM32_FSMC_SRAM NOT defined
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* CONFIG_STM32_TCMEXCLUDE NOT defined
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* Configuration 3. System SRAM and FSMC SRAM
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* CONFIG_MM_REGIONS == 2
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* CONFIG_STM32_FSMC_SRAM defined
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* CONFIG_STM32_TCMEXCLUDE defined
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* Configuration 4. System SRAM, TCM SRAM, and FSMC SRAM
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* CONFIG_MM_REGIONS == 3
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* CONFIG_STM32_FSMC_SRAM defined
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* CONFIG_STM32_TCMEXCLUDE NOT defined
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*
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* Let's make sure that all definitions are consitent before doing
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* anything else
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*/
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# if defined(CONFIG_STM32_FSMC_SRAM)
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/* Configuration 3 or 4. External SRAM is available. CONFIG_MM_REGIONS
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* should be at least 2.
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*/
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# if CONFIG_MM_REGIONS < 2
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/* Only one memory region. Force Configuration 1 */
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# warning "FSMC SRAM (and TCM SRAM) excluded from the heap"
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# undef CONFIG_STM32_FSMC_SRAM
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# undef CONFIG_STM32_TCMEXCLUDE
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# define CONFIG_STM32_TCMEXCLUDE 1
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/* CONFIG_MM_REGIONS may be 3 if TCM SRAM is included in the head */
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# elif CONFIG_MM_REGIONS > 2
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/* More than two memory regions. This is okay if TCM SRAM is not
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* disabled.
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*/
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# if defined(CONFIG_STM32_TCMEXCLUDE)
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/* Configuration 3: CONFIG_MM_REGIONS should have been 2 */
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# error "CONFIG_MM_REGIONS > 2 but I don't know what any of the region(s) are"
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# undef CONFIG_MM_REGIONS
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# define CONFIG_MM_REGIONS 2
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# else
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/* Configuration 4: DMA should be disabled and CONFIG_MM_REGIONS
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* should be 3.
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*/
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# ifdef (CONFIG_STM32_DMA)
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# warning "TCM SRAM is included in the heap AND DMA is enabled"
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# endif
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# if CONFIG_MM_REGIONS != 3
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# error "CONFIG_MM_REGIONS > 3 but I don't know what any of the region(s) are"
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# undef CONFIG_MM_REGIONS
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# define CONFIG_MM_REGIONS 3
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# endif
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# endif
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/* CONFIG_MM_REGIONS is exactly 2. We cannot support both TCM SRAM and
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* FSMC SRAM.
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*/
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# elif !defined(CONFIG_STM32_TCMEXCLUDE)
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# error "CONFIG_MM_REGIONS == 2, cannot support both TCM SRAM and FSMC SRAM"
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# undef CONFIG_STM32_TCMEXCLUDE
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# define CONFIG_STM32_TCMEXCLUDE 1
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# endif
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# elif !defined(CONFIG_STM32_TCMEXCLUDE)
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/* Configuration 2: FSMC SRAM is not used, but TCM SRAM is requested. DMA
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* should be disabled and CONFIG_MM_REGIONS should be 2.
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*/
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# ifdef (CONFIG_STM32_DMA)
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# warning "TCM SRAM is included in the heap AND DMA is enabled"
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# endif
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# if CONFIG_MM_REGIONS < 2
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# error "TCM SRAM excluded from the heap because CONFIG_MM_REGIONS < 2"
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# undef CONFIG_STM32_TCMEXCLUDE
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# define CONFIG_STM32_TCMEXCLUDE 1
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# elif CONFIG_MM_REGIONS > 2
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# error "CONFIG_MM_REGIONS > 2 but I don't know what any of the region(s) are"
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# undef CONFIG_MM_REGIONS
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# define CONFIG_MM_REGIONS 2
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# endif
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# endif
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#else
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# error "Unsupported STM32 chip"
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#endif
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/* If FSMC SRAM is going to be used as heap, then verify that the starting
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* address and size of the external SRAM region has been provided in the
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* configuration.
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*/
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#ifdef CONFIG_STM32_FSMC_SRAM
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# if !defined(CONFIG_HEAP2_BASE) || !defined(CONFIG_HEAP2_END)
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# error "CONFIG_HEAP2_BASE and CONFIG_HEAP2_END must be provided"
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# undef CONFIG_STM32_FSMC_SRAM
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# endif
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#endif
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/****************************************************************************
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* Private Data
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****************************************************************************/
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@ -123,41 +296,18 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
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****************************************************************************/
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#if CONFIG_MM_REGIONS > 1
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# if defined(CONFIG_STM32_STM32F40XX)
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# if defined(CONFIG_HEAP2_BASE) && defined(CONFIG_HEAP2_END)
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# if CONFIG_MM_REGIONS > 3
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# error "CONFIG_MM_REGIONS > 3 but I don't know what all of the regions are"
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# endif
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# elif CONFIG_MM_REGIONS > 2
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# error "CONFIG_MM_REGIONS > 2 but I don't know what all of the regions are"
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# endif
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void up_addregion(void)
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{
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/* Add the STM32F40xxx TCM SRAM heap region. */
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#ifndef CONFIG_STM32_TCMEXCLUDE
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mm_addregion((FAR void*)SRAM2_START, SRAM2_END-SRAM2_START);
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#endif
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/* Add the user specified heap region. */
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# if CONFIG_MM_REGIONS > 2 && defined(CONFIG_HEAP2_BASE) && defined(CONFIG_HEAP2_END)
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#ifdef CONFIG_STM32_FSMC_SRAM
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mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_END - CONFIG_HEAP2_BASE);
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# endif
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}
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# elif defined(CONFIG_HEAP2_BASE) && defined(CONFIG_HEAP2_END)
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# if CONFIG_MM_REGIONS > 2
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# error "CONFIG_MM_REGIONS > 2 but I don't know what all of the regions are"
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# endif
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void up_addregion(void)
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{
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/* Add the user specified heap region. */
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mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_END - CONFIG_HEAP2_BASE);
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}
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# else
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# error "CONFIG_MM_REGIONS > 1 but I don't know what any of the region(s) are"
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# endif
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#endif
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@ -122,6 +122,16 @@
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#define CONFIG_STM32_I2CTIMEOTICKS \
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(SEC2TICK(CONFIG_STM32_I2CTIMEOSEC) + MSEC2TICK(CONFIG_STM32_I2CTIMEOMS))
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/* On the STM32F103ZE, there is an internal conflict between I2C1 and FSMC. In that
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* case, it is necessary to disable FSMC before each I2C1 access and re-enable FSMC
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* when the I2C access completes.
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*/
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#undef I2C1_FSMC_CONFLICT
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#if defined(CONFIG_STM32_STM32F10XX) && defined(CONFIG_STM32_FSMC) && defined(CONFIG_STM32_I2C1)
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# define I2C1_FSMC_CONFLICT
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#endif
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/* Debug ****************************************************************************/
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/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
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@ -263,7 +273,7 @@ static inline void stm32_i2c_sendstart(FAR struct stm32_i2c_priv_s *priv);
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static inline void stm32_i2c_clrstart(FAR struct stm32_i2c_priv_s *priv);
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static inline void stm32_i2c_sendstop(FAR struct stm32_i2c_priv_s *priv);
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static inline uint32_t stm32_i2c_getstatus(FAR struct stm32_i2c_priv_s *priv);
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#if defined(CONFIG_STM32_FSMC) && defined (CONFIG_STM32_I2C1)
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#ifdef I2C1_FSMC_CONFLICT
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static inline uint32_t stm32_i2c_disablefsmc(FAR struct stm32_i2c_priv_s *priv);
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static inline void stm32_i2c_enablefsmc(uint32_t ahbenr);
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#endif
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@ -907,9 +917,12 @@ static inline uint32_t stm32_i2c_getstatus(FAR struct stm32_i2c_priv_s *priv)
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* FSMC must be disable while accessing I2C1 because it uses a common resource
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* (LBAR)
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*
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* NOTE: This is an issue with the STM32F103ZE, but may not be an issue with other
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* STM32s. You may need to experiment
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*
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************************************************************************************/
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#if defined(CONFIG_STM32_FSMC) && defined (CONFIG_STM32_I2C1)
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#ifdef I2C1_FSMC_CONFLICT
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static inline uint32_t stm32_i2c_disablefsmc(FAR struct stm32_i2c_priv_s *priv)
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{
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uint32_t ret = 0;
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@ -954,7 +967,7 @@ static inline void stm32_i2c_enablefsmc(uint32_t ahbenr)
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#else
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# define stm32_i2c_disablefsmc(priv) (0)
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# define stm32_i2c_enablefsmc(ahbenr)
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#endif
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#endif /* I2C1_FSMC_CONFLICT */
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/************************************************************************************
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* Name: stm32_i2c_isr
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@ -1478,7 +1491,7 @@ static int stm32_i2c_process(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *ms
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* will not complete normally if the FSMC is enabled.
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*/
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#if !defined(CONFIG_STM32_FSMC) || !defined (CONFIG_STM32_I2C1)
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#ifndef I2C1_FSMC_CONFLICT
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stm32_i2c_sem_waitstop(priv);
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#endif
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@ -1619,7 +1632,7 @@ static int stm32_i2c_process(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *ms
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* will not complete normally if the FSMC is enabled.
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*/
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#if defined(CONFIG_STM32_FSMC) && defined (CONFIG_STM32_I2C1)
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#ifdef I2C1_FSMC_CONFLICT
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stm32_i2c_sem_waitstop(priv);
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#endif
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@ -17,6 +17,7 @@ Contents
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- PWM
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- CAN
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- FPU
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- FSMC SRAM
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- STM3240G-EVAL-specific Configuration Options
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- Configurations
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@ -108,18 +109,7 @@ GNU Toolchain Options
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and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path
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appears in your PATH variable before /usr/bin, then you will get the wrong gcc
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when you try to build host executables. This will cause to strange, uninterpretable
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errors build some host binaries in tools/ when you first make. Here is my
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workaround kludge.
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1. Edit the setenv.sh to put the Atollic toolchain at the beginning of the PATH
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2. Source the setenv.sh file: . ./setenv.sh. A side effect of this is that it
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will set an environment variable called PATH_ORIG.
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3. Then go back to the original patch: export PATH=$PATH_ORIG
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4. Then make. The make will build all of the host executable but will fail
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when it gets to the first ARM binary.
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5. Then source setenv.sh again: . ./setenv.sh. That will correct the PATH
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again. When you do make again, the host executables are already made and
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now the correct PATH is in place for the ARM build.
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errors build some host binaries in tools/ when you first make.
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Also, the Atollic toolchains are the only toolchains that have built-in support for
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the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will
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@ -440,156 +430,236 @@ See the section above on Toolchains, NOTE 2, for explanations for some of
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the configuration settings. Some of the usual settings are just not supported
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by the "Lite" version of the Atollic toolchain.
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FSMC SRAM
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=========
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On-board SRAM
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-------------
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A 16 Mbit SRAM is connected to the STM32F407IGH6 FSMC bus which shares the same
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I/Os with the CAN1 bus. Jumper settings:
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JP1: Connect PE4 to SRAM as A20
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JP2: onnect PE3 to SRAM as A19
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JP3 and JP10 must not be fitted for SRAM and LCD application. JP3 and JP10
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select CAN1 or CAN2 if fitted; neither if not fitted.
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The on-board SRAM can be configured by setting
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CONFIG_STM32_FSMC=y
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CONFIG_STM32_FSMC_SRAM=y
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CONFIG_HEAP2_BASE=0x64000000
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CONFIG_HEAP2_END=(0x64000000+(2*1024*1024))
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CONFIG_MM_REGIONS=2 (or =3, see below)
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Configuration Options
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---------------------
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Internal SRAM is available in all members of the STM32 family. The F4 family
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also contains internal TCM SRAM. This SRAM is different because it cannot
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be used for DMA. So if DMA needed, then the following should be defined
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to exclude TCM SRAM from the heap:
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CONFIG_STM32_TCMEXCLUDE : Exclude TCM SRAM from the HEAP
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In addition to internal SRAM, SRAM may also be available through the FSMC.
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In order to use FSMC SRAM, the following additional things need to be
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present in the NuttX configuration file:
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CONFIG_STM32_FSMC=y : Enables the FSMC
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CONFIG_STM32_FSMC_SRAM=y : Indicates that SRAM is available via the
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FSMC (as opposed to an LCD or FLASH).
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CONFIG_HEAP2_BASE : The base address of the SRAM in the FSMC
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address space
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CONFIG_HEAP2_END : The end (+1) of the SRAM in the FSMC
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address space
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CONFIG_MM_REGIONS : Must be set to a large enough value to
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include the FSMC SRAM
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SRAM Configurations
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-------------------
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There are 4 possible SRAM configurations:
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Configuration 1. System SRAM (only)
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CONFIG_MM_REGIONS == 1
|
||||
CONFIG_STM32_FSMC_SRAM NOT defined
|
||||
CONFIG_STM32_TCMEXCLUDE defined
|
||||
Configuration 2. System SRAM and TCM SRAM
|
||||
CONFIG_MM_REGIONS == 2
|
||||
CONFIG_STM32_FSMC_SRAM NOT defined
|
||||
CONFIG_STM32_TCMEXCLUDE NOT defined
|
||||
Configuration 3. System SRAM and FSMC SRAM
|
||||
CONFIG_MM_REGIONS == 2
|
||||
CONFIG_STM32_FSMC_SRAM defined
|
||||
CONFIG_STM32_TCMEXCLUDE defined
|
||||
Configuration 4. System SRAM, TCM SRAM, and FSMC SRAM
|
||||
CONFIG_MM_REGIONS == 3
|
||||
CONFIG_STM32_FSMC_SRAM defined
|
||||
CONFIG_STM32_TCMEXCLUDE NOT defined
|
||||
|
||||
STM3240G-EVAL-specific Configuration Options
|
||||
============================================
|
||||
|
||||
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
|
||||
be set to:
|
||||
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
|
||||
be set to:
|
||||
|
||||
CONFIG_ARCH=arm
|
||||
CONFIG_ARCH=arm
|
||||
|
||||
CONFIG_ARCH_family - For use in C code:
|
||||
CONFIG_ARCH_family - For use in C code:
|
||||
|
||||
CONFIG_ARCH_ARM=y
|
||||
CONFIG_ARCH_ARM=y
|
||||
|
||||
CONFIG_ARCH_architecture - For use in C code:
|
||||
CONFIG_ARCH_architecture - For use in C code:
|
||||
|
||||
CONFIG_ARCH_CORTEXM4=y
|
||||
CONFIG_ARCH_CORTEXM4=y
|
||||
|
||||
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
|
||||
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
|
||||
|
||||
CONFIG_ARCH_CHIP=stm32
|
||||
CONFIG_ARCH_CHIP=stm32
|
||||
|
||||
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
|
||||
chip:
|
||||
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
|
||||
chip:
|
||||
|
||||
CONFIG_ARCH_CHIP_STM32F407IG=y
|
||||
CONFIG_ARCH_CHIP_STM32F407IG=y
|
||||
|
||||
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
|
||||
configuration features.
|
||||
|
||||
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
|
||||
|
||||
CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
|
||||
hence, the board that supports the particular chip or SoC.
|
||||
CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
|
||||
hence, the board that supports the particular chip or SoC.
|
||||
|
||||
CONFIG_ARCH_BOARD=stm3240g_eval (for the STM3240G-EVAL development board)
|
||||
CONFIG_ARCH_BOARD=stm3240g_eval (for the STM3240G-EVAL development board)
|
||||
|
||||
CONFIG_ARCH_BOARD_name - For use in C code
|
||||
CONFIG_ARCH_BOARD_name - For use in C code
|
||||
|
||||
CONFIG_ARCH_BOARD_STM3240G_EVAL=y
|
||||
CONFIG_ARCH_BOARD_STM3240G_EVAL=y
|
||||
|
||||
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
|
||||
of delay loops
|
||||
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
|
||||
of delay loops
|
||||
|
||||
CONFIG_ENDIAN_BIG - define if big endian (default is little
|
||||
endian)
|
||||
CONFIG_ENDIAN_BIG - define if big endian (default is little
|
||||
endian)
|
||||
|
||||
CONFIG_DRAM_SIZE - Describes the installed DRAM (SRAM in this case):
|
||||
CONFIG_DRAM_SIZE - Describes the installed DRAM (SRAM in this case):
|
||||
|
||||
CONFIG_DRAM_SIZE=0x00010000 (64Kb)
|
||||
CONFIG_DRAM_SIZE=0x00010000 (64Kb)
|
||||
|
||||
CONFIG_DRAM_START - The start address of installed DRAM
|
||||
CONFIG_DRAM_START - The start address of installed DRAM
|
||||
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
|
||||
CONFIG_DRAM_END - Last address+1 of installed RAM
|
||||
CONFIG_DRAM_END - Last address+1 of installed RAM
|
||||
|
||||
CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
|
||||
CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
|
||||
|
||||
CONFIG_ARCH_IRQPRIO - The STM3240xxx supports interrupt prioritization
|
||||
CONFIG_STM32_TCMEXCLUDE - Exclude TCM SRAM from the HEAP
|
||||
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
In addition to internal SRAM, SRAM may also be available through the FSMC.
|
||||
In order to use FSMC SRAM, the following additional things need to be
|
||||
present in the NuttX configuration file:
|
||||
|
||||
CONFIG_ARCH_FPU - The STM3240xxx supports a floating point unit (FPU)
|
||||
CONFIG_STM32_FSMC_SRAM - Indicates that SRAM is available via the
|
||||
FSMC (as opposed to an LCD or FLASH).
|
||||
|
||||
CONFIG_ARCH_FPU=y
|
||||
CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space
|
||||
|
||||
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
|
||||
have LEDs
|
||||
CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space
|
||||
|
||||
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
|
||||
stack. If defined, this symbol is the size of the interrupt
|
||||
stack in bytes. If not defined, the user task stacks will be
|
||||
used during interrupt handling.
|
||||
CONFIG_ARCH_IRQPRIO - The STM3240xxx supports interrupt prioritization
|
||||
|
||||
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
|
||||
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
|
||||
CONFIG_ARCH_FPU - The STM3240xxx supports a floating point unit (FPU)
|
||||
|
||||
CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that
|
||||
cause a 100 second delay during boot-up. This 100 second delay
|
||||
serves no purpose other than it allows you to calibratre
|
||||
CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure
|
||||
the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until
|
||||
the delay actually is 100 seconds.
|
||||
CONFIG_ARCH_FPU=y
|
||||
|
||||
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
|
||||
have LEDs
|
||||
|
||||
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
|
||||
stack. If defined, this symbol is the size of the interrupt
|
||||
stack in bytes. If not defined, the user task stacks will be
|
||||
used during interrupt handling.
|
||||
|
||||
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
|
||||
|
||||
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
|
||||
|
||||
CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that
|
||||
cause a 100 second delay during boot-up. This 100 second delay
|
||||
serves no purpose other than it allows you to calibratre
|
||||
CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure
|
||||
the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until
|
||||
the delay actually is 100 seconds.
|
||||
|
||||
Individual subsystems can be enabled:
|
||||
|
||||
AHB1
|
||||
----
|
||||
CONFIG_STM32_CRC
|
||||
CONFIG_STM32_BKPSRAM
|
||||
CONFIG_STM32_CCMDATARAM
|
||||
CONFIG_STM32_DMA1
|
||||
CONFIG_STM32_DMA2
|
||||
CONFIG_STM32_ETHMAC
|
||||
CONFIG_STM32_OTGHS
|
||||
AHB1
|
||||
----
|
||||
CONFIG_STM32_CRC
|
||||
CONFIG_STM32_BKPSRAM
|
||||
CONFIG_STM32_CCMDATARAM
|
||||
CONFIG_STM32_DMA1
|
||||
CONFIG_STM32_DMA2
|
||||
CONFIG_STM32_ETHMAC
|
||||
CONFIG_STM32_OTGHS
|
||||
|
||||
AHB2
|
||||
----
|
||||
CONFIG_STM32_DCMI
|
||||
CONFIG_STM32_CRYP
|
||||
CONFIG_STM32_HASH
|
||||
CONFIG_STM32_RNG
|
||||
CONFIG_STM32_OTGFS
|
||||
AHB2
|
||||
----
|
||||
CONFIG_STM32_DCMI
|
||||
CONFIG_STM32_CRYP
|
||||
CONFIG_STM32_HASH
|
||||
CONFIG_STM32_RNG
|
||||
CONFIG_STM32_OTGFS
|
||||
|
||||
AHB3
|
||||
----
|
||||
CONFIG_STM32_FSMC
|
||||
AHB3
|
||||
----
|
||||
CONFIG_STM32_FSMC
|
||||
|
||||
APB1
|
||||
----
|
||||
CONFIG_STM32_TIM2
|
||||
CONFIG_STM32_TIM3
|
||||
CONFIG_STM32_TIM4
|
||||
CONFIG_STM32_TIM5
|
||||
CONFIG_STM32_TIM6
|
||||
CONFIG_STM32_TIM7
|
||||
CONFIG_STM32_TIM12
|
||||
CONFIG_STM32_TIM13
|
||||
CONFIG_STM32_TIM14
|
||||
CONFIG_STM32_WWDG
|
||||
CONFIG_STM32_SPI2
|
||||
CONFIG_STM32_SPI3
|
||||
CONFIG_STM32_USART2
|
||||
CONFIG_STM32_USART3
|
||||
CONFIG_STM32_UART4
|
||||
CONFIG_STM32_UART5
|
||||
CONFIG_STM32_I2C1
|
||||
CONFIG_STM32_I2C2
|
||||
CONFIG_STM32_I2C3
|
||||
CONFIG_STM32_CAN1
|
||||
CONFIG_STM32_CAN2
|
||||
CONFIG_STM32_DAC1
|
||||
CONFIG_STM32_DAC2
|
||||
CONFIG_STM32_PWR -- Required for RTC
|
||||
APB1
|
||||
----
|
||||
CONFIG_STM32_TIM2
|
||||
CONFIG_STM32_TIM3
|
||||
CONFIG_STM32_TIM4
|
||||
CONFIG_STM32_TIM5
|
||||
CONFIG_STM32_TIM6
|
||||
CONFIG_STM32_TIM7
|
||||
CONFIG_STM32_TIM12
|
||||
CONFIG_STM32_TIM13
|
||||
CONFIG_STM32_TIM14
|
||||
CONFIG_STM32_WWDG
|
||||
CONFIG_STM32_SPI2
|
||||
CONFIG_STM32_SPI3
|
||||
CONFIG_STM32_USART2
|
||||
CONFIG_STM32_USART3
|
||||
CONFIG_STM32_UART4
|
||||
CONFIG_STM32_UART5
|
||||
CONFIG_STM32_I2C1
|
||||
CONFIG_STM32_I2C2
|
||||
CONFIG_STM32_I2C3
|
||||
CONFIG_STM32_CAN1
|
||||
CONFIG_STM32_CAN2
|
||||
CONFIG_STM32_DAC1
|
||||
CONFIG_STM32_DAC2
|
||||
CONFIG_STM32_PWR -- Required for RTC
|
||||
|
||||
APB2
|
||||
----
|
||||
CONFIG_STM32_TIM1
|
||||
CONFIG_STM32_TIM8
|
||||
CONFIG_STM32_USART1
|
||||
CONFIG_STM32_USART6
|
||||
CONFIG_STM32_ADC1
|
||||
CONFIG_STM32_ADC2
|
||||
CONFIG_STM32_ADC3
|
||||
CONFIG_STM32_SDIO
|
||||
CONFIG_STM32_SPI1
|
||||
CONFIG_STM32_SYSCFG
|
||||
CONFIG_STM32_TIM9
|
||||
CONFIG_STM32_TIM10
|
||||
CONFIG_STM32_TIM11
|
||||
APB2
|
||||
----
|
||||
CONFIG_STM32_TIM1
|
||||
CONFIG_STM32_TIM8
|
||||
CONFIG_STM32_USART1
|
||||
CONFIG_STM32_USART6
|
||||
CONFIG_STM32_ADC1
|
||||
CONFIG_STM32_ADC2
|
||||
CONFIG_STM32_ADC3
|
||||
CONFIG_STM32_SDIO
|
||||
CONFIG_STM32_SPI1
|
||||
CONFIG_STM32_SYSCFG
|
||||
CONFIG_STM32_TIM9
|
||||
CONFIG_STM32_TIM10
|
||||
CONFIG_STM32_TIM11
|
||||
|
||||
Timer and I2C devices may need to the following to force power to be applied
|
||||
unconditionally at power up. (Otherwise, the device is powered when it is
|
||||
@ -605,16 +675,16 @@ STM3240G-EVAL-specific Configuration Options
|
||||
to assign the timer (n) for used by the ADC or DAC, but then you also have to
|
||||
configure which ADC or DAC (m) it is assigned to.
|
||||
|
||||
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14
|
||||
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14
|
||||
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3
|
||||
CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14
|
||||
CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2
|
||||
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14
|
||||
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14
|
||||
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3
|
||||
CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14
|
||||
CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2
|
||||
|
||||
For each timer that is enabled for PWM usage, we need the following additional
|
||||
configuration settings:
|
||||
|
||||
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
|
||||
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
|
||||
|
||||
NOTE: The STM32 timers are each capable of generating different signals on
|
||||
each of the four channels with different duty cycles. That capability is
|
||||
@ -622,78 +692,78 @@ STM3240G-EVAL-specific Configuration Options
|
||||
|
||||
JTAG Enable settings (by default JTAG-DP and SW-DP are disabled):
|
||||
|
||||
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
|
||||
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
|
||||
but without JNTRST.
|
||||
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
|
||||
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
|
||||
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
|
||||
but without JNTRST.
|
||||
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
|
||||
|
||||
STM3240xxx specific device driver settings
|
||||
|
||||
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
|
||||
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
|
||||
m (m=4,5) for the console and ttys0 (default is the USART1).
|
||||
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
|
||||
This specific the size of the receive buffer
|
||||
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
|
||||
being sent. This specific the size of the transmit buffer
|
||||
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
|
||||
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
|
||||
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
|
||||
CONFIG_U[S]ARTn_2STOP - Two stop bits
|
||||
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
|
||||
This specific the size of the receive buffer
|
||||
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
|
||||
being sent. This specific the size of the transmit buffer
|
||||
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
|
||||
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
|
||||
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
|
||||
CONFIG_U[S]ARTn_2STOP - Two stop bits
|
||||
|
||||
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
|
||||
support. Non-interrupt-driven, poll-waiting is recommended if the
|
||||
interrupt rate would be to high in the interrupt driven case.
|
||||
CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance.
|
||||
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
|
||||
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
|
||||
support. Non-interrupt-driven, poll-waiting is recommended if the
|
||||
interrupt rate would be to high in the interrupt driven case.
|
||||
CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance.
|
||||
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
|
||||
|
||||
CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO
|
||||
and CONFIG_STM32_DMA2.
|
||||
CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128
|
||||
CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
|
||||
Default: Medium
|
||||
CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default:
|
||||
4-bit transfer mode.
|
||||
CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO
|
||||
and CONFIG_STM32_DMA2.
|
||||
CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128
|
||||
CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
|
||||
Default: Medium
|
||||
CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default:
|
||||
4-bit transfer mode.
|
||||
|
||||
CONFIG_STM32_PHYADDR - The 5-bit address of the PHY on the board
|
||||
CONFIG_STM32_MII - Support Ethernet MII interface
|
||||
CONFIG_STM32_MII_MCO1 - Use MCO1 to clock the MII interface
|
||||
CONFIG_STM32_MII_MCO2 - Use MCO2 to clock the MII interface
|
||||
CONFIG_STM32_RMII - Support Ethernet RMII interface
|
||||
CONFIG_STM32_AUTONEG - Use PHY autonegotion to determine speed and mode
|
||||
CONFIG_STM32_ETHFD - If CONFIG_STM32_AUTONEG is not defined, then this
|
||||
may be defined to select full duplex mode. Default: half-duplex
|
||||
CONFIG_STM32_ETH100MBPS - If CONFIG_STM32_AUTONEG is not defined, then this
|
||||
may be defined to select 100 MBps speed. Default: 10 Mbps
|
||||
CONFIG_STM32_PHYSR - This must be provided if CONFIG_STM32_AUTONEG is
|
||||
defined. The PHY status register address may diff from PHY to PHY. This
|
||||
configuration sets the address of the PHY status register.
|
||||
CONFIG_STM32_PHYSR_SPEED - This must be provided if CONFIG_STM32_AUTONEG is
|
||||
defined. This provides bit mask indicating 10 or 100MBps speed.
|
||||
CONFIG_STM32_PHYSR_100MBPS - This must be provided if CONFIG_STM32_AUTONEG is
|
||||
defined. This provides the value of the speed bit(s) indicating 100MBps speed.
|
||||
CONFIG_STM32_PHYSR_MODE - This must be provided if CONFIG_STM32_AUTONEG is
|
||||
defined. This provide bit mask indicating full or half duplex modes.
|
||||
CONFIG_STM32_PHYSR_FULLDUPLEX - This must be provided if CONFIG_STM32_AUTONEG is
|
||||
defined. This provides the value of the mode bits indicating full duplex mode.
|
||||
CONFIG_STM32_ETH_PTP - Precision Time Protocol (PTP). Not supported
|
||||
but some hooks are indicated with this condition.
|
||||
CONFIG_STM32_PHYADDR - The 5-bit address of the PHY on the board
|
||||
CONFIG_STM32_MII - Support Ethernet MII interface
|
||||
CONFIG_STM32_MII_MCO1 - Use MCO1 to clock the MII interface
|
||||
CONFIG_STM32_MII_MCO2 - Use MCO2 to clock the MII interface
|
||||
CONFIG_STM32_RMII - Support Ethernet RMII interface
|
||||
CONFIG_STM32_AUTONEG - Use PHY autonegotion to determine speed and mode
|
||||
CONFIG_STM32_ETHFD - If CONFIG_STM32_AUTONEG is not defined, then this
|
||||
may be defined to select full duplex mode. Default: half-duplex
|
||||
CONFIG_STM32_ETH100MBPS - If CONFIG_STM32_AUTONEG is not defined, then this
|
||||
may be defined to select 100 MBps speed. Default: 10 Mbps
|
||||
CONFIG_STM32_PHYSR - This must be provided if CONFIG_STM32_AUTONEG is
|
||||
defined. The PHY status register address may diff from PHY to PHY. This
|
||||
configuration sets the address of the PHY status register.
|
||||
CONFIG_STM32_PHYSR_SPEED - This must be provided if CONFIG_STM32_AUTONEG is
|
||||
defined. This provides bit mask indicating 10 or 100MBps speed.
|
||||
CONFIG_STM32_PHYSR_100MBPS - This must be provided if CONFIG_STM32_AUTONEG is
|
||||
defined. This provides the value of the speed bit(s) indicating 100MBps speed.
|
||||
CONFIG_STM32_PHYSR_MODE - This must be provided if CONFIG_STM32_AUTONEG is
|
||||
defined. This provide bit mask indicating full or half duplex modes.
|
||||
CONFIG_STM32_PHYSR_FULLDUPLEX - This must be provided if CONFIG_STM32_AUTONEG is
|
||||
defined. This provides the value of the mode bits indicating full duplex mode.
|
||||
CONFIG_STM32_ETH_PTP - Precision Time Protocol (PTP). Not supported
|
||||
but some hooks are indicated with this condition.
|
||||
|
||||
STM3240G-EVAL CAN Configuration
|
||||
|
||||
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
|
||||
CONFIG_STM32_CAN2 must also be defined)
|
||||
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
|
||||
Default: 8
|
||||
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
|
||||
Default: 4
|
||||
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
|
||||
mode for testing. The STM32 CAN driver does support loopback mode.
|
||||
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined.
|
||||
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined.
|
||||
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
|
||||
CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
|
||||
CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
|
||||
dump of all CAN registers.
|
||||
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
|
||||
CONFIG_STM32_CAN2 must also be defined)
|
||||
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
|
||||
Default: 8
|
||||
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
|
||||
Default: 4
|
||||
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
|
||||
mode for testing. The STM32 CAN driver does support loopback mode.
|
||||
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined.
|
||||
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined.
|
||||
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
|
||||
CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
|
||||
CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
|
||||
dump of all CAN registers.
|
||||
|
||||
STM3240G-EVAL LCD Hardware Configuration
|
||||
|
||||
@ -703,10 +773,10 @@ Configurations
|
||||
Each STM3240G-EVAL configuration is maintained in a sudirectory and
|
||||
can be selected as follow:
|
||||
|
||||
cd tools
|
||||
./configure.sh stm3240g-eval/<subdir>
|
||||
cd -
|
||||
. ./setenv.sh
|
||||
cd tools
|
||||
./configure.sh stm3240g-eval/<subdir>
|
||||
cd -
|
||||
. ./setenv.sh
|
||||
|
||||
Where <subdir> is one of the following:
|
||||
|
||||
|
||||
@ -120,6 +120,29 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
|
||||
CONFIG_STM32_JTAG_NOJNTRST_ENABLE=n
|
||||
CONFIG_STM32_JTAG_SW_ENABLE=n
|
||||
|
||||
#
|
||||
# On-chip TCM SRAM configuration
|
||||
#
|
||||
# CONFIG_STM32_TCMEXCLUDE - Exclude TCM SRAM from the HEAP. You would need
|
||||
# to do this if DMA is enabled to prevent non-DMA-able TCM memory from
|
||||
# being a part of the stack.
|
||||
#
|
||||
|
||||
#
|
||||
# On-board FSMC SRAM configuration
|
||||
#
|
||||
# CONFIG_STM32_FSMC - Required. See below
|
||||
# CONFIG_MM_REGIONS - Required. Must be 2 or 3 (see above)
|
||||
#
|
||||
# CONFIG_STM32_FSMC_SRAM=y - Indicates that SRAM is available via the
|
||||
# FSMC (as opposed to an LCD or FLASH).
|
||||
# CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space
|
||||
# CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space
|
||||
#
|
||||
CONFIG_STM32_FSMC_SRAM=y
|
||||
CONFIG_HEAP2_BASE=0x64000000
|
||||
CONFIG_HEAP2_END=(0x64000000+(2*1024*1024))
|
||||
|
||||
#
|
||||
# Individual subsystems can be enabled:
|
||||
#
|
||||
|
||||
@ -59,9 +59,11 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++
|
||||
|
||||
# These are the Cygwin paths to the locations where I installed the Atollic
|
||||
# toolchain under windows. You will also have to edit this if you install
|
||||
# the CodeSourcery toolchain in any other location
|
||||
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
|
||||
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
|
||||
# the Atollic toolchain in any other location. /usr/bin is added before
|
||||
# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
|
||||
# at those locations as well.
|
||||
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
|
||||
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
|
||||
|
||||
# This the Cygwin path to the location where I build the buildroot
|
||||
# toolchain.
|
||||
|
||||
@ -257,6 +257,28 @@
|
||||
#define BUTTON_TAMPER_BIT (1 << BUTTON_TAMPER)
|
||||
#define BUTTON_USER_BIT (1 << BUTTON_USER)
|
||||
|
||||
/* SRAM definitions *****************************************************************/
|
||||
/* The 16 Mbit SRAM is connected to the STM32F407IGH6 FSMC bus which shares the same
|
||||
* I/Os with the CAN1 bus. Jumper settings:
|
||||
*
|
||||
* JP1: Connect PE4 to SRAM as A20
|
||||
* JP2: onnect PE3 to SRAM as A19
|
||||
*
|
||||
* JP3 and JP10 must not be fitted for SRAM and LCD application. JP3 and JP10
|
||||
* select CAN1 or CAN2 if fitted; neither if not fitted.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_STM32_FSMC) && defined(CONFIG_STM32_FSMC_SRAM)
|
||||
# if defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)
|
||||
# error "The STM3240G-EVAL cannot support both CAN and FSMC SRAM"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/* This is the Bank1 SRAM2 address: */
|
||||
|
||||
#define BOARD_SRAM_BASE 0x64000000
|
||||
#define BOARD_SRAM_SIZE (2*1024*1024)
|
||||
|
||||
/* Alternate function pin selections ************************************************/
|
||||
|
||||
/* UART3:
|
||||
|
||||
@ -120,6 +120,29 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
|
||||
CONFIG_STM32_JTAG_NOJNTRST_ENABLE=n
|
||||
CONFIG_STM32_JTAG_SW_ENABLE=n
|
||||
|
||||
#
|
||||
# On-chip TCM SRAM configuration
|
||||
#
|
||||
# CONFIG_STM32_TCMEXCLUDE - Exclude TCM SRAM from the HEAP. You would need
|
||||
# to do this if DMA is enabled to prevent non-DMA-able TCM memory from
|
||||
# being a part of the stack.
|
||||
#
|
||||
|
||||
#
|
||||
# On-board FSMC SRAM configuration
|
||||
#
|
||||
# CONFIG_STM32_FSMC - Required. See below
|
||||
# CONFIG_MM_REGIONS - Required. Must be 2 or 3 (see above)
|
||||
#
|
||||
# CONFIG_STM32_FSMC_SRAM=y - Indicates that SRAM is available via the
|
||||
# FSMC (as opposed to an LCD or FLASH).
|
||||
# CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space
|
||||
# CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space
|
||||
#
|
||||
CONFIG_STM32_FSMC_SRAM=y
|
||||
CONFIG_HEAP2_BASE=0x64000000
|
||||
CONFIG_HEAP2_END=(0x64000000+(2*1024*1024))
|
||||
|
||||
#
|
||||
# Individual subsystems can be enabled:
|
||||
#
|
||||
|
||||
@ -59,9 +59,11 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++
|
||||
|
||||
# These are the Cygwin paths to the locations where I installed the Atollic
|
||||
# toolchain under windows. You will also have to edit this if you install
|
||||
# the CodeSourcery toolchain in any other location
|
||||
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
|
||||
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
|
||||
# the Atollic toolchain in any other location. /usr/bin is added before
|
||||
# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
|
||||
# at those locations as well.
|
||||
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
|
||||
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
|
||||
|
||||
# This the Cygwin path to the location where I build the buildroot
|
||||
# toolchain.
|
||||
|
||||
@ -120,6 +120,29 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
|
||||
CONFIG_STM32_JTAG_NOJNTRST_ENABLE=n
|
||||
CONFIG_STM32_JTAG_SW_ENABLE=n
|
||||
|
||||
#
|
||||
# On-chip TCM SRAM configuration
|
||||
#
|
||||
# CONFIG_STM32_TCMEXCLUDE - Exclude TCM SRAM from the HEAP. You would need
|
||||
# to do this if DMA is enabled to prevent non-DMA-able TCM memory from
|
||||
# being a part of the stack.
|
||||
#
|
||||
|
||||
#
|
||||
# On-board FSMC SRAM configuration
|
||||
#
|
||||
# CONFIG_STM32_FSMC - Required. See below
|
||||
# CONFIG_MM_REGIONS - Required. Must be 2 or 3 (see above)
|
||||
#
|
||||
# CONFIG_STM32_FSMC_SRAM=y - Indicates that SRAM is available via the
|
||||
# FSMC (as opposed to an LCD or FLASH).
|
||||
# CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space
|
||||
# CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space
|
||||
#
|
||||
CONFIG_STM32_FSMC_SRAM=y
|
||||
CONFIG_HEAP2_BASE=0x64000000
|
||||
CONFIG_HEAP2_END=(0x64000000+(2*1024*1024))
|
||||
|
||||
#
|
||||
# Individual subsystems can be enabled:
|
||||
#
|
||||
|
||||
@ -59,9 +59,11 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++
|
||||
|
||||
# These are the Cygwin paths to the locations where I installed the Atollic
|
||||
# toolchain under windows. You will also have to edit this if you install
|
||||
# the CodeSourcery toolchain in any other location
|
||||
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
|
||||
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
|
||||
# the Atollic toolchain in any other location. /usr/bin is added before
|
||||
# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
|
||||
# at those locations as well.
|
||||
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
|
||||
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
|
||||
|
||||
# This the Cygwin path to the location where I build the buildroot
|
||||
# toolchain.
|
||||
|
||||
@ -120,6 +120,30 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
|
||||
CONFIG_STM32_JTAG_NOJNTRST_ENABLE=n
|
||||
CONFIG_STM32_JTAG_SW_ENABLE=n
|
||||
|
||||
#
|
||||
# On-chip TCM SRAM configuration
|
||||
#
|
||||
# CONFIG_STM32_TCMEXCLUDE - Exclude TCM SRAM from the HEAP. You would need
|
||||
# to do this if DMA is enabled to prevent non-DMA-able TCM memory from
|
||||
# being a part of the stack.
|
||||
#
|
||||
CONFIG_STM32_TCMEXCLUDE=y
|
||||
|
||||
#
|
||||
# On-board FSMC SRAM configuration
|
||||
#
|
||||
# CONFIG_STM32_FSMC - Required. See below
|
||||
# CONFIG_MM_REGIONS - Required. Must be 2 or 3 (see above)
|
||||
#
|
||||
# CONFIG_STM32_FSMC_SRAM=y - Indicates that SRAM is available via the
|
||||
# FSMC (as opposed to an LCD or FLASH).
|
||||
# CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space
|
||||
# CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space
|
||||
#
|
||||
CONFIG_STM32_FSMC_SRAM=y
|
||||
CONFIG_HEAP2_BASE=0x64000000
|
||||
CONFIG_HEAP2_END=(0x64000000+(2*1024*1024))
|
||||
|
||||
#
|
||||
# Individual subsystems can be enabled:
|
||||
#
|
||||
|
||||
@ -59,9 +59,11 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++
|
||||
|
||||
# These are the Cygwin paths to the locations where I installed the Atollic
|
||||
# toolchain under windows. You will also have to edit this if you install
|
||||
# the CodeSourcery toolchain in any other location
|
||||
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
|
||||
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
|
||||
# the Atollic toolchain in any other location. /usr/bin is added before
|
||||
# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
|
||||
# at those locations as well.
|
||||
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
|
||||
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
|
||||
|
||||
# This the Cygwin path to the location where I build the buildroot
|
||||
# toolchain.
|
||||
|
||||
@ -120,6 +120,29 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
|
||||
CONFIG_STM32_JTAG_NOJNTRST_ENABLE=n
|
||||
CONFIG_STM32_JTAG_SW_ENABLE=n
|
||||
|
||||
#
|
||||
# On-chip TCM SRAM configuration
|
||||
#
|
||||
# CONFIG_STM32_TCMEXCLUDE - Exclude TCM SRAM from the HEAP. You would need
|
||||
# to do this if DMA is enabled to prevent non-DMA-able TCM memory from
|
||||
# being a part of the stack.
|
||||
#
|
||||
|
||||
#
|
||||
# On-board FSMC SRAM configuration
|
||||
#
|
||||
# CONFIG_STM32_FSMC - Required. See below
|
||||
# CONFIG_MM_REGIONS - Required. Must be 2 or 3 (see above)
|
||||
#
|
||||
# CONFIG_STM32_FSMC_SRAM=y - Indicates that SRAM is available via the
|
||||
# FSMC (as opposed to an LCD or FLASH).
|
||||
# CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space
|
||||
# CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space
|
||||
#
|
||||
CONFIG_STM32_FSMC_SRAM=y
|
||||
CONFIG_HEAP2_BASE=0x64000000
|
||||
CONFIG_HEAP2_END=(0x64000000+(2*1024*1024))
|
||||
|
||||
#
|
||||
# Individual subsystems can be enabled:
|
||||
#
|
||||
|
||||
@ -59,9 +59,11 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++
|
||||
|
||||
# These are the Cygwin paths to the locations where I installed the Atollic
|
||||
# toolchain under windows. You will also have to edit this if you install
|
||||
# the CodeSourcery toolchain in any other location
|
||||
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
|
||||
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
|
||||
# the Atollic toolchain in any other location. /usr/bin is added before
|
||||
# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
|
||||
# at those locations as well.
|
||||
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
|
||||
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
|
||||
|
||||
# This the Cygwin path to the location where I build the buildroot
|
||||
# toolchain.
|
||||
|
||||
@ -120,6 +120,29 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
|
||||
CONFIG_STM32_JTAG_NOJNTRST_ENABLE=n
|
||||
CONFIG_STM32_JTAG_SW_ENABLE=n
|
||||
|
||||
#
|
||||
# On-chip TCM SRAM configuration
|
||||
#
|
||||
# CONFIG_STM32_TCMEXCLUDE - Exclude TCM SRAM from the HEAP. You would need
|
||||
# to do this if DMA is enabled to prevent non-DMA-able TCM memory from
|
||||
# being a part of the stack.
|
||||
#
|
||||
|
||||
#
|
||||
# On-board FSMC SRAM configuration
|
||||
#
|
||||
# CONFIG_STM32_FSMC - Required. See below
|
||||
# CONFIG_MM_REGIONS - Required. Must be 2 or 3 (see above)
|
||||
#
|
||||
# CONFIG_STM32_FSMC_SRAM=y - Indicates that SRAM is available via the
|
||||
# FSMC (as opposed to an LCD or FLASH).
|
||||
# CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space
|
||||
# CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space
|
||||
#
|
||||
CONFIG_STM32_FSMC_SRAM=y
|
||||
CONFIG_HEAP2_BASE=0x64000000
|
||||
CONFIG_HEAP2_END=(0x64000000+(2*1024*1024))
|
||||
|
||||
#
|
||||
# Individual subsystems can be enabled:
|
||||
#
|
||||
|
||||
@ -59,9 +59,11 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++
|
||||
|
||||
# These are the Cygwin paths to the locations where I installed the Atollic
|
||||
# toolchain under windows. You will also have to edit this if you install
|
||||
# the CodeSourcery toolchain in any other location
|
||||
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
|
||||
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
|
||||
# the Atollic toolchain in any other location. /usr/bin is added before
|
||||
# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
|
||||
# at those locations as well.
|
||||
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
|
||||
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
|
||||
|
||||
# This the Cygwin path to the location where I build the buildroot
|
||||
# toolchain.
|
||||
|
||||
@ -16,6 +16,7 @@ Contents
|
||||
- UARTs
|
||||
- Timer Inputs/Outputs
|
||||
- FPU
|
||||
- FSMC SRAM
|
||||
- STM32F4Discovery-specific Configuration Options
|
||||
- Configurations
|
||||
|
||||
@ -105,18 +106,7 @@ GNU Toolchain Options
|
||||
and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path
|
||||
appears in your PATH variable before /usr/bin, then you will get the wrong gcc
|
||||
when you try to build host executables. This will cause to strange, uninterpretable
|
||||
errors build some host binaries in tools/ when you first make. Here is my
|
||||
workaround kludge.
|
||||
|
||||
1. Edit the setenv.sh to put the Atollic toolchain at the beginning of the PATH
|
||||
2. Source the setenv.sh file: . ./setenv.sh. A side effect of this is that it
|
||||
will set an environment variable called PATH_ORIG.
|
||||
3. Then go back to the original patch: export PATH=$PATH_ORIG
|
||||
4. Then make. The make will build all of the host executable but will fail
|
||||
when it gets to the first ARM binary.
|
||||
5. Then source setenv.sh again: . ./setenv.sh. That will correct the PATH
|
||||
again. When you do make again, the host executables are already made and
|
||||
now the correct PATH is in place for the ARM build.
|
||||
errors build some host binaries in tools/ when you first make.
|
||||
|
||||
Also, the Atollic toolchains are the only toolchains that have built-in support for
|
||||
the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will
|
||||
@ -431,6 +421,58 @@ options as used with the Atollic toolchain in the Make.defs file:
|
||||
|
||||
ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard
|
||||
|
||||
FSMC SRAM
|
||||
=========
|
||||
|
||||
On-board SRAM
|
||||
-------------
|
||||
The STM32F4Discovery has no on-board SRAM. The information here is only for
|
||||
reference in case you choose to add some.
|
||||
|
||||
Configuration Options
|
||||
---------------------
|
||||
Internal SRAM is available in all members of the STM32 family. The F4 family
|
||||
also contains internal TCM SRAM. This SRAM is different because it cannot
|
||||
be used for DMA. So if DMA needed, then the following should be defined
|
||||
to exclude TCM SRAM from the heap:
|
||||
|
||||
CONFIG_STM32_TCMEXCLUDE : Exclude TCM SRAM from the HEAP
|
||||
|
||||
In addition to internal SRAM, SRAM may also be available through the FSMC.
|
||||
In order to use FSMC SRAM, the following additional things need to be
|
||||
present in the NuttX configuration file:
|
||||
|
||||
CONFIG_STM32_FSMC=y : Enables the FSMC
|
||||
CONFIG_STM32_FSMC_SRAM=y : Indicates that SRAM is available via the
|
||||
FSMC (as opposed to an LCD or FLASH).
|
||||
CONFIG_HEAP2_BASE : The base address of the SRAM in the FSMC
|
||||
address space
|
||||
CONFIG_HEAP2_END : The end (+1) of the SRAM in the FSMC
|
||||
address space
|
||||
CONFIG_MM_REGIONS : Must be set to a large enough value to
|
||||
include the FSMC SRAM
|
||||
|
||||
SRAM Configurations
|
||||
-------------------
|
||||
There are 4 possible SRAM configurations:
|
||||
|
||||
Configuration 1. System SRAM (only)
|
||||
CONFIG_MM_REGIONS == 1
|
||||
CONFIG_STM32_FSMC_SRAM NOT defined
|
||||
CONFIG_STM32_TCMEXCLUDE defined
|
||||
Configuration 2. System SRAM and TCM SRAM
|
||||
CONFIG_MM_REGIONS == 2
|
||||
CONFIG_STM32_FSMC_SRAM NOT defined
|
||||
CONFIG_STM32_TCMEXCLUDE NOT defined
|
||||
Configuration 3. System SRAM and FSMC SRAM
|
||||
CONFIG_MM_REGIONS == 2
|
||||
CONFIG_STM32_FSMC_SRAM defined
|
||||
CONFIG_STM32_TCMEXCLUDE defined
|
||||
Configuration 4. System SRAM, TCM SRAM, and FSMC SRAM
|
||||
CONFIG_MM_REGIONS == 3
|
||||
CONFIG_STM32_FSMC_SRAM defined
|
||||
CONFIG_STM32_TCMEXCLUDE NOT defined
|
||||
|
||||
Configuration Changes
|
||||
---------------------
|
||||
|
||||
@ -461,153 +503,166 @@ by the "Lite" version of the Atollic toolchain.
|
||||
STM32F4Discovery-specific Configuration Options
|
||||
===============================================
|
||||
|
||||
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
|
||||
be set to:
|
||||
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
|
||||
be set to:
|
||||
|
||||
CONFIG_ARCH=arm
|
||||
CONFIG_ARCH=arm
|
||||
|
||||
CONFIG_ARCH_family - For use in C code:
|
||||
CONFIG_ARCH_family - For use in C code:
|
||||
|
||||
CONFIG_ARCH_ARM=y
|
||||
CONFIG_ARCH_ARM=y
|
||||
|
||||
CONFIG_ARCH_architecture - For use in C code:
|
||||
CONFIG_ARCH_architecture - For use in C code:
|
||||
|
||||
CONFIG_ARCH_CORTEXM4=y
|
||||
CONFIG_ARCH_CORTEXM4=y
|
||||
|
||||
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
|
||||
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
|
||||
|
||||
CONFIG_ARCH_CHIP=stm32
|
||||
CONFIG_ARCH_CHIP=stm32
|
||||
|
||||
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
|
||||
chip:
|
||||
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
|
||||
chip:
|
||||
|
||||
CONFIG_ARCH_CHIP_STM32F407IG=y
|
||||
CONFIG_ARCH_CHIP_STM32F407IG=y
|
||||
|
||||
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
|
||||
configuration features.
|
||||
|
||||
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
|
||||
|
||||
CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
|
||||
hence, the board that supports the particular chip or SoC.
|
||||
CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
|
||||
hence, the board that supports the particular chip or SoC.
|
||||
|
||||
CONFIG_ARCH_BOARD=STM32F4Discovery (for the STM32F4Discovery development board)
|
||||
CONFIG_ARCH_BOARD=STM32F4Discovery (for the STM32F4Discovery development board)
|
||||
|
||||
CONFIG_ARCH_BOARD_name - For use in C code
|
||||
CONFIG_ARCH_BOARD_name - For use in C code
|
||||
|
||||
CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y
|
||||
CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y
|
||||
|
||||
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
|
||||
of delay loops
|
||||
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
|
||||
of delay loops
|
||||
|
||||
CONFIG_ENDIAN_BIG - define if big endian (default is little
|
||||
endian)
|
||||
CONFIG_ENDIAN_BIG - define if big endian (default is little
|
||||
endian)
|
||||
|
||||
CONFIG_DRAM_SIZE - Describes the installed DRAM (SRAM in this case):
|
||||
CONFIG_DRAM_SIZE - Describes the installed DRAM (SRAM in this case):
|
||||
|
||||
CONFIG_DRAM_SIZE=0x00010000 (64Kb)
|
||||
CONFIG_DRAM_SIZE=0x00010000 (64Kb)
|
||||
|
||||
CONFIG_DRAM_START - The start address of installed DRAM
|
||||
CONFIG_DRAM_START - The start address of installed DRAM
|
||||
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
|
||||
CONFIG_DRAM_END - Last address+1 of installed RAM
|
||||
CONFIG_DRAM_END - Last address+1 of installed RAM
|
||||
|
||||
CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
|
||||
CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
|
||||
|
||||
CONFIG_ARCH_IRQPRIO - The STM3240xxx supports interrupt prioritization
|
||||
CONFIG_STM32_TCMEXCLUDE - Exclude TCM SRAM from the HEAP
|
||||
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
In addition to internal SRAM, SRAM may also be available through the FSMC.
|
||||
In order to use FSMC SRAM, the following additional things need to be
|
||||
present in the NuttX configuration file:
|
||||
|
||||
CONFIG_ARCH_FPU - The STM3240xxx supports a floating point unit (FPU)
|
||||
CONFIG_STM32_FSMC_SRAM - Indicates that SRAM is available via the
|
||||
FSMC (as opposed to an LCD or FLASH).
|
||||
|
||||
CONFIG_ARCH_FPU=y
|
||||
CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space
|
||||
|
||||
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
|
||||
have LEDs
|
||||
CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space
|
||||
|
||||
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
|
||||
stack. If defined, this symbol is the size of the interrupt
|
||||
stack in bytes. If not defined, the user task stacks will be
|
||||
used during interrupt handling.
|
||||
CONFIG_ARCH_IRQPRIO - The STM3240xxx supports interrupt prioritization
|
||||
|
||||
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
|
||||
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
|
||||
CONFIG_ARCH_FPU - The STM3240xxx supports a floating point unit (FPU)
|
||||
|
||||
CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that
|
||||
cause a 100 second delay during boot-up. This 100 second delay
|
||||
serves no purpose other than it allows you to calibratre
|
||||
CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure
|
||||
the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until
|
||||
the delay actually is 100 seconds.
|
||||
CONFIG_ARCH_FPU=y
|
||||
|
||||
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
|
||||
have LEDs
|
||||
|
||||
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
|
||||
stack. If defined, this symbol is the size of the interrupt
|
||||
stack in bytes. If not defined, the user task stacks will be
|
||||
used during interrupt handling.
|
||||
|
||||
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
|
||||
|
||||
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
|
||||
|
||||
CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that
|
||||
cause a 100 second delay during boot-up. This 100 second delay
|
||||
serves no purpose other than it allows you to calibratre
|
||||
CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure
|
||||
the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until
|
||||
the delay actually is 100 seconds.
|
||||
|
||||
Individual subsystems can be enabled:
|
||||
|
||||
AHB1
|
||||
----
|
||||
CONFIG_STM32_CRC
|
||||
CONFIG_STM32_BKPSRAM
|
||||
CONFIG_STM32_CCMDATARAM
|
||||
CONFIG_STM32_DMA1
|
||||
CONFIG_STM32_DMA2
|
||||
CONFIG_STM32_ETHMAC
|
||||
CONFIG_STM32_OTGHS
|
||||
AHB1
|
||||
----
|
||||
CONFIG_STM32_CRC
|
||||
CONFIG_STM32_BKPSRAM
|
||||
CONFIG_STM32_CCMDATARAM
|
||||
CONFIG_STM32_DMA1
|
||||
CONFIG_STM32_DMA2
|
||||
CONFIG_STM32_ETHMAC
|
||||
CONFIG_STM32_OTGHS
|
||||
|
||||
AHB2
|
||||
----
|
||||
CONFIG_STM32_DCMI
|
||||
CONFIG_STM32_CRYP
|
||||
CONFIG_STM32_HASH
|
||||
CONFIG_STM32_RNG
|
||||
CONFIG_STM32_OTGFS
|
||||
AHB2
|
||||
----
|
||||
CONFIG_STM32_DCMI
|
||||
CONFIG_STM32_CRYP
|
||||
CONFIG_STM32_HASH
|
||||
CONFIG_STM32_RNG
|
||||
CONFIG_STM32_OTGFS
|
||||
|
||||
AHB3
|
||||
----
|
||||
CONFIG_STM32_FSMC
|
||||
AHB3
|
||||
----
|
||||
CONFIG_STM32_FSMC
|
||||
|
||||
APB1
|
||||
----
|
||||
CONFIG_STM32_TIM2
|
||||
CONFIG_STM32_TIM3
|
||||
CONFIG_STM32_TIM4
|
||||
CONFIG_STM32_TIM5
|
||||
CONFIG_STM32_TIM6
|
||||
CONFIG_STM32_TIM7
|
||||
CONFIG_STM32_TIM12
|
||||
CONFIG_STM32_TIM13
|
||||
CONFIG_STM32_TIM14
|
||||
CONFIG_STM32_WWDG
|
||||
CONFIG_STM32_SPI2
|
||||
CONFIG_STM32_SPI3
|
||||
CONFIG_STM32_USART2
|
||||
CONFIG_STM32_USART3
|
||||
CONFIG_STM32_UART4
|
||||
CONFIG_STM32_UART5
|
||||
CONFIG_STM32_I2C1
|
||||
CONFIG_STM32_I2C2
|
||||
CONFIG_STM32_I2C3
|
||||
CONFIG_STM32_CAN1
|
||||
CONFIG_STM32_CAN2
|
||||
CONFIG_STM32_DAC1
|
||||
CONFIG_STM32_DAC2
|
||||
CONFIG_STM32_PWR -- Required for RTC
|
||||
APB1
|
||||
----
|
||||
CONFIG_STM32_TIM2
|
||||
CONFIG_STM32_TIM3
|
||||
CONFIG_STM32_TIM4
|
||||
CONFIG_STM32_TIM5
|
||||
CONFIG_STM32_TIM6
|
||||
CONFIG_STM32_TIM7
|
||||
CONFIG_STM32_TIM12
|
||||
CONFIG_STM32_TIM13
|
||||
CONFIG_STM32_TIM14
|
||||
CONFIG_STM32_WWDG
|
||||
CONFIG_STM32_SPI2
|
||||
CONFIG_STM32_SPI3
|
||||
CONFIG_STM32_USART2
|
||||
CONFIG_STM32_USART3
|
||||
CONFIG_STM32_UART4
|
||||
CONFIG_STM32_UART5
|
||||
CONFIG_STM32_I2C1
|
||||
CONFIG_STM32_I2C2
|
||||
CONFIG_STM32_I2C3
|
||||
CONFIG_STM32_CAN1
|
||||
CONFIG_STM32_CAN2
|
||||
CONFIG_STM32_DAC1
|
||||
CONFIG_STM32_DAC2
|
||||
CONFIG_STM32_PWR -- Required for RTC
|
||||
|
||||
APB2
|
||||
----
|
||||
CONFIG_STM32_TIM1
|
||||
CONFIG_STM32_TIM8
|
||||
CONFIG_STM32_USART1
|
||||
CONFIG_STM32_USART6
|
||||
CONFIG_STM32_ADC1
|
||||
CONFIG_STM32_ADC2
|
||||
CONFIG_STM32_ADC3
|
||||
CONFIG_STM32_SDIO
|
||||
CONFIG_STM32_SPI1
|
||||
CONFIG_STM32_SYSCFG
|
||||
CONFIG_STM32_TIM9
|
||||
CONFIG_STM32_TIM10
|
||||
CONFIG_STM32_TIM11
|
||||
APB2
|
||||
----
|
||||
CONFIG_STM32_TIM1
|
||||
CONFIG_STM32_TIM8
|
||||
CONFIG_STM32_USART1
|
||||
CONFIG_STM32_USART6
|
||||
CONFIG_STM32_ADC1
|
||||
CONFIG_STM32_ADC2
|
||||
CONFIG_STM32_ADC3
|
||||
CONFIG_STM32_SDIO
|
||||
CONFIG_STM32_SPI1
|
||||
CONFIG_STM32_SYSCFG
|
||||
CONFIG_STM32_TIM9
|
||||
CONFIG_STM32_TIM10
|
||||
CONFIG_STM32_TIM11
|
||||
|
||||
Timer and I2C devices may need to the following to force power to be applied
|
||||
unconditionally at power up. (Otherwise, the device is powered when it is
|
||||
@ -623,16 +678,16 @@ STM32F4Discovery-specific Configuration Options
|
||||
to assign the timer (n) for used by the ADC or DAC, but then you also have to
|
||||
configure which ADC or DAC (m) it is assigned to.
|
||||
|
||||
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14
|
||||
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14
|
||||
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3
|
||||
CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14
|
||||
CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2
|
||||
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14
|
||||
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14
|
||||
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3
|
||||
CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14
|
||||
CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2
|
||||
|
||||
For each timer that is enabled for PWM usage, we need the following additional
|
||||
configuration settings:
|
||||
|
||||
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
|
||||
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
|
||||
|
||||
NOTE: The STM32 timers are each capable of generating different signals on
|
||||
each of the four channels with different duty cycles. That capability is
|
||||
@ -640,60 +695,60 @@ STM32F4Discovery-specific Configuration Options
|
||||
|
||||
JTAG Enable settings (by default only SW-DP is enabled):
|
||||
|
||||
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
|
||||
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
|
||||
but without JNTRST.
|
||||
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
|
||||
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
|
||||
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
|
||||
but without JNTRST.
|
||||
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
|
||||
|
||||
STM3240xxx specific device driver settings
|
||||
|
||||
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
|
||||
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
|
||||
m (m=4,5) for the console and ttys0 (default is the USART1).
|
||||
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
|
||||
This specific the size of the receive buffer
|
||||
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
|
||||
being sent. This specific the size of the transmit buffer
|
||||
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
|
||||
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
|
||||
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
|
||||
CONFIG_U[S]ARTn_2STOP - Two stop bits
|
||||
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
|
||||
This specific the size of the receive buffer
|
||||
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
|
||||
being sent. This specific the size of the transmit buffer
|
||||
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
|
||||
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
|
||||
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
|
||||
CONFIG_U[S]ARTn_2STOP - Two stop bits
|
||||
|
||||
STM3240xxx CAN Configuration
|
||||
|
||||
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
|
||||
CONFIG_STM32_CAN2 must also be defined)
|
||||
CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
|
||||
Standard 11-bit IDs.
|
||||
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
|
||||
Default: 8
|
||||
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
|
||||
Default: 4
|
||||
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
|
||||
mode for testing. The STM32 CAN driver does support loopback mode.
|
||||
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined.
|
||||
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined.
|
||||
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
|
||||
CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
|
||||
CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
|
||||
dump of all CAN registers.
|
||||
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
|
||||
CONFIG_STM32_CAN2 must also be defined)
|
||||
CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
|
||||
Standard 11-bit IDs.
|
||||
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
|
||||
Default: 8
|
||||
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
|
||||
Default: 4
|
||||
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
|
||||
mode for testing. The STM32 CAN driver does support loopback mode.
|
||||
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined.
|
||||
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined.
|
||||
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
|
||||
CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
|
||||
CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
|
||||
dump of all CAN registers.
|
||||
|
||||
STM3240xxx SPI Configuration
|
||||
|
||||
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
|
||||
support. Non-interrupt-driven, poll-waiting is recommended if the
|
||||
interrupt rate would be to high in the interrupt driven case.
|
||||
CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance.
|
||||
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
|
||||
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
|
||||
support. Non-interrupt-driven, poll-waiting is recommended if the
|
||||
interrupt rate would be to high in the interrupt driven case.
|
||||
CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance.
|
||||
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
|
||||
|
||||
STM3240xxx DMA Configuration
|
||||
|
||||
CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO
|
||||
and CONFIG_STM32_DMA2.
|
||||
CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128
|
||||
CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
|
||||
Default: Medium
|
||||
CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default:
|
||||
4-bit transfer mode.
|
||||
CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO
|
||||
and CONFIG_STM32_DMA2.
|
||||
CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128
|
||||
CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
|
||||
Default: Medium
|
||||
CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default:
|
||||
4-bit transfer mode.
|
||||
|
||||
Configurations
|
||||
==============
|
||||
@ -701,10 +756,10 @@ Configurations
|
||||
Each STM32F4Discovery configuration is maintained in a sudirectory and
|
||||
can be selected as follow:
|
||||
|
||||
cd tools
|
||||
./configure.sh STM32F4Discovery/<subdir>
|
||||
cd -
|
||||
. ./setenv.sh
|
||||
cd tools
|
||||
./configure.sh STM32F4Discovery/<subdir>
|
||||
cd -
|
||||
. ./setenv.sh
|
||||
|
||||
Where <subdir> is one of the following:
|
||||
|
||||
|
||||
@ -59,9 +59,11 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++
|
||||
|
||||
# These are the Cygwin paths to the locations where I installed the Atollic
|
||||
# toolchain under windows. You will also have to edit this if you install
|
||||
# the CodeSourcery toolchain in any other location
|
||||
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
|
||||
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
|
||||
# the Atollic toolchain in any other location. /usr/bin is added before
|
||||
# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
|
||||
# at those locations as well.
|
||||
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
|
||||
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
|
||||
|
||||
# This the Cygwin path to the location where I build the buildroot
|
||||
# toolchain.
|
||||
|
||||
@ -59,9 +59,11 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++
|
||||
|
||||
# These are the Cygwin paths to the locations where I installed the Atollic
|
||||
# toolchain under windows. You will also have to edit this if you install
|
||||
# the CodeSourcery toolchain in any other location
|
||||
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
|
||||
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
|
||||
# the Atollic toolchain in any other location. /usr/bin is added before
|
||||
# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
|
||||
# at those locations as well.
|
||||
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
|
||||
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
|
||||
|
||||
# This the Cygwin path to the location where I build the buildroot
|
||||
# toolchain.
|
||||
|
||||
@ -184,7 +184,7 @@ void uip_tcpinput(struct uip_driver_s *dev)
|
||||
conn->crefs = 1;
|
||||
if (uip_accept(dev, conn, tmp16) != OK)
|
||||
{
|
||||
/* No, then we have to give the connection back */
|
||||
/* No, then we have to give the connection back and drop the packet */
|
||||
|
||||
conn->crefs = 0;
|
||||
uip_tcpfree(conn);
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user