sergiotarxz/nuttx
sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

AVR: Rename ATMEGA_PC_SIZE to AVR_PC_SIZE since it must be used in common AVR logic. Add definitions for other AVR architectures as necessary for compilation

Browse Source
This commit is contained in:
Gregory Nutt 2016-01-07 08:14:09 -06:00
parent 951c40215a
commit dfe3240973
5 changed files with 87 additions and 85 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/avr/include/at90usb/irq.h
View File

@ -94,6 +94,7 @@
#define AT90USB_IRQ_SPMRDY 36 /* 0x004a Store Program Memory Ready */
#define NR_IRQS 37
#define AVR_PC_SIZE 16
#define XCPTCONTEXT_REGS 37 /* Size of the register state save array (in bytes) */
/****************************************************************************

154
arch/avr/include/atmega/irq.h
View File

@ -57,85 +57,85 @@
#if defined(CONFIG_ARCH_CHIP_ATMEGA128)
# define ATMEGA_IRQ_INT0 0 /* 0x0002 External Interrupt Request 0 */
# define ATMEGA_IRQ_INT1 1 /* 0x0004 External Interrupt Request 1 */
# define ATMEGA_IRQ_INT2 2 /* 0x0006 External Interrupt Request 2 */
# define ATMEGA_IRQ_INT3 3 /* 0x0008 External Interrupt Request 3 */
# define ATMEGA_IRQ_INT4 4 /* 0x000a External Interrupt Request 4 */
# define ATMEGA_IRQ_INT5 5 /* 0x000c External Interrupt Request 5 */
# define ATMEGA_IRQ_INT6 6 /* 0x000e External Interrupt Request 6 */
# define ATMEGA_IRQ_INT7 7 /* 0x0010 External Interrupt Request 7 */
# define ATMEGA_IRQ_T2COMP 8 /* 0x0012 TIMER2 COMP Timer/Counter2 Compare Match */
# define ATMEGA_IRQ_T2OVF 9 /* 0x0014 TIMER2 OVF Timer/Counter2 Overflow */
# define ATMEGA_IRQ_T1CAPT 10 /* 0x0016 TIMER1 CAPT Timer/Counter1 Capture Event */
# define ATMEGA_IRQ_T1COMPA 11 /* 0x0018 TIMER1 COMPA Timer/Counter1 Compare Match A */
# define ATMEGA_IRQ_T1COMPB 12 /* 0x001a TIMER1 COMPB Timer/Counter1 Compare Match B */
# define ATMEGA_IRQ_T1OVF 13 /* 0x001c TIMER1 OVF Timer/Counter1 Overflow */
# define ATMEGA_IRQ_T0COMP 14 /* 0x001e TIMER0 COMP Timer/Counter0 Compare Match */
# define ATMEGA_IRQ_T0OVF 15 /* 0x0020 TIMER0 OVF Timer/Counter0 Overflow */
# define ATMEGA_IRQ_SPI 16 /* 0x0022 STC SPI Serial Transfer Complete */
# define ATMEGA_IRQ_U0RX 17 /* 0x0024 USART0 Rx Complete */
# define ATMEGA_IRQ_U0DRE 18 /* 0x0026 USART0 Data Register Empty */
# define ATMEGA_IRQ_U0TX 19 /* 0x0028 USART0 Tx Complete */
# define ATMEGA_IRQ_ADC 20 /* 0x002a ADC Conversion Complete */
# define ATMEGA_IRQ_EE 21 /* 0x002c EEPROM Ready */
# define ATMEGA_IRQ_ANACOMP 22 /* 0x002e ANALOG COMP Analog Comparator */
# define ATMEGA_IRQ_T1COMPC 23 /* 0x0030 TIMER1 COMPC Timer/Countre1 Compare Match C */
# define ATMEGA_IRQ_T3CAPT 24 /* 0x0032 TIMER3 CAPT Timer/Counter3 Capture Event */
# define ATMEGA_IRQ_T3COMPA 25 /* 0x0034 TIMER3 COMPA Timer/Counter3 Compare Match A */
# define ATMEGA_IRQ_T3COMPB 26 /* 0x0036 TIMER3 COMPB Timer/Counter3 Compare Match B */
# define ATMEGA_IRQ_T3COMPC 27 /* 0x0038 TIMER3 COMPC Timer/Counter3 Compare Match C */
# define ATMEGA_IRQ_T3OVF 28 /* 0x003a TIMER3 OVF Timer/Counter3 Overflow */
# define ATMEGA_IRQ_U1RX 29 /* 0x003c USART1 Rx Complete */
# define ATMEGA_IRQ_U1DRE 30 /* 0x003e USART1 Data Register Empty */
# define ATMEGA_IRQ_U1TX 31 /* 0x0040 USART1 Tx Complete */
# define ATMEGA_IRQ_TWI 32 /* 0x0042 TWI Two-wire Serial Interface */
# define ATMEGA_IRQ_SPMRDY 33 /* 0x0044 Store Program Memory Ready */
# define ATMEGA_IRQ_INT0 0 /* 0x0002 External Interrupt Request 0 */
# define ATMEGA_IRQ_INT1 1 /* 0x0004 External Interrupt Request 1 */
# define ATMEGA_IRQ_INT2 2 /* 0x0006 External Interrupt Request 2 */
# define ATMEGA_IRQ_INT3 3 /* 0x0008 External Interrupt Request 3 */
# define ATMEGA_IRQ_INT4 4 /* 0x000a External Interrupt Request 4 */
# define ATMEGA_IRQ_INT5 5 /* 0x000c External Interrupt Request 5 */
# define ATMEGA_IRQ_INT6 6 /* 0x000e External Interrupt Request 6 */
# define ATMEGA_IRQ_INT7 7 /* 0x0010 External Interrupt Request 7 */
# define ATMEGA_IRQ_T2COMP 8 /* 0x0012 TIMER2 COMP Timer/Counter2 Compare Match */
# define ATMEGA_IRQ_T2OVF 9 /* 0x0014 TIMER2 OVF Timer/Counter2 Overflow */
# define ATMEGA_IRQ_T1CAPT 10 /* 0x0016 TIMER1 CAPT Timer/Counter1 Capture Event */
# define ATMEGA_IRQ_T1COMPA 11 /* 0x0018 TIMER1 COMPA Timer/Counter1 Compare Match A */
# define ATMEGA_IRQ_T1COMPB 12 /* 0x001a TIMER1 COMPB Timer/Counter1 Compare Match B */
# define ATMEGA_IRQ_T1OVF 13 /* 0x001c TIMER1 OVF Timer/Counter1 Overflow */
# define ATMEGA_IRQ_T0COMP 14 /* 0x001e TIMER0 COMP Timer/Counter0 Compare Match */
# define ATMEGA_IRQ_T0OVF 15 /* 0x0020 TIMER0 OVF Timer/Counter0 Overflow */
# define ATMEGA_IRQ_SPI 16 /* 0x0022 STC SPI Serial Transfer Complete */
# define ATMEGA_IRQ_U0RX 17 /* 0x0024 USART0 Rx Complete */
# define ATMEGA_IRQ_U0DRE 18 /* 0x0026 USART0 Data Register Empty */
# define ATMEGA_IRQ_U0TX 19 /* 0x0028 USART0 Tx Complete */
# define ATMEGA_IRQ_ADC 20 /* 0x002a ADC Conversion Complete */
# define ATMEGA_IRQ_EE 21 /* 0x002c EEPROM Ready */
# define ATMEGA_IRQ_ANACOMP 22 /* 0x002e ANALOG COMP Analog Comparator */
# define ATMEGA_IRQ_T1COMPC 23 /* 0x0030 TIMER1 COMPC Timer/Countre1 Compare Match C */
# define ATMEGA_IRQ_T3CAPT 24 /* 0x0032 TIMER3 CAPT Timer/Counter3 Capture Event */
# define ATMEGA_IRQ_T3COMPA 25 /* 0x0034 TIMER3 COMPA Timer/Counter3 Compare Match A */
# define ATMEGA_IRQ_T3COMPB 26 /* 0x0036 TIMER3 COMPB Timer/Counter3 Compare Match B */
# define ATMEGA_IRQ_T3COMPC 27 /* 0x0038 TIMER3 COMPC Timer/Counter3 Compare Match C */
# define ATMEGA_IRQ_T3OVF 28 /* 0x003a TIMER3 OVF Timer/Counter3 Overflow */
# define ATMEGA_IRQ_U1RX 29 /* 0x003c USART1 Rx Complete */
# define ATMEGA_IRQ_U1DRE 30 /* 0x003e USART1 Data Register Empty */
# define ATMEGA_IRQ_U1TX 31 /* 0x0040 USART1 Tx Complete */
# define ATMEGA_IRQ_TWI 32 /* 0x0042 TWI Two-wire Serial Interface */
# define ATMEGA_IRQ_SPMRDY 33 /* 0x0044 Store Program Memory Ready */
# define NR_IRQS 34
# define ATMEGA_PC_SIZE 16
# define XCPTCONTEXT_REGS 37 /* Size of the register state save array (in bytes) */
# define NR_IRQS 34
# define AVR_PC_SIZE 16
# define XCPTCONTEXT_REGS 37 /* Size of the register state save array (in bytes) */
#elif defined(CONFIG_ARCH_CHIP_ATMEGA1284P)
# define ATMEGA_IRQ_INT0 0 /* 0x0002 External Interrupt Request 0 */
# define ATMEGA_IRQ_INT1 1 /* 0x0004 External Interrupt Request 1 */
# define ATMEGA_IRQ_INT2 2 /* 0x0006 External Interrupt Request 2 */
# define ATMEGA_IRQ_PCINT0 3 /* 0x0008 Pin Change Interrupt Request 0 */
# define ATMEGA_IRQ_PCINT1 4 /* 0x000a Pin Change Interrupt Request 1 */
# define ATMEGA_IRQ_PCINT2 5 /* 0x000c Pin Change Interrupt Request 2 */
# define ATMEGA_IRQ_PCINT3 6 /* 0x000e Pin Change Interrupt Request 3 */
# define ATMEGA_IRQ_WDT 7 /* 0x0010 Watchdog Time-Out Interrupt */
# define ATMEGA_IRQ_T2COMPA 8 /* 0x0012 TIMER2 COMPA Timer/Counter2 Compare Match */
# define ATMEGA_IRQ_T2COMPB 9 /* 0x0014 TIMER2 COMPB Timer/Counter2 Compare Match */
# define ATMEGA_IRQ_T2OVF 10 /* 0x0016 TIMER2 OVF Timer/Counter2 Overflow */
# define ATMEGA_IRQ_T1CAPT 11 /* 0x0018 TIMER1 CAPT Timer/Counter1 Capture Event */
# define ATMEGA_IRQ_T1COMPA 12 /* 0x001a TIMER1 COMPA Timer/Counter1 Compare Match A */
# define ATMEGA_IRQ_T1COMPB 13 /* 0x001c TIMER1 COMPB Timer/Counter1 Compare Match B */
# define ATMEGA_IRQ_T1OVF 14 /* 0x001e TIMER1 OVF Timer/Counter1 Overflow */
# define ATMEGA_IRQ_T0COMPA 15 /* 0x0020 TIMER0 COMP Timer/Counter0 Compare Match */
# define ATMEGA_IRQ_T0COMPB 16 /* 0x0022 TIMER0 COMP Timer/Counter0 Compare Match */
# define ATMEGA_IRQ_T0OVF 17 /* 0x0024 TIMER0 OVF Timer/Counter0 Overflow */
# define ATMEGA_IRQ_SPI 18 /* 0x0026 STC SPI Serial Transfer Complete */
# define ATMEGA_IRQ_U0RX 19 /* 0x0028 USART0 Rx Complete */
# define ATMEGA_IRQ_U0DRE 20 /* 0x002a USART0 Data Register Empty */
# define ATMEGA_IRQ_U0TX 21 /* 0x002c USART0 Tx Complete */
# define ATMEGA_IRQ_ANACOMP 22 /* 0x002e ANALOG COMP Analog Comparator */
# define ATMEGA_IRQ_ADC 23 /* 0x0030 ADC Conversion Complete */
# define ATMEGA_IRQ_EE 24 /* 0x0032 EEPROM Ready */
# define ATMEGA_IRQ_TWI 25 /* 0x0034 TWI Two-wire Serial Interface */
# define ATMEGA_IRQ_SPMRDY 26 /* 0x0036 Store Program Memory Ready */
# define ATMEGA_IRQ_U1RX 27 /* 0x0038 USART1 Rx Complete */
# define ATMEGA_IRQ_U1DRE 28 /* 0x003a USART1 Data Register Empty */
# define ATMEGA_IRQ_U1TX 29 /* 0x003c USART1 Tx Complete */
# define ATMEGA_IRQ_T3CAPT 30 /* 0x003e TIMER3 CAPT Timer/Counter3 Capture Event */
# define ATMEGA_IRQ_T3COMPA 31 /* 0x0040 TIMER3 COMPA Timer/Counter3 Compare Match A */
# define ATMEGA_IRQ_T3COMPB 32 /* 0x0042 TIMER3 COMPB Timer/Counter3 Compare Match B */
# define ATMEGA_IRQ_T3OVF 33 /* 0x0044 TIMER3 OVF Timer/Counter3 Overflow */
# define ATMEGA_IRQ_INT0 0 /* 0x0002 External Interrupt Request 0 */
# define ATMEGA_IRQ_INT1 1 /* 0x0004 External Interrupt Request 1 */
# define ATMEGA_IRQ_INT2 2 /* 0x0006 External Interrupt Request 2 */
# define ATMEGA_IRQ_PCINT0 3 /* 0x0008 Pin Change Interrupt Request 0 */
# define ATMEGA_IRQ_PCINT1 4 /* 0x000a Pin Change Interrupt Request 1 */
# define ATMEGA_IRQ_PCINT2 5 /* 0x000c Pin Change Interrupt Request 2 */
# define ATMEGA_IRQ_PCINT3 6 /* 0x000e Pin Change Interrupt Request 3 */
# define ATMEGA_IRQ_WDT 7 /* 0x0010 Watchdog Time-Out Interrupt */
# define ATMEGA_IRQ_T2COMPA 8 /* 0x0012 TIMER2 COMPA Timer/Counter2 Compare Match */
# define ATMEGA_IRQ_T2COMPB 9 /* 0x0014 TIMER2 COMPB Timer/Counter2 Compare Match */
# define ATMEGA_IRQ_T2OVF 10 /* 0x0016 TIMER2 OVF Timer/Counter2 Overflow */
# define ATMEGA_IRQ_T1CAPT 11 /* 0x0018 TIMER1 CAPT Timer/Counter1 Capture Event */
# define ATMEGA_IRQ_T1COMPA 12 /* 0x001a TIMER1 COMPA Timer/Counter1 Compare Match A */
# define ATMEGA_IRQ_T1COMPB 13 /* 0x001c TIMER1 COMPB Timer/Counter1 Compare Match B */
# define ATMEGA_IRQ_T1OVF 14 /* 0x001e TIMER1 OVF Timer/Counter1 Overflow */
# define ATMEGA_IRQ_T0COMPA 15 /* 0x0020 TIMER0 COMP Timer/Counter0 Compare Match */
# define ATMEGA_IRQ_T0COMPB 16 /* 0x0022 TIMER0 COMP Timer/Counter0 Compare Match */
# define ATMEGA_IRQ_T0OVF 17 /* 0x0024 TIMER0 OVF Timer/Counter0 Overflow */
# define ATMEGA_IRQ_SPI 18 /* 0x0026 STC SPI Serial Transfer Complete */
# define ATMEGA_IRQ_U0RX 19 /* 0x0028 USART0 Rx Complete */
# define ATMEGA_IRQ_U0DRE 20 /* 0x002a USART0 Data Register Empty */
# define ATMEGA_IRQ_U0TX 21 /* 0x002c USART0 Tx Complete */
# define ATMEGA_IRQ_ANACOMP 22 /* 0x002e ANALOG COMP Analog Comparator */
# define ATMEGA_IRQ_ADC 23 /* 0x0030 ADC Conversion Complete */
# define ATMEGA_IRQ_EE 24 /* 0x0032 EEPROM Ready */
# define ATMEGA_IRQ_TWI 25 /* 0x0034 TWI Two-wire Serial Interface */
# define ATMEGA_IRQ_SPMRDY 26 /* 0x0036 Store Program Memory Ready */
# define ATMEGA_IRQ_U1RX 27 /* 0x0038 USART1 Rx Complete */
# define ATMEGA_IRQ_U1DRE 28 /* 0x003a USART1 Data Register Empty */
# define ATMEGA_IRQ_U1TX 29 /* 0x003c USART1 Tx Complete */
# define ATMEGA_IRQ_T3CAPT 30 /* 0x003e TIMER3 CAPT Timer/Counter3 Capture Event */
# define ATMEGA_IRQ_T3COMPA 31 /* 0x0040 TIMER3 COMPA Timer/Counter3 Compare Match A */
# define ATMEGA_IRQ_T3COMPB 32 /* 0x0042 TIMER3 COMPB Timer/Counter3 Compare Match B */
# define ATMEGA_IRQ_T3OVF 33 /* 0x0044 TIMER3 OVF Timer/Counter3 Overflow */
# define NR_IRQS 34
# define ATMEGA_PC_SIZE 16
# define XCPTCONTEXT_REGS 37 /* Size of the register state save array (in bytes) */
# define NR_IRQS 34
# define AVR_PC_SIZE 16
# define XCPTCONTEXT_REGS 37 /* Size of the register state save array (in bytes) */
#elif defined(CONFIG_ARCH_CHIP_ATMEGA2560)
@ -167,7 +167,7 @@
# define ATMEGA_IRQ_USART0_UDRE 27 /* 0x0034 USART0 UDRE USART0 Data Register Empty */
# define ATMEGA_IRQ_USART0_TXC 28 /* 0x0036 USART0 TX USART0 Tx Complete */
# define ATMEGA_IRQ_ANA_COMP 29 /* 0x0038 ANALOG COMP Analog Comparator */
# define ATMEGA_IRQ_ADC 30 /* 0x003A ADC ADC Conversion Complete */
# define ATMEGA_IRQ_ADC 30 /* 0x003A ADC ADC Conversion Complete */
# define ATMEGA_IRQ_EE_RDY 31 /* 0x003C EE READY EEPROM Ready */
# define ATMEGA_IRQ_TIM3_CAPT 32 /* 0x003E TIMER3 CAPT Timer/Counter3 Capture Event */
# define ATMEGA_IRQ_TIM3_COMPA 33 /* 0x0040 TIMER3 COMPA Timer/Counter3 Compare Match A */
@ -177,7 +177,7 @@
# define ATMEGA_IRQ_USART1_RXC 37 /* 0x0048 USART1 RX USART1 Rx Complete */
# define ATMEGA_IRQ_USART1_UDRE 38 /* 0x004A USART1 UDRE USART1 Data Register Empty */
# define ATMEGA_IRQ_USART1_TXC 39 /* 0x004C USART1 TX USART1 Tx Complete */
# define ATMEGA_IRQ_TWI 40 /* 0x004E TWI 2-wire Serial Interface */
# define ATMEGA_IRQ_TWI 40 /* 0x004E TWI 2-wire Serial Interface */
# define ATMEGA_IRQ_SPM_RDY 41 /* 0x0050 SPM READY Store Program Memory Ready */
# define ATMEGA_IRQ_TIM4_CAPT 42 /* 0x0052 TIMER4 CAPT Timer/Counter4 Capture Event */
# define ATMEGA_IRQ_TIM4_COMPA 43 /* 0x0054 TIMER4 COMPA Timer/Counter4 Compare Match A */
@ -197,7 +197,7 @@
# define ATMEGA_IRQ_USART3_TXC 57 /* 0x0070 USART3 TX USART3 Tx Complete */
# define NR_IRQS 58
# define ATMEGA_PC_SIZE 24
# define AVR_PC_SIZE 24
# define XCPTCONTEXT_REGS 38 /* Size of the register state save array (in bytes) */
#else

4
arch/avr/include/avr/irq.h
View File

@ -34,7 +34,7 @@
****************************************************************************/
/* This file should never be included directed but, rather, only indirectly
* through nuttx/irq.h
* through nuttx/irq.h.
*/
#ifndef __ARCH_AVR_INCLUDE_AVR_IRQ_H
@ -93,7 +93,7 @@
#define REG_PC0 35 /* PC */
#define REG_PC1 36
#if ATMEGA_PC_SIZE > 16
#if AVR_PC_SIZE > 16
# define REG_PC2 37
#endif

1
arch/avr/include/xmega/xmegac_irq.h
View File

@ -86,6 +86,7 @@
#define XMEGA_IRQ_USB xx /* 0x00fa USB on port D Interrupt base */
#define NR_IRQS xx
#define AVR_PC_SIZE xx
/****************************************************************************
* Public Types

12
arch/avr/src/avr/excptmacros.h
View File

@ -335,9 +335,9 @@
/* Pop the return address from the stack (PC0 then PC1). R18:19 are Call-used */
#if ATMEGA_PC_SIZE > 16
#if AVR_PC_SIZE > 16
pop r20
#endif /* ATMEGA_PC_SIZE */
#endif /* AVR_PC_SIZE */
pop r19
pop r18
@ -402,9 +402,9 @@
/* Save the return address that we have saved in r18:19*/
#if ATMEGA_PC_SIZE > 16
#if AVR_PC_SIZE > 16
st x+, r20
#endif /* ATMEGA_PC_SIZE */
#endif /* AVR_PC_SIZE */
st x+, r19
st x+, r18
.endm
@ -435,7 +435,7 @@
*/
movw r28, r26 /* Get a pointer to the PC0/PC1 storage location */
#if ATMEGA_PC_SIZE <= 16
#if AVR_PC_SIZE <= 16
adiw r28, REG_PC0
#else
adiw r28, REG_PC2
@ -457,7 +457,7 @@
* --- <- SP
*/
#if ATMEGA_PC_SIZE <= 16
#if AVR_PC_SIZE <= 16
ld r25, y+ /* Load PC0 (r25) then PC1 (r24) */
ld r24, y+
push r24 /* Push PC0 and PC1 on the stack (PC1 then PC0) */