Tiva ADC: Should not have its own ADC debug. Should use the common Analog debug
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@ -204,20 +204,6 @@
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/* Debug ********************************************************************/
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/* CONFIG_DEBUG_ADC + CONFIG_DEBUG enables general ADC debug output. */
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#ifdef CONFIG_DEBUG_ADC
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# define adcdbg dbg
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# define adcvdbg vdbg
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# define adclldbg lldbg
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# define adcllvdbg lldbg
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#else
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# define adcdbg(x...)
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# define adcvdbg(x...)
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# define adclldbg(x...)
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# define adcllvdbg(x...)
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#endif
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#ifndef CONFIG_DEBUG
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# undef CONFIG_TIVA_ADC_REGDEBUG
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#endif
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@ -494,7 +480,7 @@ static void tiva_adc_reset(struct adc_dev_s *dev)
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{
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struct tiva_adc_s *priv = (struct tiva_adc_s *)dev->ad_priv;
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adcvdbg("Resetting...\n");
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avdbg("Resetting...\n");
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/* Only if ADCs are active do we run the reset routine: - disable ADC
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* interrupts - clear interrupt bits - disable all active sequences
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@ -533,7 +519,7 @@ static void tiva_adc_reset(struct adc_dev_s *dev)
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static int tiva_adc_setup(struct adc_dev_s *dev)
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{
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adcvdbg("Setup\n");
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avdbg("Setup\n");
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/* Only if ADCs are active do we run the reset routine: - enable ADC
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* interrupts - clear interrupt bits - enable all active sequences - register
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@ -569,7 +555,7 @@ static void tiva_adc_shutdown(struct adc_dev_s *dev)
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{
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struct tiva_adc_s *priv = (struct tiva_adc_s *)dev->ad_priv;
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adcvdbg("Shutdown\n");
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avdbg("Shutdown\n");
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/* Reset the ADC peripheral */
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@ -606,7 +592,7 @@ static void tiva_adc_rxint(struct adc_dev_s *dev, bool enable)
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{
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struct tiva_adc_s *priv = (struct tiva_adc_s *)dev->ad_priv;
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adcvdbg("rx enable=%d\n", enable);
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avdbg("rx enable=%d\n", enable);
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uint8_t s = 0;
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for (s = 0; s < SSE_PER_BASE; ++s)
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@ -642,7 +628,7 @@ static int tiva_adc_ioctl(struct adc_dev_s *dev, int cmd, unsigned long arg)
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uint32_t regval = 0;
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uint8_t sse = 0;
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adcvdbg("cmd=%d arg=%ld\n", cmd, arg);
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avdbg("cmd=%d arg=%ld\n", cmd, arg);
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switch (cmd)
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{
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@ -1463,7 +1449,7 @@ static void sse_step_cfg(struct tiva_adc_s *adc, uint8_t sse, uint8_t chn,
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struct adc_dev_s *tiva_adc_initialize(int adc_num)
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{
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adcvdbg("tiva_adc_initialize\n");
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avdbg("tiva_adc_initialize\n");
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/* Initialize the private ADC device data structure */
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@ -1589,8 +1575,8 @@ struct adc_dev_s *tiva_adc_initialize(int adc_num)
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if (adc_num > 1)
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{
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adcdbg("ERROR: Invalid ADV devno given, must be 0 or 1! ADC Devno: %d\n",
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adc_num);
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adbg("ERROR: Invalid ADV devno given, must be 0 or 1! ADC Devno: %d\n",
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adc_num);
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return NULL;
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}
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@ -1604,8 +1590,8 @@ struct adc_dev_s *tiva_adc_initialize(int adc_num)
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if (adc_state(adc, TIVA_ADC_ENABLE) < 0)
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{
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adcdbg("ERROR: failure to power ADC peripheral (devno=%d)\n",
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adc_num);
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adbg("ERROR: failure to power ADC peripheral (devno=%d)\n",
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adc_num);
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return NULL;
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}
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@ -1679,7 +1665,7 @@ struct adc_dev_s *tiva_adc_initialize(int adc_num)
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/* Return a pointer to the device structure */
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adcvdbg("Returning %x\n", adc->dev);
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avdbg("Returning %x\n", adc->dev);
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return adc->dev;
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}
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@ -1695,7 +1681,7 @@ void tiva_adc_lock(FAR struct tiva_adc_s *priv, int sse)
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{
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int ret;
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adcvdbg("Locking\n");
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avdbg("Locking\n");
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do
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{
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@ -1720,7 +1706,7 @@ void tiva_adc_lock(FAR struct tiva_adc_s *priv, int sse)
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void tiva_adc_unlock(FAR struct tiva_adc_s *priv, int sse)
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{
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adcvdbg("Unlocking\n");
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avdbg("Unlocking\n");
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sem_post(&priv->sse[sse]->exclsem);
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}
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@ -1847,7 +1833,7 @@ static void tiva_adc0_assign_interrupts(void)
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ret = irq_attach(sse00.irq, (xcpt_t)adc0_sse0_interrupt);
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if (ret < 0)
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{
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adcdbg("ERROR: Failed to attach IRQ %d: %d\n", sse00.irq, ret);
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adbg("ERROR: Failed to attach IRQ %d: %d\n", sse00.irq, ret);
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return;
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}
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up_enable_irq(sse00.irq);
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@ -1856,7 +1842,7 @@ static void tiva_adc0_assign_interrupts(void)
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ret = irq_attach(sse01.irq, (xcpt_t)adc0_sse1_interrupt);
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if (ret < 0)
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{
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adcdbg("ERROR: Failed to attach IRQ %d: %d\n", sse01.irq, ret);
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adbg("ERROR: Failed to attach IRQ %d: %d\n", sse01.irq, ret);
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return;
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}
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up_enable_irq(sse01.irq);
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@ -1865,7 +1851,7 @@ static void tiva_adc0_assign_interrupts(void)
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ret = irq_attach(sse02.irq, (xcpt_t)adc0_sse2_interrupt);
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if (ret < 0)
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{
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adcdbg("ERROR: Failed to attach IRQ %d: %d\n", sse02.irq, ret);
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adbg("ERROR: Failed to attach IRQ %d: %d\n", sse02.irq, ret);
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return;
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}
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up_enable_irq(sse02.irq);
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@ -1874,7 +1860,7 @@ static void tiva_adc0_assign_interrupts(void)
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ret = irq_attach(sse03.irq, (xcpt_t)adc0_sse3_interrupt);
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if (ret < 0)
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{
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adcdbg("ERROR: Failed to attach IRQ %d: %d\n", sse03.irq, ret);
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adbg("ERROR: Failed to attach IRQ %d: %d\n", sse03.irq, ret);
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return;
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}
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up_enable_irq(sse03.irq);
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@ -1890,7 +1876,7 @@ static void tiva_adc1_assign_interrupts(void)
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ret = irq_attach(sse10.irq, (xcpt_t)adc1_sse0_interrupt);
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if (ret < 0)
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{
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adcdbg("ERROR: Failed to attach IRQ %d: %d\n", sse10.irq, ret);
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adbg("ERROR: Failed to attach IRQ %d: %d\n", sse10.irq, ret);
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return;
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}
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up_enable_irq(sse10.irq);
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@ -1899,7 +1885,7 @@ static void tiva_adc1_assign_interrupts(void)
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ret = irq_attach(sse11.irq, (xcpt_t)adc1_sse1_interrupt);
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if (ret < 0)
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{
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adcdbg("ERROR: Failed to attach IRQ %d: %d\n", sse11.irq, ret);
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adbg("ERROR: Failed to attach IRQ %d: %d\n", sse11.irq, ret);
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return;
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}
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up_enable_irq(sse11.irq);
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@ -1908,7 +1894,7 @@ static void tiva_adc1_assign_interrupts(void)
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ret = irq_attach(sse12.irq, (xcpt_t)adc1_sse2_interrupt);
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if (ret < 0)
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{
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adcdbg("ERROR: Failed to attach IRQ %d: %d\n", sse12.irq, ret);
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adbg("ERROR: Failed to attach IRQ %d: %d\n", sse12.irq, ret);
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return;
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}
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up_enable_irq(sse12.irq);
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@ -1917,7 +1903,7 @@ static void tiva_adc1_assign_interrupts(void)
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ret = irq_attach(sse13.irq, (xcpt_t)adc1_sse3_interrupt);
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if (ret < 0)
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{
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adcdbg("ERROR: Failed to attach IRQ %d: %d\n", sse13.irq, ret);
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adbg("ERROR: Failed to attach IRQ %d: %d\n", sse13.irq, ret);
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return;
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}
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up_enable_irq(sse13.irq);
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@ -1957,7 +1943,7 @@ static void adc0_sse0_interrupt(int irq, void *context)
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ret = work_queue(HPWORK, &sse00.work, tiva_adc_read, &sse00, 0);
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if (ret != 0)
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{
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adcdbg("ERROR: Failed to queue work: %d\n", ret);
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adbg("ERROR: Failed to queue work: %d\n", ret);
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}
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}
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# endif
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@ -1975,8 +1961,8 @@ static void adc0_sse1_interrupt(int irq, void *context)
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ret = work_queue(HPWORK, &sse01.work, tiva_adc_read, &sse01, 0);
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if (ret != 0)
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{
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adcdbg("ERROR: Failed to queue work: %d ADC.SSE: %d.%d\n",
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ret, adc0.devno, sse01.num);
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adbg("ERROR: Failed to queue work: %d ADC.SSE: %d.%d\n",
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ret, adc0.devno, sse01.num);
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}
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}
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# endif
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@ -1994,8 +1980,8 @@ static void adc0_sse2_interrupt(int irq, void *context)
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ret = work_queue(HPWORK, &sse02.work, tiva_adc_read, &sse02, 0);
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if (ret != 0)
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{
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adcdbg("ERROR: Failed to queue work: %d ADC.SSE: %d.%d\n",
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ret, adc0.devno, sse02.num);
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adbg("ERROR: Failed to queue work: %d ADC.SSE: %d.%d\n",
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ret, adc0.devno, sse02.num);
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}
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}
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# endif
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@ -2013,8 +1999,8 @@ static void adc0_sse3_interrupt(int irq, void *context)
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ret = work_queue(HPWORK, &sse03.work, tiva_adc_read, &sse03, 0);
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if (ret != 0)
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{
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adcdbg("ERROR: Failed to queue work: %d ADC.SSE: %d.%d\n",
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ret, adc0.devno, sse03.num);
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adbg("ERROR: Failed to queue work: %d ADC.SSE: %d.%d\n",
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ret, adc0.devno, sse03.num);
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}
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}
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# endif
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@ -2035,8 +2021,8 @@ static void adc1_sse0_interrupt(int irq, void *context)
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ret = work_queue(HPWORK, &sse10.work, tiva_adc_read, &sse10, 0);
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if (ret != 0)
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{
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adcdbg("ERROR: Failed to queue work: %d ADC.SSE: %d.%d\n",
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ret, adc1.devno, sse10.num);
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adbg("ERROR: Failed to queue work: %d ADC.SSE: %d.%d\n",
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ret, adc1.devno, sse10.num);
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}
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}
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# endif
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@ -2054,8 +2040,8 @@ static void adc1_sse1_interrupt(int irq, void *context)
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ret = work_queue(HPWORK, &sse11.work, tiva_adc_read, &sse11, 0);
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if (ret != 0)
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{
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adcdbg("ERROR: Failed to queue work: %d ADC.SSE: %d.%d\n",
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ret, adc1.devno, sse11.num);
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adbg("ERROR: Failed to queue work: %d ADC.SSE: %d.%d\n",
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ret, adc1.devno, sse11.num);
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}
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}
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# endif
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@ -2073,8 +2059,8 @@ static void adc1_sse2_interrupt(int irq, void *context)
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ret = work_queue(HPWORK, &sse12.work, tiva_adc_read, &sse12, 0);
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if (ret != 0)
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{
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adcdbg("ERROR: Failed to queue work: %d ADC.SSE: %d.%d\n",
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ret, adc1.devno, sse12.num);
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adbg("ERROR: Failed to queue work: %d ADC.SSE: %d.%d\n",
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ret, adc1.devno, sse12.num);
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}
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}
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# endif
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@ -2092,8 +2078,8 @@ static void adc1_sse3_interrupt(int irq, void *context)
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ret = work_queue(HPWORK, &sse13.work, tiva_adc_read, &sse13, 0);
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if (ret != 0)
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{
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adcdbg("ERROR: Failed to queue work: %d ADC.SSE: %d.%d\n",
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ret, adc1.devno, sse13.num);
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adbg("ERROR: Failed to queue work: %d ADC.SSE: %d.%d\n",
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ret, adc1.devno, sse13.num);
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}
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}
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# endif
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