arch/intel64: fix IRQ conflict with GOLDFISH
Also move MSI IRQ definition to place where other IRQ definitions are. Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
This commit is contained in:
parent
4fd92edee7
commit
e0d9cc432c
@ -346,10 +346,18 @@
|
||||
#define HPET0_IRQ IRQ2
|
||||
#define HPET1_IRQ IRQ8
|
||||
|
||||
/* Use IRQ15 IRQ16 for SMP */
|
||||
/* NuttX custom interrupts configuration starts from here.
|
||||
* IRQ16-IRQ23 are reserved for GOLDFISH so we start from IRQ24.
|
||||
*/
|
||||
|
||||
#define SMP_IPI_IRQ IRQ15
|
||||
#define SMP_IPI_ASYNC_IRQ IRQ16
|
||||
/* Use IRQ24 IRQ25 for SMP */
|
||||
|
||||
#define SMP_IPI_IRQ IRQ24
|
||||
#define SMP_IPI_ASYNC_IRQ IRQ25
|
||||
|
||||
/* Use IRQ32 and above for MSI */
|
||||
|
||||
#define IRQ_MSI_START IRQ32
|
||||
|
||||
/* Common register save structure created by up_saveusercontext() and by
|
||||
* ISR/IRQ interrupt processing.
|
||||
|
@ -48,7 +48,6 @@
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#define IRQ_MSI_START IRQ32
|
||||
#define X86_64_MAR_DEST 0xfee00000
|
||||
#define X86_64_MDR_TYPE 0x4000
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user