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Several fixes for LPC1788 GPIO

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5813 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2013-04-03 19:35:21 +00:00
parent e1e8f4debe
commit e1daee1930
7 changed files with 208 additions and 173 deletions
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9
arch/arm/include/lpc17xx/lpc178x_irq.h
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@ -172,7 +172,6 @@
/* Set 1: 16 interrupts p0.0-p0.15 */ /* Set 1: 16 interrupts p0.0-p0.15 */
//~ # define LPC17_VALID_GPIOINT0L (0x00000ffful)
# define LPC17_VALID_SHIFT0L (0) # define LPC17_VALID_SHIFT0L (0)
# define LPC17_VALID_FIRST0L (LPC17_IRQ_EXTINT+LPC17_IRQ_NEXTINT) # define LPC17_VALID_FIRST0L (LPC17_IRQ_EXTINT+LPC17_IRQ_NEXTINT)
@ -196,8 +195,7 @@
/* Set 2: 16 interrupts p0.16-p0.31 */ /* Set 2: 16 interrupts p0.16-p0.31 */
//~ # define LPC17_VALID_GPIOINT0H (0x7fff8000ull) # define LPC17_VALID_SHIFT0H (16)
# define LPC17_VALID_SHIFT0H (15)
# define LPC17_VALID_FIRST0H (LPC17_VALID_FIRST0L+LPC17_VALID_NIRQS0L) # define LPC17_VALID_FIRST0H (LPC17_VALID_FIRST0L+LPC17_VALID_NIRQS0L)
# define LPC17_IRQ_P0p16 (LPC17_VALID_FIRST0H+0) # define LPC17_IRQ_P0p16 (LPC17_VALID_FIRST0H+0)
@ -220,7 +218,6 @@
/* Set 3: 16 interrupts p2.0-p2.15 */ /* Set 3: 16 interrupts p2.0-p2.15 */
//~ # define LPC17_VALID_GPIOINT2 (0x00003ffful)
# define LPC17_VALID_SHIFT2L (0) # define LPC17_VALID_SHIFT2L (0)
# define LPC17_VALID_FIRST2L (LPC17_VALID_FIRST0H+LPC17_VALID_NIRQS0H) # define LPC17_VALID_FIRST2L (LPC17_VALID_FIRST0H+LPC17_VALID_NIRQS0H)
@ -242,9 +239,9 @@
# define LPC17_IRQ_P2p15 (LPC17_VALID_FIRST2L+15) # define LPC17_IRQ_P2p15 (LPC17_VALID_FIRST2L+15)
# define LPC17_VALID_NIRQS2L (16) # define LPC17_VALID_NIRQS2L (16)
/* Set 3: 16 interrupts p2.16 - p2.31 */ /* Set 4: 16 interrupts p2.16 - p2.31 */
# define LPC17_VALID_SHIFT2H (15) # define LPC17_VALID_SHIFT2H (16)
# define LPC17_VALID_FIRST2H (LPC17_VALID_FIRST2L+LPC17_VALID_NIRQS2L) # define LPC17_VALID_FIRST2H (LPC17_VALID_FIRST2L+LPC17_VALID_NIRQS2L)
# define LPC17_IRQ_P2p16 (LPC17_VALID_FIRST2H+0) # define LPC17_IRQ_P2p16 (LPC17_VALID_FIRST2H+0)

2
arch/arm/src/armv6-m/Toolchain.defs
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@ -130,7 +130,7 @@ ifeq ($(CONFIG_ARMV6M_TOOLCHAIN),CODESOURCERYL)
CROSSDEV ?= arm-none-eabi- CROSSDEV ?= arm-none-eabi-
ARCROSSDEV ?= arm-none-eabi- ARCROSSDEV ?= arm-none-eabi-
ARCHCPUFLAGS = -mcpu=cortex-m0 -mthumb -march=armv6-m -mfloat-abi=soft ARCHCPUFLAGS = -mcpu=cortex-m0 -mthumb -march=armv6-m -mfloat-abi=soft
MAXOPTIMIZATION = -O2 MAXOPTIMIZATION = -Os
endif endif
# CodeSourcery under Windows # CodeSourcery under Windows

6
arch/arm/src/lpc17xx/lpc17_gpio.c
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@ -549,7 +549,7 @@ static inline int lpc17_configinput(lpc17_pinset_t cfgset, unsigned int port, un
* into the correct position in the register value. * into the correct position in the register value.
*/ */
regval |= (((cfgset & GPIO_PUMODE_MASK) >> GPIO_PINMODE_SHIFT) << IOCON_MODE_SHIFT); regval |= (((cfgset & GPIO_PUMODE_MASK) >> GPIO_PUMODE_SHIFT) << IOCON_MODE_SHIFT);
/* Select input polarity */ /* Select input polarity */
@ -667,7 +667,7 @@ static inline int lpc17_configoutput(lpc17_pinset_t cfgset, unsigned int port,
* into the correct position in the register value. * into the correct position in the register value.
*/ */
regval |= (((cfgset & GPIO_PUMODE_MASK) >> GPIO_PINMODE_SHIFT) << IOCON_MODE_SHIFT); regval |= (((cfgset & GPIO_PUMODE_MASK) >> GPIO_PUMODE_SHIFT) << IOCON_MODE_SHIFT);
/* Set IOCON register */ /* Set IOCON register */
@ -735,7 +735,7 @@ static int lpc17_configalternate(lpc17_pinset_t cfgset, unsigned int port,
* into the correct position in the register value. * into the correct position in the register value.
*/ */
regval |= (((cfgset & GPIO_PUMODE_MASK) >> GPIO_PINMODE_SHIFT) << IOCON_MODE_SHIFT); regval |= (((cfgset & GPIO_PUMODE_MASK) >> GPIO_PUMODE_SHIFT) << IOCON_MODE_SHIFT);
/* Select open drain output */ /* Select open drain output */

245
arch/arm/src/lpc17xx/lpc17_gpio.h
View File

@ -137,38 +137,38 @@
#define GPIO_PIN_SHIFT 0 /* Bits 0-4: GPIO number: 0-31 */ #define GPIO_PIN_SHIFT 0 /* Bits 0-4: GPIO number: 0-31 */
#define GPIO_PIN_MASK (31 << GPIO_PIN_SHIFT) #define GPIO_PIN_MASK (31 << GPIO_PIN_SHIFT)
#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT) # define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT) # define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT) # define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT) # define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT) # define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT) # define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT) # define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT) # define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT) # define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT) # define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT) # define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT) # define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT) # define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT) # define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT) # define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT) # define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
#define GPIO_PIN16 (16 << GPIO_PIN_SHIFT) # define GPIO_PIN16 (16 << GPIO_PIN_SHIFT)
#define GPIO_PIN17 (17 << GPIO_PIN_SHIFT) # define GPIO_PIN17 (17 << GPIO_PIN_SHIFT)
#define GPIO_PIN18 (18 << GPIO_PIN_SHIFT) # define GPIO_PIN18 (18 << GPIO_PIN_SHIFT)
#define GPIO_PIN19 (19 << GPIO_PIN_SHIFT) # define GPIO_PIN19 (19 << GPIO_PIN_SHIFT)
#define GPIO_PIN20 (20 << GPIO_PIN_SHIFT) # define GPIO_PIN20 (20 << GPIO_PIN_SHIFT)
#define GPIO_PIN21 (21 << GPIO_PIN_SHIFT) # define GPIO_PIN21 (21 << GPIO_PIN_SHIFT)
#define GPIO_PIN22 (22 << GPIO_PIN_SHIFT) # define GPIO_PIN22 (22 << GPIO_PIN_SHIFT)
#define GPIO_PIN23 (23 << GPIO_PIN_SHIFT) # define GPIO_PIN23 (23 << GPIO_PIN_SHIFT)
#define GPIO_PIN24 (24 << GPIO_PIN_SHIFT) # define GPIO_PIN24 (24 << GPIO_PIN_SHIFT)
#define GPIO_PIN25 (25 << GPIO_PIN_SHIFT) # define GPIO_PIN25 (25 << GPIO_PIN_SHIFT)
#define GPIO_PIN26 (26 << GPIO_PIN_SHIFT) # define GPIO_PIN26 (26 << GPIO_PIN_SHIFT)
#define GPIO_PIN27 (27 << GPIO_PIN_SHIFT) # define GPIO_PIN27 (27 << GPIO_PIN_SHIFT)
#define GPIO_PIN28 (28 << GPIO_PIN_SHIFT) # define GPIO_PIN28 (28 << GPIO_PIN_SHIFT)
#define GPIO_PIN29 (29 << GPIO_PIN_SHIFT) # define GPIO_PIN29 (29 << GPIO_PIN_SHIFT)
#define GPIO_PIN30 (30 << GPIO_PIN_SHIFT) # define GPIO_PIN30 (30 << GPIO_PIN_SHIFT)
#define GPIO_PIN31 (31 << GPIO_PIN_SHIFT) # define GPIO_PIN31 (31 << GPIO_PIN_SHIFT)
#elif defined(LPC178x) #elif defined(LPC178x)
@ -193,121 +193,120 @@
#define GPIO_IOCON_TYPE_I_MASK (0x00000347) /* I2C/USB P0:27-28, P5:2-3 */ #define GPIO_IOCON_TYPE_I_MASK (0x00000347) /* I2C/USB P0:27-28, P5:2-3 */
#define GPIO_IOCON_TYPE_W_MASK (0x000007ff) /* I2S P0:7-9 */ #define GPIO_IOCON_TYPE_W_MASK (0x000007ff) /* I2S P0:7-9 */
#define GPIO_IOCON_MASK (0x00ff0000) #define GPIO_IOCON_MASK (0x00ff0000)
# define GPIO_HYSTERESIS (1 << 16) /* Bit 16: HYSTERESIS: 0-Disable, 1-Enabled */ # define GPIO_HYSTERESIS (1 << 16) /* Bit 16: HYSTERESIS: 0-Disable, 1-Enabled */
# define GPIO_INVERT (1 << 17) /* Bit 17: Input: 0-Not Inverted, 1-Inverted */ # define GPIO_INVERT (1 << 17) /* Bit 17: Input: 0-Not Inverted, 1-Inverted */
# define GPIO_SLEW (1 << 18) /* Bit 18: Rate Control: 0-Standard mode, 1-Fast mode */ # define GPIO_SLEW (1 << 18) /* Bit 18: Rate Control: 0-Standard mode, 1-Fast mode */
# define GPIO_ADMODE (1 << 19) /* Bit 19: A/D Modes: 0-Analog, 1-Digital */ # define GPIO_ADMODE (1 << 19) /* Bit 19: A/D Modes: 0-Analog, 1-Digital */
# define GPIO_FILTER (1 << 20) /* Bit 20: Filter: 0-Off, 1-ON */ # define GPIO_FILTER (1 << 20) /* Bit 20: Filter: 0-Off, 1-ON */
# define GPIO_DACEN (1 << 21) /* Bit 21: DAC: 0-Disabled, 1-Enabled, P0:26 only */ # define GPIO_DACEN (1 << 21) /* Bit 21: DAC: 0-Disabled, 1-Enabled, P0:26 only */
# define GPIO_I2CHS (1 << 22) /* Bit 22: Filter and Rate Control: 0-Enabled, 1-Disabled */ # define GPIO_I2CHS (1 << 22) /* Bit 22: Filter and Rate Control: 0-Enabled, 1-Disabled */
# define GPIO_HIDRIVE (1 << 23) /* Bit 23: Current Sink: 0-4mA, 1-20mA P5:2 and P5:3 only,*/ # define GPIO_HIDRIVE (1 << 23) /* Bit 23: Current Sink: 0-4mA, 1-20mA P5:2 and P5:3 only,*/
/* Pin Function bits: FFFF /* Pin Function bits: FFFF
* Only meaningful when the GPIO function is GPIO_PIN * Only meaningful when the GPIO function is GPIO_PIN
*/ */
#define GPIO_FUNC_SHIFT (12) /* Bits 12-15: GPIO mode */ #define GPIO_FUNC_SHIFT (12) /* Bits 12-15: GPIO mode */
#define GPIO_FUNC_MASK (15 << GPIO_FUNC_SHIFT) #define GPIO_FUNC_MASK (15 << GPIO_FUNC_SHIFT)
# define GPIO_INPUT (0 << GPIO_FUNC_SHIFT) /* 0000 GPIO input pin */ # define GPIO_INPUT (0 << GPIO_FUNC_SHIFT) /* 0000 GPIO input pin */
# define GPIO_INTFE (1 << GPIO_FUNC_SHIFT) /* 0001 GPIO interrupt falling edge */ # define GPIO_INTFE (1 << GPIO_FUNC_SHIFT) /* 0001 GPIO interrupt falling edge */
# define GPIO_INTRE (2 << GPIO_FUNC_SHIFT) /* 0010 GPIO interrupt rising edge */ # define GPIO_INTRE (2 << GPIO_FUNC_SHIFT) /* 0010 GPIO interrupt rising edge */
# define GPIO_INTBOTH (3 << GPIO_FUNC_SHIFT) /* 0011 GPIO interrupt both edges */ # define GPIO_INTBOTH (3 << GPIO_FUNC_SHIFT) /* 0011 GPIO interrupt both edges */
# define GPIO_OUTPUT (4 << GPIO_FUNC_SHIFT) /* 0100 GPIO outpout pin */ # define GPIO_OUTPUT (4 << GPIO_FUNC_SHIFT) /* 0100 GPIO outpout pin */
# define GPIO_ALT1 (5 << GPIO_FUNC_SHIFT) /* 0101 Alternate function 1 */ # define GPIO_ALT1 (5 << GPIO_FUNC_SHIFT) /* 0101 Alternate function 1 */
# define GPIO_ALT2 (6 << GPIO_FUNC_SHIFT) /* 0110 Alternate function 2 */ # define GPIO_ALT2 (6 << GPIO_FUNC_SHIFT) /* 0110 Alternate function 2 */
# define GPIO_ALT3 (7 << GPIO_FUNC_SHIFT) /* 0111 Alternate function 3 */ # define GPIO_ALT3 (7 << GPIO_FUNC_SHIFT) /* 0111 Alternate function 3 */
# define GPIO_ALT4 (8 << GPIO_FUNC_SHIFT) /* 1000 Alternate function 4 */ # define GPIO_ALT4 (8 << GPIO_FUNC_SHIFT) /* 1000 Alternate function 4 */
# define GPIO_ALT5 (9 << GPIO_FUNC_SHIFT) /* 1001 Alternate function 5 */ # define GPIO_ALT5 (9 << GPIO_FUNC_SHIFT) /* 1001 Alternate function 5 */
# define GPIO_ALT6 (10 << GPIO_FUNC_SHIFT) /* 1010 Alternate function 6 */ # define GPIO_ALT6 (10 << GPIO_FUNC_SHIFT) /* 1010 Alternate function 6 */
# define GPIO_ALT7 (11 << GPIO_FUNC_SHIFT) /* 1011 Alternate function 7 */ # define GPIO_ALT7 (11 << GPIO_FUNC_SHIFT) /* 1011 Alternate function 7 */
#define GPIO_EDGE_SHIFT (13) /* Bits 13-14: Interrupt edge bits */ #define GPIO_EDGE_SHIFT (13) /* Bits 13-14: Interrupt edge bits */
#define GPIO_EDGE_MASK (3 << GPIO_EDGE_SHIFT) #define GPIO_EDGE_MASK (3 << GPIO_EDGE_SHIFT)
#define GPIO_INOUT_MASK GPIO_OUTPUT #define GPIO_INOUT_MASK GPIO_OUTPUT
#define GPIO_FE_MASK GPIO_INTFE #define GPIO_FE_MASK GPIO_INTFE
#define GPIO_RE_MASK GPIO_INTRE #define GPIO_RE_MASK GPIO_INTRE
#define GPIO_ISGPIO(ps) ((uint16_t(ps) & GPIO_FUNC_MASK) <= GPIO_OUTPUT) #define GPIO_ISGPIO(ps) ((uint16_t(ps) & GPIO_FUNC_MASK) <= GPIO_OUTPUT)
#define GPIO_ISALT(ps) ((uint16_t(ps) & GPIO_FUNC_MASK) > GPIO_OUTPUT) #define GPIO_ISALT(ps) ((uint16_t(ps) & GPIO_FUNC_MASK) > GPIO_OUTPUT)
#define GPIO_ISINPUT(ps) (((ps) & GPIO_FUNC_MASK) == GPIO_INPUT) #define GPIO_ISINPUT(ps) (((ps) & GPIO_FUNC_MASK) == GPIO_INPUT)
#define GPIO_ISOUTPUT(ps) (((ps) & GPIO_FUNC_MASK) == GPIO_OUTPUT) #define GPIO_ISOUTPUT(ps) (((ps) & GPIO_FUNC_MASK) == GPIO_OUTPUT)
#define GPIO_ISINORINT(ps) (((ps) & GPIO_INOUT_MASK) == 0) #define GPIO_ISINORINT(ps) (((ps) & GPIO_INOUT_MASK) == 0)
#define GPIO_ISOUTORALT(ps) (((ps) & GPIO_INOUT_MASK) != 0) #define GPIO_ISOUTORALT(ps) (((ps) & GPIO_INOUT_MASK) != 0)
#define GPIO_ISINTERRUPT(ps) (GPIO_ISOUTPUT(ps) && !GPIO_ISINPUT(ps)) #define GPIO_ISINTERRUPT(ps) (GPIO_ISOUTPUT(ps) && !GPIO_ISINPUT(ps))
#define GPIO_ISFE(ps) (((ps) & GPIO_FE_MASK) != 0) #define GPIO_ISFE(ps) (((ps) & GPIO_FE_MASK) != 0)
#define GPIO_ISRE(ps) (((ps) & GPIO_RE_MASK) != 0) #define GPIO_ISRE(ps) (((ps) & GPIO_RE_MASK) != 0)
/* Pin Mode: MM */ /* Pin Mode: MM */
#define GPIO_PINMODE_SHIFT (7) #define GPIO_PUMODE_SHIFT (10) /* Bits 10-11: Pin pull-up mode */
#define GPIO_PUMODE_SHIFT (10) /* Bits 10-11: Pin pull-up mode */ #define GPIO_PUMODE_MASK (3 << GPIO_PUMODE_SHIFT)
#define GPIO_PUMODE_MASK (3 << GPIO_PUMODE_SHIFT) # define GPIO_FLOAT (0 << GPIO_PUMODE_SHIFT) /* Neither pull-up nor -down */
# define GPIO_FLOAT (0 << GPIO_PUMODE_SHIFT) /* Neither pull-up nor -down */ # define GPIO_PULLDN (1 << GPIO_PUMODE_SHIFT) /* Pull-down resistor enabled */
# define GPIO_PULLDN (1 << GPIO_PUMODE_SHIFT) /* Pull-down resistor enabled */ # define GPIO_PULLUP (2 << GPIO_PUMODE_SHIFT) /* Pull-up resistor enabled */
# define GPIO_PULLUP (2 << GPIO_PUMODE_SHIFT) /* Pull-up resistor enabled */ # define GPIO_REPEATER (3 << GPIO_PUMODE_SHIFT) /* Repeater mode enabled */
# define GPIO_REPEATER (3 << GPIO_PUMODE_SHIFT) /* Repeater mode enabled */
/* Open drain: O */ /* Open drain: O */
#define GPIO_OPEN_DRAIN (1 << 9) /* Bit 9: Open drain mode */ #define GPIO_OPEN_DRAIN (1 << 9) /* Bit 9: Open drain mode */
/* Initial value: V */ /* Initial value: V */
#define GPIO_VALUE (1 << 8) /* Bit 8: Initial GPIO output value */ #define GPIO_VALUE (1 << 8) /* Bit 8: Initial GPIO output value */
#define GPIO_VALUE_ONE GPIO_VALUE # define GPIO_VALUE_ONE GPIO_VALUE
#define GPIO_VALUE_ZERO (0) # define GPIO_VALUE_ZERO (0)
/* Port number: PPP (0-5) */ /* Port number: PPP (0-5) */
#define GPIO_PORT_SHIFT (5) /* Bit 5-7: Port number */ #define GPIO_PORT_SHIFT (5) /* Bit 5-7: Port number */
#define GPIO_PORT_MASK (7 << GPIO_PORT_SHIFT) #define GPIO_PORT_MASK (7 << GPIO_PORT_SHIFT)
# define GPIO_PORT0 (0 << GPIO_PORT_SHIFT) # define GPIO_PORT0 (0 << GPIO_PORT_SHIFT)
# define GPIO_PORT1 (1 << GPIO_PORT_SHIFT) # define GPIO_PORT1 (1 << GPIO_PORT_SHIFT)
# define GPIO_PORT2 (2 << GPIO_PORT_SHIFT) # define GPIO_PORT2 (2 << GPIO_PORT_SHIFT)
# define GPIO_PORT3 (3 << GPIO_PORT_SHIFT) # define GPIO_PORT3 (3 << GPIO_PORT_SHIFT)
# define GPIO_PORT4 (4 << GPIO_PORT_SHIFT) # define GPIO_PORT4 (4 << GPIO_PORT_SHIFT)
# define GPIO_PORT5 (5 << GPIO_PORT_SHIFT) # define GPIO_PORT5 (5 << GPIO_PORT_SHIFT)
#define GPIO_NPORTS 6 #define GPIO_NPORTS 6
/* Pin number: NNNNN (0-31) */ /* Pin number: NNNNN (0-31) */
#define GPIO_PIN_SHIFT 0 /* Bits 0-4: GPIO number: 0-31 */ #define GPIO_PIN_SHIFT 0 /* Bits 0-4: GPIO number: 0-31 */
#define GPIO_PIN_MASK (31 << GPIO_PIN_SHIFT) #define GPIO_PIN_MASK (31 << GPIO_PIN_SHIFT)
#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT) # define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT) # define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT) # define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT) # define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT) # define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT) # define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT) # define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT) # define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT) # define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT) # define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT) # define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT) # define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT) # define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT) # define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT) # define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT) # define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
#define GPIO_PIN16 (16 << GPIO_PIN_SHIFT) # define GPIO_PIN16 (16 << GPIO_PIN_SHIFT)
#define GPIO_PIN17 (17 << GPIO_PIN_SHIFT) # define GPIO_PIN17 (17 << GPIO_PIN_SHIFT)
#define GPIO_PIN18 (18 << GPIO_PIN_SHIFT) # define GPIO_PIN18 (18 << GPIO_PIN_SHIFT)
#define GPIO_PIN19 (19 << GPIO_PIN_SHIFT) # define GPIO_PIN19 (19 << GPIO_PIN_SHIFT)
#define GPIO_PIN20 (20 << GPIO_PIN_SHIFT) # define GPIO_PIN20 (20 << GPIO_PIN_SHIFT)
#define GPIO_PIN21 (21 << GPIO_PIN_SHIFT) # define GPIO_PIN21 (21 << GPIO_PIN_SHIFT)
#define GPIO_PIN22 (22 << GPIO_PIN_SHIFT) # define GPIO_PIN22 (22 << GPIO_PIN_SHIFT)
#define GPIO_PIN23 (23 << GPIO_PIN_SHIFT) # define GPIO_PIN23 (23 << GPIO_PIN_SHIFT)
#define GPIO_PIN24 (24 << GPIO_PIN_SHIFT) # define GPIO_PIN24 (24 << GPIO_PIN_SHIFT)
#define GPIO_PIN25 (25 << GPIO_PIN_SHIFT) # define GPIO_PIN25 (25 << GPIO_PIN_SHIFT)
#define GPIO_PIN26 (26 << GPIO_PIN_SHIFT) # define GPIO_PIN26 (26 << GPIO_PIN_SHIFT)
#define GPIO_PIN27 (27 << GPIO_PIN_SHIFT) # define GPIO_PIN27 (27 << GPIO_PIN_SHIFT)
#define GPIO_PIN28 (28 << GPIO_PIN_SHIFT) # define GPIO_PIN28 (28 << GPIO_PIN_SHIFT)
#define GPIO_PIN29 (29 << GPIO_PIN_SHIFT) # define GPIO_PIN29 (29 << GPIO_PIN_SHIFT)
#define GPIO_PIN30 (30 << GPIO_PIN_SHIFT) # define GPIO_PIN30 (30 << GPIO_PIN_SHIFT)
#define GPIO_PIN31 (31 << GPIO_PIN_SHIFT) # define GPIO_PIN31 (31 << GPIO_PIN_SHIFT)
#else #else
# error "Unrecognized LPC17xx family" # error "Unrecognized LPC17xx family"

113
arch/arm/src/lpc17xx/lpc17_gpioint.c
View File

@ -1,7 +1,7 @@
/**************************************************************************** /****************************************************************************
* arch/arm/src/lpc17xx/lpc17_gpioint.c * arch/arm/src/lpc17xx/lpc17_gpioint.c
* *
* Copyright (C) 2010-2011 Gregory Nutt. All rights reserved. * Copyright (C) 2010-2011, 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org> * Author: Gregory Nutt <gnutt@nuttx.org>
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -51,7 +51,6 @@
#include "chip.h" #include "chip.h"
#include "lpc17_gpio.h" #include "lpc17_gpio.h"
#ifdef CONFIG_GPIO_IRQ #ifdef CONFIG_GPIO_IRQ
/**************************************************************************** /****************************************************************************
@ -94,7 +93,7 @@ static unsigned int lpc17_getintedge(unsigned int port, unsigned int pin)
} }
else if (port == 2) else if (port == 2)
{ {
intedge = &g_intedge2; intedge = &g_intedge2;
} }
else else
{ {
@ -114,7 +113,8 @@ static unsigned int lpc17_getintedge(unsigned int port, unsigned int pin)
* *
****************************************************************************/ ****************************************************************************/
static void lpc17_setintedge(uint32_t intbase, unsigned int pin, unsigned int edges) static void lpc17_setintedge(uint32_t intbase, unsigned int pin,
unsigned int edges)
{ {
int regval; int regval;
@ -129,9 +129,10 @@ static void lpc17_setintedge(uint32_t intbase, unsigned int pin, unsigned int ed
{ {
regval &= ~GPIOINT(pin); regval &= ~GPIOINT(pin);
} }
putreg32(regval, intbase + LPC17_GPIOINT_INTENR_OFFSET); putreg32(regval, intbase + LPC17_GPIOINT_INTENR_OFFSET);
/* Set/clear the rising edge enable bit */ /* Set/clear the falling edge enable bit */
regval = getreg32(intbase + LPC17_GPIOINT_INTENF_OFFSET); regval = getreg32(intbase + LPC17_GPIOINT_INTENF_OFFSET);
if ((edges & 1) != 0) if ((edges & 1) != 0)
@ -142,6 +143,7 @@ static void lpc17_setintedge(uint32_t intbase, unsigned int pin, unsigned int ed
{ {
regval &= ~GPIOINT(pin); regval &= ~GPIOINT(pin);
} }
putreg32(regval, intbase + LPC17_GPIOINT_INTENF_OFFSET); putreg32(regval, intbase + LPC17_GPIOINT_INTENF_OFFSET);
} }
@ -155,39 +157,56 @@ static void lpc17_setintedge(uint32_t intbase, unsigned int pin, unsigned int ed
static int lpc17_irq2port(int irq) static int lpc17_irq2port(int irq)
{ {
/* Set 1: 12 interrupts p0.0-p0.11 */ /* Set 1:
* LPC176x: 12 interrupts p0.0-p0.11
* LPC178x: 16 interrupts p0.0-p0.15
*/
if (irq >= LPC17_VALID_FIRST0L && irq < (LPC17_VALID_FIRST0L+LPC17_VALID_NIRQS0L)) if (irq >= LPC17_VALID_FIRST0L &&
irq < (LPC17_VALID_FIRST0L + LPC17_VALID_NIRQS0L))
{ {
return 0; return 0;
} }
/* Set 2: 16 interrupts p0.15-p0.30 */ /* Set 2:
* LPC176x: 16 interrupts p0.15-p0.30
* LPC178x: 16 interrupts p0.16-p0.31
*/
else if (irq >= LPC17_VALID_FIRST0H && irq < (LPC17_VALID_FIRST0H+LPC17_VALID_NIRQS0H)) else if (irq >= LPC17_VALID_FIRST0H &&
irq < (LPC17_VALID_FIRST0H + LPC17_VALID_NIRQS0H))
{ {
return 0; return 0;
} }
#if defined (LPC176x) #if defined (LPC176x)
/* Set 3: 14 interrupts p2.0-p2.13 */ /* Set 3:
* LPC17x: 14 interrupts p2.0-p2.13
*/
else if (irq >= LPC17_VALID_FIRST2 && irq < (LPC17_VALID_FIRST2+LPC17_VALID_NIRQS2)) else if (irq >= LPC17_VALID_FIRST2 &&
irq < (LPC17_VALID_FIRST2 + LPC17_VALID_NIRQS2))
{ {
return 2; return 2;
} }
#elif defined (LPC178x) #elif defined (LPC178x)
/* Set 3: 15 interrupts p2.0-p2.15 */ /* Set 3:
* LPC18x: 16 interrupts p2.0-p2.15
*/
else if (irq >= LPC17_VALID_FIRST2L && irq < (LPC17_VALID_FIRST2L+LPC17_VALID_NIRQS2L)) else if (irq >= LPC17_VALID_FIRST2L &&
irq < (LPC17_VALID_FIRST2L + LPC17_VALID_NIRQS2L))
{ {
return 2; return 2;
} }
/* Set 4: 15 interrupts p2.16-p2.30 */ /* Set 4:
* LPC178x: 16 interrupts p2.16-p2.31
*/
else if (irq >= LPC17_VALID_FIRST2H && irq < (LPC17_VALID_FIRST2L+LPC17_VALID_NIRQS2H)) else if (irq >= LPC17_VALID_FIRST2H &&
irq < (LPC17_VALID_FIRST2H + LPC17_VALID_NIRQS2H))
{ {
return 2; return 2;
} }
@ -207,66 +226,83 @@ static int lpc17_irq2port(int irq)
static int lpc17_irq2pin(int irq) static int lpc17_irq2pin(int irq)
{ {
/* Set 1: 12 interrupts p0.0-p0.11 /* Set 1:
* LPC17x: 12 interrupts p0.0-p0.11
* LPC18x: 16 interrupts p0.0-p0.15
* *
* See arch/arm/include/lpc17xx/irq.h: * See arch/arm/include/lpc17xx/irq.h:
* LPC17_VALID_SHIFT0L 0 - Bit 0 is thre first bit in the group of 12 interrupts * LPC17_VALID_SHIFT0L 0 - Bit 0 is thre first bit in the group of
* LPC17_VALID_FIRST0L irq - IRQ number associated with p0.0 * 12/16 interrupts
* LPC17_VALID_NIRQS0L 12 - 12 interrupt bits in the group * LPC17_VALID_FIRST0L irq - IRQ number associated with p0.0
* LPC17_VALID_NIRQS0L 12/16 - Number of interrupt bits in the group
*/ */
if (irq >= LPC17_VALID_FIRST0L && irq < (LPC17_VALID_FIRST0L+LPC17_VALID_NIRQS0L)) if (irq >= LPC17_VALID_FIRST0L &&
irq < (LPC17_VALID_FIRST0L + LPC17_VALID_NIRQS0L))
{ {
return irq - LPC17_VALID_FIRST0L + LPC17_VALID_SHIFT0L; return irq - LPC17_VALID_FIRST0L + LPC17_VALID_SHIFT0L;
} }
/* Set 2: 16 interrupts p0.15-p0.30 /* Set 2:
* LPC176x: 16 interrupts p0.15-p0.30
* LPC178x: 16 interrupts p0.16-p0.31
* *
* LPC17_VALID_SHIFT0H 15 - Bit 15 is the first bit in a group of 16 interrupts * LPC17_VALID_SHIFT0H 15/16 - Bit number of the first bit in a group
* LPC17_VALID_FIRST0L irq - IRQ number associated with p0.15 * of 16 interrupts
* LPC17_VALID_FIRST0L irq - IRQ number associated with p0.15/16
* LPC17_VALID_NIRQS0L 16 - 16 interrupt bits in the group * LPC17_VALID_NIRQS0L 16 - 16 interrupt bits in the group
*/ */
else if (irq >= LPC17_VALID_FIRST0H && irq < (LPC17_VALID_FIRST0H+LPC17_VALID_NIRQS0H)) else if (irq >= LPC17_VALID_FIRST0H &&
irq < (LPC17_VALID_FIRST0H + LPC17_VALID_NIRQS0H))
{ {
return irq - LPC17_VALID_FIRST0H + LPC17_VALID_SHIFT0H; return irq - LPC17_VALID_FIRST0H + LPC17_VALID_SHIFT0H;
} }
#if defined(LPC176x) #if defined(LPC176x)
/* Set 3: 14 interrupts p2.0-p2.13 /* Set 3:
* LPC17x: 14 interrupts p2.0-p2.13
* *
* LPC17_VALID_SHIFT2 0 - Bit 0 is the first bit in a group of 14 interrupts * LPC17_VALID_SHIFT2 0 - Bit 0 is the first bit in a group of 14
* interrupts
* LPC17_VALID_FIRST2 irq - IRQ number associated with p2.0 * LPC17_VALID_FIRST2 irq - IRQ number associated with p2.0
* LPC17_VALID_NIRQS2 14 - 14 interrupt bits in the group * LPC17_VALID_NIRQS2 14 - 14 interrupt bits in the group
*/ */
else if (irq >= LPC17_VALID_FIRST2 && irq < (LPC17_VALID_FIRST2+LPC17_VALID_NIRQS2)) else if (irq >= LPC17_VALID_FIRST2 &&
irq < (LPC17_VALID_FIRST2 + LPC17_VALID_NIRQS2))
{ {
return irq - LPC17_VALID_FIRST2 + LPC17_VALID_SHIFT2; return irq - LPC17_VALID_FIRST2 + LPC17_VALID_SHIFT2;
} }
#elif defined(LPC178x) #elif defined(LPC178x)
/* Set 3: 15 interrupts p2.0-p2.15 /* Set 3:
* LPC18x: 16 interrupts p2.0-p2.15
* *
* LPC17_VALID_SHIFT2L 0 - Bit 0 is the first bit in a group of 14 interrupts * LPC17_VALID_SHIFT2L 0 - Bit 0 is the first bit in a group of 16
* interrupts
* LPC17_VALID_FIRST2L irq - IRQ number associated with p2.0 * LPC17_VALID_FIRST2L irq - IRQ number associated with p2.0
* LPC17_VALID_NIRQS2L 15 - 15 interrupt bits in the group * LPC17_VALID_NIRQS2L 16 - 16 interrupt bits in the group
*/ */
else if (irq >= LPC17_VALID_FIRST2L && irq < (LPC17_VALID_FIRST2L+LPC17_VALID_NIRQS2L)) else if (irq >= LPC17_VALID_FIRST2L &&
irq < (LPC17_VALID_FIRST2L + LPC17_VALID_NIRQS2L))
{ {
return irq - LPC17_VALID_FIRST2L + LPC17_VALID_SHIFT2L; return irq - LPC17_VALID_FIRST2L + LPC17_VALID_SHIFT2L;
} }
/* Set 3: 15 interrupts p2.16-p2.30 /* Set 3:
* LPC18x: 16 interrupts p2.16-p2.31
* *
* LPC17_VALID_SHIFT2L 0 - Bit 0 is the first bit in a group of 14 interrupts * LPC17_VALID_SHIFT2L 16 - Bit 16 is the first bit in a group of 16
* interrupts
* LPC17_VALID_FIRST2L irq - IRQ number associated with p2.0 * LPC17_VALID_FIRST2L irq - IRQ number associated with p2.0
* LPC17_VALID_NIRQS2L 15 - 15 interrupt bits in the group * LPC17_VALID_NIRQS2L 16 - 16 interrupt bits in the group
*/ */
else if (irq >= LPC17_VALID_FIRST2H && irq < (LPC17_VALID_FIRST2H+LPC17_VALID_NIRQS2H)) else if (irq >= LPC17_VALID_FIRST2H &&
irq < (LPC17_VALID_FIRST2H + LPC17_VALID_NIRQS2H))
{ {
return irq - LPC17_VALID_FIRST2H + LPC17_VALID_SHIFT2H; return irq - LPC17_VALID_FIRST2H + LPC17_VALID_SHIFT2H;
} }
@ -305,7 +341,7 @@ static void lpc17_gpiodemux(uint32_t intbase, uint32_t intmask,
/* And get the OR of the enabled interrupt sources. We do not make any /* And get the OR of the enabled interrupt sources. We do not make any
* distinction between rising and falling edges (but the hardware does support * distinction between rising and falling edges (but the hardware does support
* the ability to differently if needed. * the ability to handle them differently if needed).
*/ */
intstatus = intstatr | intstatf; intstatus = intstatr | intstatf;
@ -429,6 +465,9 @@ void lpc17_gpioirqinitialize(void)
up_enable_irq(LPC17_IRQ_EINT3); up_enable_irq(LPC17_IRQ_EINT3);
#elif defined(LPC178x) #elif defined(LPC178x)
/* the LPC178x family has a single, dedicated interrupt for GPIO0 and
* GPIO2.
*/
(void)irq_attach(LPC17_IRQ_GPIO, lpc17_gpiointerrupt); (void)irq_attach(LPC17_IRQ_GPIO, lpc17_gpiointerrupt);
up_enable_irq(LPC17_IRQ_GPIO); up_enable_irq(LPC17_IRQ_GPIO);
@ -491,7 +530,7 @@ void lpc17_gpioirqdisable(int irq)
{ {
/* And get the pin number associated with the port */ /* And get the pin number associated with the port */
unsigned int pin = lpc17_irq2pin(irq); unsigned int pin = lpc17_irq2pin(irq);
lpc17_setintedge(intbase, pin, 0); lpc17_setintedge(intbase, pin, 0);
} }
} }

4
configs/open1788/src/lpc17_touchscreen.c
View File

@ -188,7 +188,9 @@ static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable)
static void tsc_clear(FAR struct ads7843e_config_s *state) static void tsc_clear(FAR struct ads7843e_config_s *state)
{ {
/* Does nothing */ /* Does nothing. The interrupt is cleared automatically in the GPIO
* logic for the LPC17xx family.
*/
} }
static bool tsc_busy(FAR struct ads7843e_config_s *state) static bool tsc_busy(FAR struct ads7843e_config_s *state)

2
drivers/input/ads7843e.c
View File

@ -1051,8 +1051,6 @@ static int ads7843e_poll(FAR struct file *filep, FAR struct pollfd *fds,
{ {
FAR struct inode *inode; FAR struct inode *inode;
FAR struct ads7843e_dev_s *priv; FAR struct ads7843e_dev_s *priv;
pollevent_t eventset;
int ndx;
int ret = OK; int ret = OK;
int i; int i;