risc-v/espressif: Fix inconsistencies in IRQ interface documentation
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
This commit is contained in:
parent
ec2b74df77
commit
e205d790ee
@ -45,7 +45,7 @@ extern "C"
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/* CPU interrupt types. */
|
||||
/* CPU interrupt trigger types */
|
||||
|
||||
typedef enum irq_trigger_e
|
||||
{
|
||||
@ -53,7 +53,7 @@ typedef enum irq_trigger_e
|
||||
ESP_IRQ_TRIGGER_EDGE = 1, /* Edge-triggered interrupts */
|
||||
} irq_trigger_t;
|
||||
|
||||
/* CPU interrupt types. */
|
||||
/* CPU interrupt priority levels */
|
||||
|
||||
typedef enum irq_priority_e
|
||||
{
|
||||
|
Loading…
x
Reference in New Issue
Block a user