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Revert "stm32h7 sdmmc: set SDMMC_CK pin to high speed (50 MHz) mode. When it was in slow speed mode (by default), the output SDMMC_CK clock rise and fall times were about 13 ns each, that were very slow and prevented some SDIO devices from working."

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This reverts commit 0aecfe8691.
This commit is contained in:
David Sidrane 2021-12-16 04:23:46 -08:00 committed by Xiang Xiao
parent c1c1882783
commit e269b5fa28
1 changed files with 4 additions and 11 deletions
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15
arch/arm/src/stm32h7/hardware/stm32h7x3xx_pinmap.h
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@ -1049,17 +1049,10 @@
#define GPIO_SAI4_SD_B_1 (GPIO_ALT|GPIO_AF8|GPIO_PORTE|GPIO_PIN3)
#define GPIO_SAI4_SD_B_2 (GPIO_ALT|GPIO_AF8|GPIO_PORTF|GPIO_PIN6)
/* SD/MMC
*
* Note that the below configures GPIO_SPEED_50MHz I/O. In case of using
* the SD/MMC it is recommended to enable I/O compensation cell for slew rate
* control on I/O commutation to reduce the I/O noise on power supply.
* The I/O commutation cell can be enabled by setting
* CONFIG_STM32_SYSCFG_IOCOMPENSATION=y option in your board configuration.
*/
/* SD/MMC */
#define GPIO_SDMMC1_CDIR (GPIO_ALT|GPIO_AF7|GPIO_PORTB|GPIO_PIN9)
#define GPIO_SDMMC1_CK (GPIO_ALT|GPIO_AF12|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN12)
#define GPIO_SDMMC1_CK (GPIO_ALT|GPIO_AF12|GPIO_PORTC|GPIO_PIN12)
#define GPIO_SDMMC1_CKIN (GPIO_ALT|GPIO_AF7|GPIO_PORTB|GPIO_PIN8)
#define GPIO_SDMMC1_CMD (GPIO_ALT|GPIO_AF12|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN2)
#define GPIO_SDMMC1_D0 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN8)
@ -1073,8 +1066,8 @@
#define GPIO_SDMMC1_D6 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6)
#define GPIO_SDMMC1_D7 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7)
#define GPIO_SDMMC2_CK_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_50MHz|GPIO_PORTD|GPIO_PIN6)
#define GPIO_SDMMC2_CK_2 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN1)
#define GPIO_SDMMC2_CK_1 (GPIO_ALT|GPIO_AF11|GPIO_PORTD|GPIO_PIN6)
#define GPIO_SDMMC2_CK_2 (GPIO_ALT|GPIO_AF9|GPIO_PORTC|GPIO_PIN1)
#define GPIO_SDMMC2_CMD_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PULLUP|GPIO_PORTD|GPIO_PIN7)
#define GPIO_SDMMC2_CMD_2 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN0)
#define GPIO_SDMMC2_D0 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN14)