Add a skeleton for an STM32 ADC driver
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4162 42af7a65-404d-4744-a932-0658087f49c3
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@ -71,6 +71,10 @@ ifeq ($(CONFIG_RTC),y)
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CHIP_CSRCS += stm32_rtc.c
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endif
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ifeq ($(CONFIG_ADC),y)
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CHIP_CSRCS += stm32_adc.c
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endif
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ifeq ($(CONFIG_DEBUG),y)
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CHIP_CSRCS += stm32_dumpgpio.c
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endif
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382
arch/arm/src/stm32/stm32_adc.c
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382
arch/arm/src/stm32/stm32_adc.c
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@ -0,0 +1,382 @@
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/****************************************************************************
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* arch/arm/src/stm32/stm32_adc.c
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Li Zhuoyi <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdio.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <semaphore.h>
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#include <errno.h>
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#include <debug.h>
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#include <arch/board/board.h>
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#include <nuttx/arch.h>
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#include <nuttx/analog/adc.h>
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#include "up_internal.h"
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#include "up_arch.h"
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#include "chip.h"
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#include "stm32_internal.h"
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#include "stm32_adc.h"
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#ifdef CONFIG_ADC
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration ************************************************************/
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/* Up to 3 ADC interfaces are supported */
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#if STM32_NADC < 3
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# undef CONFIG_STM32_ADC3
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#endif
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#if STM32_NADC < 2
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# undef CONFIG_STM32_ADC2
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#endif
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#if STM32_NADC < 1
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# undef CONFIG_STM32_ADC1
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#endif
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#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3)
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct stm32_dev_s
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{
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int irq;
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# warning "Missing logic"
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/* ADC Interrupt Handler */
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static int adc_interrupt(int irq, void *context);
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/* ADC Driver Methods */
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static void adc_reset(FAR struct adc_dev_s *dev);
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static int adc_setup(FAR struct adc_dev_s *dev);
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static void adc_shutdown(FAR struct adc_dev_s *dev);
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static void adc_rxint(FAR struct adc_dev_s *dev, bool enable);
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static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg);
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static int adc_interrupt(int irq, void *context);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static const struct adc_ops_s g_adcops =
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{
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.ao_reset = adc_reset,
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.ao_setup = adc_setup,
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.ao_shutdown = adc_shutdown,
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.ao_rxint = adc_rxint,
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.ao_ioctl = adc_ioctl,
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};
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#ifdef CONFIG_STM32_ADC1
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static struct stm32_dev_s g_adcpriv1 =
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{
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#ifdef CONFIG_STM32_STM32F10XX
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.irq = STM32_IRQ_ADC12;
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#else
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.irq = STM32_IRQ_ADC;
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#endif
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# warning "Missing logic"
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};
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static struct adc_dev_s g_adcdev1 =
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{
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.ad_ops = &g_adcops,
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.ad_priv= &g_adcpriv1
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};
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#endif
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#ifdef CONFIG_STM32_ADC2
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static struct stm32_dev_s g_adcpriv2 =
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{
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#ifdef CONFIG_STM32_STM32F10XX
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.irq = STM32_IRQ_ADC12;
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#else
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.irq = STM32_IRQ_ADC;
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#endif
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# warning "Missing logic"
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};
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static struct adc_dev_s g_adcdev2 =
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{
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.ad_ops = &g_adcops
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.ad_priv= &g_adcpriv2
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};
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#endif
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#ifdef CONFIG_STM32_ADC3
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static struct stm32_dev_s g_adcpriv3 =
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{
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#ifdef CONFIG_STM32_STM32F10XX
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.irq = STM32_IRQ_ADC3;
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#else
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.irq = STM32_IRQ_ADC;
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#endif
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# warning "Missing logic"
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};
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static struct adc_dev_s g_adcdev3 =
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{
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.ad_ops = &g_adcops,
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.ad_priv= &g_adcpriv3
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};
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: adc_interrupt
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*
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* Description:
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* ADC interrupt handler.
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*
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* Input Parameters:
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*
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* Returned Value:
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*
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****************************************************************************/
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static int adc_interrupt(int irq, void *context)
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{
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FAR struct stm32_dev_s *priv;
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uint32_t regval;
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/* Determine which ADC caused the interrupt */
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# warning "Missing logic"
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/* Handle the ADC interrupt */
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# warning "Missing logic"
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return OK;
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}
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/****************************************************************************
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* Name: adc_reset
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*
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* Description:
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* Reset the ADC device. Called early to initialize the hardware. This
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* is called, before ao_setup() and on error conditions.
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*
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* Input Parameters:
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*
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* Returned Value:
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*
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****************************************************************************/
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static void adc_reset(FAR struct adc_dev_s *dev)
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{
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FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
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irqstate_t flags;
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uint32_t regval;
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flags = irqsave();
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# warning "Missing logic"
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irqrestore(flags);
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}
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/****************************************************************************
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* Name: adc_setup
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*
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* Description:
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* Configure the ADC. This method is called the first time that the ADC
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* device is opened. This will occur when the port is first opened.
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* This setup includes configuring and attaching ADC interrupts. Interrupts
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* are all disabled upon return.
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*
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* Input Parameters:
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*
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* Returned Value:
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*
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****************************************************************************/
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static int adc_setup(FAR struct adc_dev_s *dev)
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{
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FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
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int ret;
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/* Attach the ADC interrupt */
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ret = irq_attach(priv->irq, adc_interrupt);
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if (ret == OK)
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{
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/* Initialize the ADC data structures */
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#warning "Missing logic"
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/* Enable the ADC interrupt */
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up_enable_irq(priv->irq);
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}
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return ret;
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}
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/****************************************************************************
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* Name: adc_shutdown
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*
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* Description:
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* Disable the ADC. This method is called when the ADC device is closed.
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* This method reverses the operation the setup method.
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*
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* Input Parameters:
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*
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* Returned Value:
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*
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****************************************************************************/
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static void adc_shutdown(FAR struct adc_dev_s *dev)
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{
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FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
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/* Disable ADC interrupts and detach the ADC interrupt handler */
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up_disable_irq(priv->irq);
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irq_detach(priv->irq);
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/* Disable and reset the ADC module */
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#warning "Missing logic"
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}
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/****************************************************************************
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* Name: adc_rxint
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*
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* Description:
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* Call to enable or disable RX interrupts.
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*
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* Input Parameters:
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*
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* Returned Value:
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*
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****************************************************************************/
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static void adc_rxint(FAR struct adc_dev_s *dev, bool enable)
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{
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FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
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if (enable)
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{
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#warning "Missing logic"
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}
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else
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{
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#warning "Missing logic"
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}
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}
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/****************************************************************************
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* Name: adc_ioctl
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*
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* Description:
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* All ioctl calls will be routed through this method.
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*
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* Input Parameters:
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*
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* Returned Value:
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*
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****************************************************************************/
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static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg)
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{
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return -ENOTTY;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_adcinitialize
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*
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* Description:
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* Initialize the adc
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*
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* Returned Value:
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* Valid can device structure reference on succcess; a NULL on failure
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*
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****************************************************************************/
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struct adc_dev_s *up_adcinitialize(int intf)
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{
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#ifdef CONFIG_STM32_ADC1
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if (intf == 1)
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{
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return &g_adcdev1;
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}
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else
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#endif
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#ifdef CONFIG_STM32_ADC2
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if (intf == 2)
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{
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return &g_adcdev2;
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}
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else
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#endif
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#ifdef CONFIG_STM32_ADC3
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if (intf == 3)
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{
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return &g_adcdev3;
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}
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else
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#endif
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{
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return NULL;
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}
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}
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#endif /* CONFIG_STM32_ADC || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */
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#endif /* CONFIG_ADC */
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#endif
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#ifndef CONFIG_STM32_ETH_BUFSIZE
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# define CONFIG_STM32_ETH_BUFSIZE CONFIG_NET_BUFSIZE
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# define CONFIG_STM32_ETH_BUFSIZE CONFIG_NET_BUFSIZE
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#endif
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#if CONFIG_STM32_ETH_BUFSIZE > ETH_TDES1_TBS1_MASK
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# error "CONFIG_STM32_ETH_BUFSIZE is too large"
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#endif
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#if CONFIG_STM32_ETH_BUFSIZE != CONFIG_NET_BUFSIZE
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# warning "You using an incomplete/untested configuration"
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#endif
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#ifndef CONFIG_STM32_ETH_NRXDESC
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# define CONFIG_STM32_ETH_NRXDESC 8
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#endif
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