Add support for SPI NOR chip select
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2938 42af7a65-404d-4744-a932-0658087f49c3
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@ -1,7 +1,7 @@
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/************************************************************************************
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* arch/arm/src/lpc313x/lpc313x_internal.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -47,7 +47,9 @@
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#include <stdbool.h>
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#include "up_internal.h"
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#include "up_arch.h"
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#include "chip.h"
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#include "lpc313x_ioconfig.h"
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/************************************************************************************
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* Definitions
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@ -79,6 +81,70 @@ extern "C" {
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#define EXTERN extern
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#endif
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/************************************************************************************
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* Inline Functions
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************************************************************************************/
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/* Configure a pin as an input */
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static inline void gpio_configinput(uint32_t ioconfig, uint32_t bit)
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{
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uint32_t regaddr;
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regaddr = ioconfig + LPC313X_IOCONFIG_MODE0RESET_OFFSET;
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putreg32(bit, regaddr);
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regaddr = ioconfig + LPC313X_IOCONFIG_MODE1RESET_OFFSET;
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putreg32(bit, regaddr);
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}
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/* Return the current state of an input GPIO pin */
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static inline bool lpc313x_gpioread(uint32_t ioconfig, uint32_t bit)
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{
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uint32_t regaddr = ioconfig + LPC313X_IOCONFIG_PINS_OFFSET;
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return (getreg32(regaddr) & bit) != 0;
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}
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/* Configure the pin so that it is driven by the device */
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static inline void gpio_configdev(uint32_t ioconfig, uint32_t bit)
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{
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uint32_t regaddr;
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regaddr = ioconfig + LPC313X_IOCONFIG_MODE1RESET_OFFSET;
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putreg32(bit, regaddr);
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regaddr = ioconfig + LPC313X_IOCONFIG_MODE0SET_OFFSET;
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putreg32(bit, regaddr);
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}
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/* Configure a pin as a low output */
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static inline void gpio_outputlow(uint32_t ioconfig, uint32_t bit)
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{
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uint32_t regaddr;
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regaddr = ioconfig + LPC313X_IOCONFIG_MODE1SET_OFFSET;
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putreg32(bit, regaddr);
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regaddr = ioconfig + LPC313X_IOCONFIG_MODE0RESET_OFFSET;
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putreg32(bit, regaddr);
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}
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/* Configure a pin as a high output */
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static inline void gpio_outputhigh(uint32_t ioconfig, uint32_t bit)
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{
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uint32_t regaddr;
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regaddr = ioconfig + LPC313X_IOCONFIG_MODE1SET_OFFSET;
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putreg32(bit, regaddr);
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regaddr = ioconfig + LPC313X_IOCONFIG_MODE0SET_OFFSET;
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putreg32(bit, regaddr);
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}
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/************************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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@ -103,50 +169,6 @@ EXTERN void lpc313x_lowsetup(void);
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EXTERN void lpc313x_clockconfig(void);
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/************************************************************************************
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* Name: lpc313x_configgpio
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*
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* Description:
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* Configure a GPIO pin based on bit-encoded description of the pin.
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*
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************************************************************************************/
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EXTERN int lpc313x_configgpio(uint32_t cfgset);
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/************************************************************************************
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* Name: lpc313x_gpiowrite
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*
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* Description:
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* Write one or zero to the selected GPIO pin
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*
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************************************************************************************/
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EXTERN void lpc313x_gpiowrite(uint32_t pinset, bool value);
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/************************************************************************************
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* Name: lpc313x_gpioread
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*
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* Description:
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* Read one or zero from the selected GPIO pin
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*
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************************************************************************************/
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EXTERN bool lpc313x_gpioread(uint32_t pinset);
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/************************************************************************************
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* Function: lpc313x_dumpgpio
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*
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* Description:
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* Dump all GPIO registers associated with the provided base address
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*
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************************************************************************************/
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#ifdef CONFIG_DEBUG
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EXTERN int lpc313x_dumpgpio(uint32_t pinset, const char *msg);
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#else
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# define lpc313x_dumpgpio(p,m)
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#endif
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/************************************************************************************
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* Name: lpc313x_spiselect and lpc313x_spistatus
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*
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