boards/arm/stm32/axoloti, omnibusf4, and stm32f4discovery: If CONFIG_SCHED_CRITMONITOR is selected, then make sure that ITM and DWT resources are enabled before accessing ITM and DWT registers. By default, these registers are disabled. Suggested by Juha Niskanen.

TODO

@@ -940,6 +940,8 @@ o Kernel/Protected Build
                -------- ----------------------------------------------
                mkrd     ramdisk_register()
 
+               See http://www.nuttx.org/doku.php?id=wiki:howtos:protected-ramdisk
+
   Status:      Open
   Priority:    Medium/High -- the kernel build configuration is not fully fielded
                yet.

arch/arm/src/kinetis/kinetis_usbdev.c

@@ -1582,7 +1582,7 @@ static int khci_rdsetup(struct khci_ep_s *privep, uint8_t *dest, int readlen)
    * in order to improve performance.
    *
    * Note that we NULLify the BDT OUT entries.  This is so that we can tell
-   * that the BDT readlly available.  No, it is not sufficient to look at the
+   * that the BDT readily available.  No, it is not sufficient to look at the
    * UOWN bit.  If UOWN==0, then the transfer has been completed BUT it may
    * not yet have been processed.  But a completely NULLified BDT is a sure
    * indication

boards/arm/stm32/axoloti/src/stm32_boot.c

@@ -45,6 +45,7 @@
 #include <arch/board/board.h>
 
 #include "up_arch.h"
+#include "nvic.h"
 #include "itm.h"
 
 #include "stm32.h"
@@ -68,6 +69,10 @@
 void stm32_boardinitialize(void)
 {
 #ifdef CONFIG_SCHED_CRITMONITOR
+  /* Enable ITM and DWT resources, if not left enabled by debugger. */
+
+  modifyreg32(NVIC_DEMCR, 0, NVIC_DEMCR_TRCENA);
+
   /* Make sure the high speed cycle counter is running.  It will be started
    * automatically only if a debugger is connected.
    */

boards/arm/stm32/omnibusf4/src/stm32_boot.c

@@ -47,6 +47,7 @@
 #include <arch/board/board.h>
 
 #include "up_arch.h"
+#include "nvic.h"
 #include "itm.h"
 
 #include "stm32.h"
@@ -70,6 +71,10 @@
 void stm32_boardinitialize(void)
 {
 #ifdef CONFIG_SCHED_CRITMONITOR
+  /* Enable ITM and DWT resources, if not left enabled by debugger. */
+
+  modifyreg32(NVIC_DEMCR, 0, NVIC_DEMCR_TRCENA);
+
   /* Make sure the high speed cycle counter is running.  It will be started
    * automatically only if a debugger is connected.
    */

boards/arm/stm32/stm32f4discovery/src/stm32_boot.c

@@ -45,6 +45,7 @@
 #include <arch/board/board.h>
 
 #include "up_arch.h"
+#include "nvic.h"
 #include "itm.h"
 
 #include "stm32.h"
@@ -68,6 +69,10 @@
 void stm32_boardinitialize(void)
 {
 #ifdef CONFIG_SCHED_CRITMONITOR
+  /* Enable ITM and DWT resources, if not left enabled by debugger. */
+
+  modifyreg32(NVIC_DEMCR, 0, NVIC_DEMCR_TRCENA);
+
   /* Make sure the high speed cycle counter is running.  It will be started
    * automatically only if a debugger is connected.
    */