Create SAM4L GPIO driver header file
This commit is contained in:
Gregory Nutt
parent
2fb1a3269b
commit
e35d569477
@ -4891,4 +4891,6 @@
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important for the STM32 F4 which may have SPI data buffers
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allocated on the stack in CCM memory which cannot support the
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DMA. From Petteri Aimonen (2013-6-4).
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* nuttx/arch/arm/src/sam34/sam4l_gpio.h: Created GPIO driver
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header file for the SAM4L. Also renamed the SAM3U header
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file to sam3u_gpio.h (2013-6-4).
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184
arch/arm/src/sam34/sam3u_gpio.h
Normal file
184
arch/arm/src/sam34/sam3u_gpio.h
Normal file
@ -0,0 +1,184 @@
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/************************************************************************************
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* arch/arm/src/sam34/sam3u_gpio.h
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*
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* Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAM34_SAM3U_GPIO_H
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#define __ARCH_ARM_SRC_SAM34_SAM3U_GPIO_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* Bit-encoded input to sam_configgpio() ********************************************/
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/* 16-bit Encoding:
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* MMCC CII. VPPB BBBB
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*/
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/* Input/Output mode:
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*
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* MM.. .... .... ....
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*/
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#define GPIO_MODE_SHIFT (14) /* Bits 14-15: GPIO mode */
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#define GPIO_MODE_MASK (3 << GPIO_MODE_SHIFT)
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# define GPIO_INPUT (0 << GPIO_MODE_SHIFT) /* Input */
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# define GPIO_OUTPUT (1 << GPIO_MODE_SHIFT) /* Output */
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# define GPIO_PERIPHA (2 << GPIO_MODE_SHIFT) /* Controlled by periph A signal */
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# define GPIO_PERIPHB (3 << GPIO_MODE_SHIFT) /* Controlled by periph B signal */
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/* These bits set the configuration of the pin:
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* ..CC C... .... ....
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*/
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#define GPIO_CFG_SHIFT (11) /* Bits 11-13: GPIO configuration bits */
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#define GPIO_CFG_MASK (7 << GPIO_CFG_SHIFT)
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# define GPIO_CFG_DEFAULT (0 << GPIO_CFG_SHIFT) /* Default, no attribute */
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# define GPIO_CFG_PULLUP (1 << GPIO_CFG_SHIFT) /* Bit 11: Internal pull-up */
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# define GPIO_CFG_DEGLITCH (2 << GPIO_CFG_SHIFT) /* Bit 12: Internal glitch filter */
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# define GPIO_CFG_OPENDRAIN (4 << GPIO_CFG_SHIFT) /* Bit 13: Open drain */
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/* Additional interrupt modes:
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* .... .II. .... ....
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*/
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#define GPIO_INT_SHIFT (9) /* Bits 9-10: GPIO configuration bits */
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#define GPIO_INT_MASK (3 << GPIO_INT_SHIFT)
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# define GPIO_INT_LEVEL (1 << 10) /* Bit 10: Level detection interrupt */
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# define GPIO_INT_EDGE (0) /* (vs. Edge detection interrupt) */
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# define GPIO_INT_HIGHLEVEL (1 << 9) /* Bit 9: High level detection interrupt */
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# define GPIO_INT_LOWLEVEL (0) /* (vs. Low level detection interrupt) */
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# define GPIO_INT_RISING (1 << 9) /* Bit 9: Rising edge detection interrupt */
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# define GPIO_INT_FALLING (0) /* (vs. Falling edge detection interrupt) */
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/* If the pin is an GPIO output, then this identifies the initial output value:
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* .... .... V... ....
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*/
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#define GPIO_OUTPUT_SET (1 << 7) /* Bit 7: Inital value of output */
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#define GPIO_OUTPUT_CLEAR (0)
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/* This identifies the GPIO port:
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* .... .... .PP. ....
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*/
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#define GPIO_PORT_SHIFT (5) /* Bit 5-6: Port number */
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#define GPIO_PORT_MASK (3 << GPIO_PORT_SHIFT)
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# define GPIO_PORT_PIOA (0 << GPIO_PORT_SHIFT)
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# define GPIO_PORT_PIOB (1 << GPIO_PORT_SHIFT)
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# define GPIO_PORT_PIOC (2 << GPIO_PORT_SHIFT)
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/* This identifies the bit in the port:
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* .... .... ...B BBBB
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*/
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#define GPIO_PIN_SHIFT 0 /* Bits 0-4: GPIO number: 0-31 */
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#define GPIO_PIN_MASK (31 << GPIO_PIN_SHIFT)
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#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
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#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
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#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
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#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
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#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
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#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
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#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
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#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
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#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
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#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
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#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
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#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
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#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
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#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
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#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
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#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
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#define GPIO_PIN16 (16 << GPIO_PIN_SHIFT)
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#define GPIO_PIN17 (17 << GPIO_PIN_SHIFT)
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#define GPIO_PIN18 (18 << GPIO_PIN_SHIFT)
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#define GPIO_PIN19 (19 << GPIO_PIN_SHIFT)
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#define GPIO_PIN20 (20 << GPIO_PIN_SHIFT)
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#define GPIO_PIN21 (21 << GPIO_PIN_SHIFT)
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#define GPIO_PIN22 (22 << GPIO_PIN_SHIFT)
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#define GPIO_PIN23 (23 << GPIO_PIN_SHIFT)
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#define GPIO_PIN24 (24 << GPIO_PIN_SHIFT)
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#define GPIO_PIN25 (25 << GPIO_PIN_SHIFT)
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#define GPIO_PIN26 (26 << GPIO_PIN_SHIFT)
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#define GPIO_PIN27 (27 << GPIO_PIN_SHIFT)
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#define GPIO_PIN28 (28 << GPIO_PIN_SHIFT)
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#define GPIO_PIN29 (29 << GPIO_PIN_SHIFT)
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#define GPIO_PIN30 (30 << GPIO_PIN_SHIFT)
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#define GPIO_PIN31 (31 << GPIO_PIN_SHIFT)
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/* Must be big enough to hold the 16-bit encoding */
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typedef uint16_t gpio_pinset_t;
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/************************************************************************************
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* Inline Functions
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************************************************************************************/
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#ifndef __ASSEMBLY__
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/************************************************************************************
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* Public Data
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************************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/************************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_SAM34_SAM3U_GPIO_H */
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359
arch/arm/src/sam34/sam4l_gpio.h
Normal file
359
arch/arm/src/sam34/sam4l_gpio.h
Normal file
@ -0,0 +1,359 @@
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/************************************************************************************
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* arch/arm/src/sam34/sam4l_gpio.h
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
|
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
|
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* used to endorse or promote products derived from this software
|
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAM34_SAM4L_GPIO_H
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#define __ARCH_ARM_SRC_SAM34_SAM4L_GPIO_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* Bit-encoded input to sam_configgpio() ********************************************/
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/* 24-bit Encoding. This could be compacted into 16-bits by making the bit usage
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* mode specific. However, by giving each bit field a unique position, we handle
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* bad combinations of properties safely.
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*
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* MODE BITFIELDS
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* ------------ -----------------------------
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* 2222 1111 1111 1100 0000 0000
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* 3210 9876 5432 1098 7654 3210
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* ------------ -----------------------------
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* GPIO Input: MMRR .... .... IIGT .PPB BBBB
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* GPIO Output: MM.. .... DDSV .... .PPB BBBB
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* Peripheral: MM.. FFFE .... IIG. .PPB BBBB
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* ------------ -----------------------------
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* MMRR FFFE DDSV IIGT .PPB BBBB
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*/
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/* Input/output/peripheral mode:
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*
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* MODE BITFIELDS
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* ------------ -----------------------------
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* 2222 1111 1111 1100 0000 0000
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* 3210 9876 5432 1098 7654 3210
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* ------------ -----------------------------
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* GPIO Input: MM.. .... .... .... .... ....
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* GPIO Output: MM.. .... .... .... .... ....
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* Peripheral: MM.. .... .... .... .... ....
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*/
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#define GPIO_MODE_SHIFT (22) /* Bits 22-23: GPIO mode */
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#define GPIO_MODE_MASK (3 << GPIO_MODE_SHIFT)
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# define GPIO_INPUT (0 << GPIO_MODE_SHIFT) /* GPIO Input */
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# define GPIO_OUTPUT (1 << GPIO_MODE_SHIFT) /* GPIO Output */
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# define GPIO_PERIPHERAL (2 << GPIO_MODE_SHIFT) /* Controlled by peripheral */
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# define GPIO_INTERRUPT (3 << GPIO_MODE_SHIFT) /* Interrupting input */
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/* Pull-up/down resistor control for inputs
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*
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* MODE BITFIELDS
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* ------------ -----------------------------
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* 2222 1111 1111 1100 0000 0000
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* 3210 9876 5432 1098 7654 3210
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* ------------ -----------------------------
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* GPIO Input: ..RR .... .... .... .... ....
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* GPIO Output: .... .... .... .... .... ....
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* Peripheral: .... .... .... .... .... ....
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*/
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#define GPIO_PULL_SHIFT (20) /* Bits 20-21: Pull-up/down resistor control */
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#define GPIO_PULL_MASK (3 << GPIO_FUNC_SHIFT)
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# define GPIO_PULL_NONE (0 << GPIO_FUNC_SHIFT)
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# define GPIO_PULL_UP (1 << GPIO_FUNC_SHIFT)
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# define GPIO_PULL_DOWN (2 << GPIO_FUNC_SHIFT)
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# define GPIO_PULL_BUSKEEPER (3 << GPIO_FUNC_SHIFT)
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/* Peripheral Function
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*
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* MODE BITFIELDS
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* ------------ -----------------------------
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* 2222 1111 1111 1100 0000 0000
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* 3210 9876 5432 1098 7654 3210
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* ------------ -----------------------------
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* GPIO Input: .... .... .... .... .... ....
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* GPIO Output: .... .... .... .... .... ....
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* Peripheral: .... FFF. .... .... .... ....
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*/
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#define GPIO_FUNC_SHIFT (17) /* Bits 17-19: Peripheral function */
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#define GPIO_FUNC_MASK (7 << GPIO_FUNC_SHIFT)
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# define _GPIO_FUNCA (0 << GPIO_FUNC_SHIFT) /* Function A */
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# define _GPIO_FUNCB (1 << GPIO_FUNC_SHIFT) /* Function B */
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# define _GPIO_FUNCC (2 << GPIO_FUNC_SHIFT) /* Function C */
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# define _GPIO_FUNCD (3 << GPIO_FUNC_SHIFT) /* Function D */
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# define _GPIO_FUNCE (4 << GPIO_FUNC_SHIFT) /* Function E */
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# define _GPIO_FUNCF (5 << GPIO_FUNC_SHIFT) /* Function F */
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# define _GPIO_FUNCG (6 << GPIO_FUNC_SHIFT) /* Function G */
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# define _GPIO_FUNCH (7 << GPIO_FUNC_SHIFT) /* Function H */
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/* Extended input/output/peripheral mode:
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*
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* MODE BITFIELDS
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* ------------ -----------------------------
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* 2222 1111 1111 1100 0000 0000
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* 3210 9876 5432 1098 7654 3210
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* ------------ -----------------------------
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* GPIO Input: .... .... .... .... .... ....
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* GPIO Output: .... .... .... .... .... ....
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* Peripheral: MM.. FFF. .... .... .... ....
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*/
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# define GPIO_FUNCA (GPIO_PERIPHERAL | _GPIO_FUNCA) /* Function A */
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# define GPIO_FUNCB (GPIO_PERIPHERAL | _GPIO_FUNCB) /* Function B */
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# define GPIO_FUNCC (GPIO_PERIPHERAL | _GPIO_FUNCC) /* Function C */
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# define GPIO_FUNCD (GPIO_PERIPHERAL | _GPIO_FUNCD) /* Function D */
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# define GPIO_FUNCE (GPIO_PERIPHERAL | _GPIO_FUNCE) /* Function E */
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# define GPIO_FUNCF (GPIO_PERIPHERAL | _GPIO_FUNCF) /* Function F */
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# define GPIO_FUNCG (GPIO_PERIPHERAL | _GPIO_FUNCG) /* Function G */
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# define GPIO_FUNCH (GPIO_PERIPHERAL | _GPIO_FUNCH) /* Function H */
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/* Peripheral event control
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*
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* MODE BITFIELDS
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* ------------ -----------------------------
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* 2222 1111 1111 1100 0000 0000
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* 3210 9876 5432 1098 7654 3210
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* ------------ -----------------------------
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* GPIO Input: .... .... .... .... .... ....
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* GPIO Output: .... .... .... .... .... ....
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* Peripheral: .... ...E .... .... .... ....
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*/
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#define GPIO_SCHMITT_TRIGGER (1 << 16) /* Bit 16: Enable peripheral events */
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/* Output drive control
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*
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* MODE BITFIELDS
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* ------------ -----------------------------
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* 2222 1111 1111 1100 0000 0000
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* 3210 9876 5432 1098 7654 3210
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* ------------ -----------------------------
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* GPIO Input: .... .... .... .... .... ....
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* GPIO Output: .... .... DD.. .... .... ....
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* Peripheral: .... .... .... .... .... ....
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*/
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#define GPIO_DRIVE_SHIFT (14) /* Bits 14-15: Interrupting input control */
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#define GPIO_DRIVE_MASK (3 << GPIO_INT_SHIFT) /* Lowest drive strength*/
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# define GPIO_DRIVE_LOW (0 << GPIO_INT_SHIFT)
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# define GPIO_DRIVE_MEDLOW (1 << GPIO_INT_SHIFT)
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# define GPIO_DRIVE_MEDHIGH (2 << GPIO_INT_SHIFT)
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# define GPIO_DRIVE_HIGH (3 << GPIO_INT_SHIFT) /* Highest drive strength */
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/* Output slew rate control
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*
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* MODE BITFIELDS
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* ------------ -----------------------------
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* 2222 1111 1111 1100 0000 0000
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* 3210 9876 5432 1098 7654 3210
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* ------------ -----------------------------
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* GPIO Input: .... .... .... .... .... ....
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* GPIO Output: .... .... ..S. .... .... ....
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* Peripheral: .... .... .... .... .... ....
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*/
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#define GPIO_SLEW (1 << 13) /* Bit 13: Enable output slew control */
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/* If the pin is an GPIO output, then this identifies the initial output value:
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*
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* MODE BITFIELDS
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* ------------ -----------------------------
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* 2222 1111 1111 1100 0000 0000
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* 3210 9876 5432 1098 7654 3210
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* ------------ -----------------------------
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* GPIO Input: .... .... .... .... .... ....
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* GPIO Output: .... .... ...V .... .... ....
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* Peripheral: .... .... .... .... .... ....
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*/
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#define GPIO_OUTPUT_SET (1 << 12) /* Bit 12: Inital value of output */
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#define GPIO_OUTPUT_CLEAR (0)
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/* Selections for an interrupting input and peripheral events:
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*
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* MODE BITFIELDS
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* ------------ -----------------------------
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* 2222 1111 1111 1100 0000 0000
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* 3210 9876 5432 1098 7654 3210
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* ------------ -----------------------------
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* GPIO Input: .... .... .... II.. .... ....
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* GPIO Output: .... .... .... .... .... ....
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* Peripheral: .... .... .... II.. .... ....
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*/
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#define GPIO_INT_SHIFT (10) /* Bits 10-11: Interrupting input control */
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#define GPIO_INT_MASK (3 << GPIO_INT_SHIFT)
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# define GPIO_INT_CHANGE (0 << GPIO_INT_SHIFT) /* Pin change */
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# define GPIO_INT_RISING (1 << GPIO_INT_SHIFT) /* Rising edge */
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# define GPIO_INT_FALLING (2 << GPIO_INT_SHIFT) /* Falling edge */
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/* Enable input/periphal glitch filter
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*
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* MODE BITFIELDS
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* ------------ -----------------------------
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* 2222 1111 1111 1100 0000 0000
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* 3210 9876 5432 1098 7654 3210
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* ------------ -----------------------------
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* GPIO Input: .... .... .... ..G. .... ....
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* GPIO Output: .... .... .... .... .... ....
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* Peripheral: .... .... .... ..G. .... ....
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*/
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|
||||
#define GPIO_GLITCH_FILTER (1 << 9) /* Bit 9: Enable input/peripheral glitch filter */
|
||||
|
||||
/* Input Schmitt trigger
|
||||
*
|
||||
* MODE BITFIELDS
|
||||
* ------------ -----------------------------
|
||||
* 2222 1111 1111 1100 0000 0000
|
||||
* 3210 9876 5432 1098 7654 3210
|
||||
* ------------ -----------------------------
|
||||
* GPIO Input: .... .... .... ...T .... ....
|
||||
* GPIO Output: .... .... .... .... .... ....
|
||||
* Peripheral: .... .... .... .... .... ....
|
||||
*/
|
||||
|
||||
#define GPIO_SCHMITT_TRIGGER (1 << 8) /* Bit 8: Enable Input Schmitt trigger */
|
||||
|
||||
/* This identifies the GPIO port:
|
||||
*
|
||||
* MODE BITFIELDS
|
||||
* ------------ -----------------------------
|
||||
* 2222 1111 1111 1100 0000 0000
|
||||
* 3210 9876 5432 1098 7654 3210
|
||||
* ------------ -----------------------------
|
||||
* GPIO Input: .... .... .... .... .PP. ....
|
||||
* GPIO Output: .... .... .... .... .PP. ....
|
||||
* Peripheral: .... .... .... .... .PP. ....
|
||||
*/
|
||||
|
||||
#define GPIO_PORT_SHIFT (5) /* Bit 5-6: Port number */
|
||||
#define GPIO_PORT_MASK (3 << GPIO_PORT_SHIFT)
|
||||
# define GPIO_PORTA (0 << GPIO_PORT_SHIFT)
|
||||
# define GPIO_PORTB (1 << GPIO_PORT_SHIFT)
|
||||
# define GPIO_PORTC (2 << GPIO_PORT_SHIFT)
|
||||
|
||||
/* This identifies the bit in the port:
|
||||
*
|
||||
* MODE BITFIELDS
|
||||
* ------------ -----------------------------
|
||||
* 2222 1111 1111 1100 0000 0000
|
||||
* 3210 9876 5432 1098 7654 3210
|
||||
* ------------ -----------------------------
|
||||
* GPIO Input: .... .... .... .... ...B BBBB
|
||||
* GPIO Output: .... .... .... .... ...B BBBB
|
||||
* Peripheral: .... .... .... .... ...B BBBB
|
||||
*/
|
||||
|
||||
#define GPIO_PIN_SHIFT 0 /* Bits 0-4: GPIO number: 0-31 */
|
||||
#define GPIO_PIN_MASK (31 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN16 (16 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN17 (17 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN18 (18 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN19 (19 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN20 (20 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN21 (21 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN22 (22 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN23 (23 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN24 (24 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN25 (25 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN26 (26 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN27 (27 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN28 (28 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN29 (29 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN30 (30 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN31 (31 << GPIO_PIN_SHIFT)
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/* Must be big enough to hold the 24-bit encoding */
|
||||
|
||||
typedef uint32_t gpio_pinset_t;
|
||||
|
||||
/************************************************************************************
|
||||
* Inline Functions
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Function Prototypes
|
||||
************************************************************************************/
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_ARM_SRC_SAM34_SAM4L_GPIO_H */
|
||||
@ -81,7 +81,7 @@ static const char g_portchar[4] = { 'A', 'B', 'C', 'D' };
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline uintptr_t sam_gpiobase(uint16_t cfgset)
|
||||
static inline uintptr_t sam_gpiobase(gpio_pinset_t cfgset)
|
||||
{
|
||||
int port = (cfgset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
|
||||
return SAM_PION_BASE(port);
|
||||
@ -95,7 +95,7 @@ static inline uintptr_t sam_gpiobase(uint16_t cfgset)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline int sam_gpiopin(uint16_t cfgset)
|
||||
static inline int sam_gpiopin(gpio_pinset_t cfgset)
|
||||
{
|
||||
return 1 << ((cfgset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT);
|
||||
}
|
||||
@ -109,7 +109,7 @@ static inline int sam_gpiopin(uint16_t cfgset)
|
||||
****************************************************************************/
|
||||
|
||||
static inline int sam_configinput(uintptr_t base, uint32_t pin,
|
||||
uint16_t cfgset)
|
||||
gpio_pinset_t cfgset)
|
||||
{
|
||||
/* Disable interrupts on the pin */
|
||||
|
||||
@ -159,7 +159,7 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin,
|
||||
****************************************************************************/
|
||||
|
||||
static inline int sam_configoutput(uintptr_t base, uint32_t pin,
|
||||
uint16_t cfgset)
|
||||
gpio_pinset_t cfgset)
|
||||
{
|
||||
/* Disable interrupts on the pin */
|
||||
|
||||
@ -215,7 +215,7 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin,
|
||||
****************************************************************************/
|
||||
|
||||
static inline int sam_configperiph(uintptr_t base, uint32_t pin,
|
||||
uint16_t cfgset)
|
||||
gpio_pinset_t cfgset)
|
||||
{
|
||||
uint32_t regval;
|
||||
|
||||
@ -265,7 +265,7 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin,
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int sam_configgpio(uint16_t cfgset)
|
||||
int sam_configgpio(gpio_pinset_t cfgset)
|
||||
{
|
||||
uintptr_t base = sam_gpiobase(cfgset);
|
||||
uint32_t pin = sam_gpiopin(cfgset);
|
||||
@ -301,7 +301,7 @@ int sam_configgpio(uint16_t cfgset)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void sam_gpiowrite(uint16_t pinset, bool value)
|
||||
void sam_gpiowrite(gpio_pinset_t pinset, bool value)
|
||||
{
|
||||
uintptr_t base = sam_gpiobase(pinset);
|
||||
uint32_t pin = sam_gpiopin(pinset);
|
||||
@ -324,7 +324,7 @@ void sam_gpiowrite(uint16_t pinset, bool value)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
bool sam_gpioread(uint16_t pinset)
|
||||
bool sam_gpioread(gpio_pinset_t pinset)
|
||||
{
|
||||
uintptr_t base = sam_gpiobase(pinset);
|
||||
uint32_t pin = sam_gpiopin(pinset);
|
||||
|
||||
@ -47,6 +47,14 @@
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_SAM3U)
|
||||
# include "sam3u_gpio.h"
|
||||
#elif defined(CONFIG_ARCH_CHIP_SAM4L)
|
||||
# include "sam4l_gpio.h"
|
||||
#else
|
||||
# error Unrecognized SAM architecture
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Definitions
|
||||
************************************************************************************/
|
||||
@ -63,104 +71,6 @@
|
||||
# undef CONFIG_DEBUG_GPIO
|
||||
#endif
|
||||
|
||||
/* Bit-encoded input to sam_configgpio() ********************************************/
|
||||
|
||||
/* 16-bit Encoding:
|
||||
* MMCC CII. VPPB BBBB
|
||||
*/
|
||||
|
||||
/* Input/Output mode:
|
||||
*
|
||||
* MM.. .... .... ....
|
||||
*/
|
||||
|
||||
#define GPIO_MODE_SHIFT (14) /* Bits 14-15: GPIO mode */
|
||||
#define GPIO_MODE_MASK (3 << GPIO_MODE_SHIFT)
|
||||
# define GPIO_INPUT (0 << GPIO_MODE_SHIFT) /* Input */
|
||||
# define GPIO_OUTPUT (1 << GPIO_MODE_SHIFT) /* Output */
|
||||
# define GPIO_PERIPHA (2 << GPIO_MODE_SHIFT) /* Controlled by periph A signal */
|
||||
# define GPIO_PERIPHB (3 << GPIO_MODE_SHIFT) /* Controlled by periph B signal */
|
||||
|
||||
/* These bits set the configuration of the pin:
|
||||
* ..CC C... .... ....
|
||||
*/
|
||||
|
||||
#define GPIO_CFG_SHIFT (11) /* Bits 11-13: GPIO configuration bits */
|
||||
#define GPIO_CFG_MASK (7 << GPIO_CFG_SHIFT)
|
||||
# define GPIO_CFG_DEFAULT (0 << GPIO_CFG_SHIFT) /* Default, no attribute */
|
||||
# define GPIO_CFG_PULLUP (1 << GPIO_CFG_SHIFT) /* Bit 11: Internal pull-up */
|
||||
# define GPIO_CFG_DEGLITCH (2 << GPIO_CFG_SHIFT) /* Bit 12: Internal glitch filter */
|
||||
# define GPIO_CFG_OPENDRAIN (4 << GPIO_CFG_SHIFT) /* Bit 13: Open drain */
|
||||
|
||||
/* Additional interrupt modes:
|
||||
* .... .II. .... ....
|
||||
*/
|
||||
|
||||
#define GPIO_INT_SHIFT (9) /* Bits 9-10: GPIO configuration bits */
|
||||
#define GPIO_INT_MASK (3 << GPIO_INT_SHIFT)
|
||||
# define GPIO_INT_LEVEL (1 << 10) /* Bit 10: Level detection interrupt */
|
||||
# define GPIO_INT_EDGE (0) /* (vs. Edge detection interrupt) */
|
||||
# define GPIO_INT_HIGHLEVEL (1 << 9) /* Bit 9: High level detection interrupt */
|
||||
# define GPIO_INT_LOWLEVEL (0) /* (vs. Low level detection interrupt) */
|
||||
# define GPIO_INT_RISING (1 << 9) /* Bit 9: Rising edge detection interrupt */
|
||||
# define GPIO_INT_FALLING (0) /* (vs. Falling edge detection interrupt) */
|
||||
|
||||
/* If the pin is an GPIO output, then this identifies the initial output value:
|
||||
* .... .... V... ....
|
||||
*/
|
||||
|
||||
#define GPIO_OUTPUT_SET (1 << 7) /* Bit 7: Inital value of output */
|
||||
#define GPIO_OUTPUT_CLEAR (0)
|
||||
|
||||
/* This identifies the GPIO port:
|
||||
* .... .... .PP. ....
|
||||
*/
|
||||
|
||||
#define GPIO_PORT_SHIFT (5) /* Bit 5-6: Port number */
|
||||
#define GPIO_PORT_MASK (3 << GPIO_PORT_SHIFT)
|
||||
# define GPIO_PORT_PIOA (0 << GPIO_PORT_SHIFT)
|
||||
# define GPIO_PORT_PIOB (1 << GPIO_PORT_SHIFT)
|
||||
# define GPIO_PORT_PIOC (2 << GPIO_PORT_SHIFT)
|
||||
|
||||
/* This identifies the bit in the port:
|
||||
* .... .... ...B BBBB
|
||||
*/
|
||||
|
||||
#define GPIO_PIN_SHIFT 0 /* Bits 0-4: GPIO number: 0-31 */
|
||||
#define GPIO_PIN_MASK (31 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN16 (16 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN17 (17 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN18 (18 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN19 (19 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN20 (20 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN21 (21 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN22 (22 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN23 (23 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN24 (24 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN25 (25 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN26 (26 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN27 (27 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN28 (28 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN29 (29 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN30 (30 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN31 (31 << GPIO_PIN_SHIFT)
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
@ -210,7 +120,7 @@ void sam_gpioirqinitialize(void);
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
int sam_configgpio(uint16_t cfgset);
|
||||
int sam_configgpio(gpio_pinset_t cfgset);
|
||||
|
||||
/************************************************************************************
|
||||
* Name: sam_gpiowrite
|
||||
@ -220,7 +130,7 @@ int sam_configgpio(uint16_t cfgset);
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
void sam_gpiowrite(uint16_t pinset, bool value);
|
||||
void sam_gpiowrite(gpio_pinset_t pinset, bool value);
|
||||
|
||||
/************************************************************************************
|
||||
* Name: sam_gpioread
|
||||
@ -230,7 +140,7 @@ void sam_gpiowrite(uint16_t pinset, bool value);
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
bool sam_gpioread(uint16_t pinset);
|
||||
bool sam_gpioread(gpio_pinset_t pinset);
|
||||
|
||||
/************************************************************************************
|
||||
* Name: sam_gpioirq
|
||||
@ -241,7 +151,7 @@ bool sam_gpioread(uint16_t pinset);
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_GPIO_IRQ
|
||||
void sam_gpioirq(uint16_t pinset);
|
||||
void sam_gpioirq(gpio_pinset_t pinset);
|
||||
#else
|
||||
# define sam_gpioirq(pinset)
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user