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A10: Serial clock is OSC24M. From Alan Carvalho de Assis

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This commit is contained in:
Gregory Nutt 2014-01-10 15:32:42 -06:00
parent fc2ff5ad75
commit e37c12e88c
2 changed files with 12 additions and 6 deletions
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9
arch/arm/src/a1x/a1x_lowputc.c
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@ -150,10 +150,13 @@
#define CONSOLE_FCR_VALUE (UART_FCR_RT_HALF | UART_FCR_XFIFOR |\ #define CONSOLE_FCR_VALUE (UART_FCR_RT_HALF | UART_FCR_XFIFOR |\
UART_FCR_RFIFOR | UART_FCR_FIFOE) UART_FCR_RFIFOR | UART_FCR_FIFOE)
/* SCLK is the UART input clock */ /* SCLK is the UART input clock.
*
* Through experimentation, it has been found that the serial clock is
* OSC24M
*/
#define A1X_SCLK 0 #define A1X_SCLK 24000000
#warning What is the correct value of SCLK
/* The output baud rate is equal to the serial clock (SCLK) frequency divided /* The output baud rate is equal to the serial clock (SCLK) frequency divided
* by sixteen times the value of the baud rate divisor, as follows: * by sixteen times the value of the baud rate divisor, as follows:

9
arch/arm/src/a1x/a1x_serial.c
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@ -77,10 +77,13 @@
#if defined(USE_SERIALDRIVER) && defined(HAVE_UART_DEVICE) #if defined(USE_SERIALDRIVER) && defined(HAVE_UART_DEVICE)
/* SCLK is the UART input clock */ /* SCLK is the UART input clock.
*
* Through experimentation, it has been found that the serial clock is
* OSC24M
*/
#define A1X_SCLK 0 #define A1X_SCLK 24000000
#warning What is the correct value of SCLK
/**************************************************************************** /****************************************************************************
* Private Types * Private Types