From e393fa648a95196f0a09126f4fe42527e76aed94 Mon Sep 17 00:00:00 2001 From: patacongo Date: Tue, 5 Mar 2013 15:37:50 +0000 Subject: [PATCH] Updates to the LPC1788 SDIO support git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5709 42af7a65-404d-4744-a932-0658087f49c3 --- arch/arm/src/lpc17xx/Make.defs | 4 ++ arch/arm/src/lpc17xx/chip/lpc17_sdcard.h | 88 ++++++++++++------------ arch/arm/src/lpc17xx/lpc17_sdcard.c | 60 +++++++++------- configs/open1788/include/board.h | 37 ++++++++++ configs/open1788/nsh/defconfig | 13 +++- 5 files changed, 132 insertions(+), 70 deletions(-) diff --git a/arch/arm/src/lpc17xx/Make.defs b/arch/arm/src/lpc17xx/Make.defs index e89a256417..b7bf382795 100644 --- a/arch/arm/src/lpc17xx/Make.defs +++ b/arch/arm/src/lpc17xx/Make.defs @@ -115,6 +115,10 @@ ifeq ($(CONFIG_LPC17_GPDMA),y) CHIP_CSRCS += lpc17_gpdma.c endif +ifeq ($(CONFIG_LPC17_SDCARD),y) +CHIP_CSRCS += lpc17_sdcard.c +endif + ifeq ($(CONFIG_NET),y) ifeq ($(CONFIG_LPC17_ETHERNET),y) CHIP_CSRCS += lpc17_ethernet.c diff --git a/arch/arm/src/lpc17xx/chip/lpc17_sdcard.h b/arch/arm/src/lpc17xx/chip/lpc17_sdcard.h index ed92967061..c962e4f8d9 100644 --- a/arch/arm/src/lpc17xx/chip/lpc17_sdcard.h +++ b/arch/arm/src/lpc17xx/chip/lpc17_sdcard.h @@ -64,25 +64,25 @@ /* Register Addresses ***************************************************************/ -#define LPC17_SDCARD_PWR (LPC17_SDCARD_BASE+LPC17_SDCARD_PWR_OFFSET) -#define LPC17_SDCARD_CLOCK (LPC17_SDCARD_BASE+LPC17_SDCARD_CLOCK_OFFSET) -#define LPC17_SDCARD_ARG (LPC17_SDCARD_BASE+LPC17_SDCARD_ARG_OFFSET) -#define LPC17_SDCARD_CMD (LPC17_SDCARD_BASE+LPC17_SDCARD_CMD_OFFSET) -#define LPC17_SDCARD_RESPCMD (LPC17_SDCARD_BASE+LPC17_SDCARD_RESPCMD_OFFSET) -#define LPC17_SDCARD_RESP(n) (LPC17_SDCARD_BASE+LPC17_SDCARD_RESP_OFFSET(n)) -#define LPC17_SDCARD_RESP0 (LPC17_SDCARD_BASE+LPC17_SDCARD_RESP0_OFFSET) -#define LPC17_SDCARD_RESP1 (LPC17_SDCARD_BASE+LPC17_SDCARD_RESP1_OFFSET) -#define LPC17_SDCARD_RESP2 (LPC17_SDCARD_BASE+LPC17_SDCARD_RESP2_OFFSET) -#define LPC17_SDCARD_RESP3 (LPC17_SDCARD_BASE+LPC17_SDCARD_RESP3_OFFSET) -#define LPC17_SDCARD_DTIMER (LPC17_SDCARD_BASE+LPC17_SDCARD_DTIMER_OFFSET) -#define LPC17_SDCARD_DLEN (LPC17_SDCARD_BASE+LPC17_SDCARD_DLEN_OFFSET) -#define LPC17_SDCARD_DCTRL (LPC17_SDCARD_BASE+LPC17_SDCARD_DCTRL_OFFSET) -#define LPC17_SDCARD_DCOUNT (LPC17_SDCARD_BASE+LPC17_SDCARD_DCOUNT_OFFSET) -#define LPC17_SDCARD_STATUS (LPC17_SDCARD_BASE+LPC17_SDCARD_STATUS_OFFSET) -#define LPC17_SDCARD_CLEAR (LPC17_SDCARD_BASE+LPC17_SDCARD_CLEAR_OFFSET) -#define LPC17_SDCARD_MASK0 (LPC17_SDCARD_BASE+LPC17_SDCARD_MASK0_OFFSET) -#define LPC17_SDCARD_FIFOCNT (LPC17_SDCARD_BASE+LPC17_SDCARD_FIFOCNT_OFFSET) -#define LPC17_SDCARD_FIFO (LPC17_SDCARD_BASE+LPC17_SDCARD_FIFO_OFFSET) +#define LPC17_SDCARD_PWR (LPC17_MCI_BASE+LPC17_SDCARD_PWR_OFFSET) +#define LPC17_SDCARD_CLOCK (LPC17_MCI_BASE+LPC17_SDCARD_CLOCK_OFFSET) +#define LPC17_SDCARD_ARG (LPC17_MCI_BASE+LPC17_SDCARD_ARG_OFFSET) +#define LPC17_SDCARD_CMD (LPC17_MCI_BASE+LPC17_SDCARD_CMD_OFFSET) +#define LPC17_SDCARD_RESPCMD (LPC17_MCI_BASE+LPC17_SDCARD_RESPCMD_OFFSET) +#define LPC17_SDCARD_RESP(n) (LPC17_MCI_BASE+LPC17_SDCARD_RESP_OFFSET(n)) +#define LPC17_SDCARD_RESP0 (LPC17_MCI_BASE+LPC17_SDCARD_RESP0_OFFSET) +#define LPC17_SDCARD_RESP1 (LPC17_MCI_BASE+LPC17_SDCARD_RESP1_OFFSET) +#define LPC17_SDCARD_RESP2 (LPC17_MCI_BASE+LPC17_SDCARD_RESP2_OFFSET) +#define LPC17_SDCARD_RESP3 (LPC17_MCI_BASE+LPC17_SDCARD_RESP3_OFFSET) +#define LPC17_SDCARD_DTIMER (LPC17_MCI_BASE+LPC17_SDCARD_DTIMER_OFFSET) +#define LPC17_SDCARD_DLEN (LPC17_MCI_BASE+LPC17_SDCARD_DLEN_OFFSET) +#define LPC17_SDCARD_DCTRL (LPC17_MCI_BASE+LPC17_SDCARD_DCTRL_OFFSET) +#define LPC17_SDCARD_DCOUNT (LPC17_MCI_BASE+LPC17_SDCARD_DCOUNT_OFFSET) +#define LPC17_SDCARD_STATUS (LPC17_MCI_BASE+LPC17_SDCARD_STATUS_OFFSET) +#define LPC17_SDCARD_CLEAR (LPC17_MCI_BASE+LPC17_SDCARD_CLEAR_OFFSET) +#define LPC17_SDCARD_MASK0 (LPC17_MCI_BASE+LPC17_SDCARD_MASK0_OFFSET) +#define LPC17_SDCARD_FIFOCNT (LPC17_MCI_BASE+LPC17_SDCARD_FIFOCNT_OFFSET) +#define LPC17_SDCARD_FIFO (LPC17_MCI_BASE+LPC17_SDCARD_FIFO_OFFSET) /* Register Bitfield Definitions ****************************************************/ @@ -210,32 +210,32 @@ #define SDCARD_CLEAR_RESET 0x00c007ff #define SDCARD_CLEAR_STATICFLAGS 0x000005ff -#define SDCARD_MASK_CCRCFAILIE (1 << 0) /* Bit 0: Command CRC fail interrupt enable */ -#define SDCARD_MASK_DCRCFAILIE (1 << 1) /* Bit 1: Data CRC fail interrupt enable */ -#define SDCARD_MASK_CTIMEOUTIE (1 << 2) /* Bit 2: Command timeout interrupt enable */ -#define SDCARD_MASK_DTIMEOUTIE (1 << 3) /* Bit 3: Data timeout interrupt enable */ -#define SDCARD_MASK_TXUNDERRIE (1 << 4) /* Bit 4: Tx FIFO underrun error interrupt enable */ -#define SDCARD_MASK_RXOVERRIE (1 << 5) /* Bit 5: Rx FIFO overrun error interrupt enable */ -#define SDCARD_MASK_CMDRENDIE (1 << 6) /* Bit 6: Command response received interrupt enable */ -#define SDCARD_MASK_CMDSENTIE (1 << 7) /* Bit 7: Command sent interrupt enable */ -#define SDCARD_MASK_DATAENDIE (1 << 8) /* Bit 8: Data end interrupt enable */ -#define SDCARD_MASK_STBITERRIE (1 << 9) /* Bit 9: Start bit error interrupt enable */ -#define SDCARD_MASK_DBCKENDIE (1 << 10) /* Bit 10: Data block end interrupt enable */ -#define SDCARD_MASK_CMDACTIE (1 << 11) /* Bit 11: Command acting interrupt enable */ -#define SDCARD_MASK_TXACTIE (1 << 12) /* Bit 12: Data transmit acting interrupt enable */ -#define SDCARD_MASK_RXACTIE (1 << 13) /* Bit 13: Data receive acting interrupt enable */ -#define SDCARD_MASK_TXFIFOHEIE (1 << 14) /* Bit 14: Tx FIFO half empty interrupt enable */ -#define SDCARD_MASK_RXFIFOHFIE (1 << 15) /* Bit 15: Rx FIFO half full interrupt enable */ -#define SDCARD_MASK_TXFIFOFIE (1 << 16) /* Bit 16: Tx FIFO full interrupt enable */ -#define SDCARD_MASK_RXFIFOFIE (1 << 17) /* Bit 17: Rx FIFO full interrupt enable */ -#define SDCARD_MASK_TXFIFOEIE (1 << 18) /* Bit 18: Tx FIFO empty interrupt enable */ -#define SDCARD_MASK_RXFIFOEIE (1 << 19) /* Bit 19: Rx FIFO empty interrupt enable */ -#define SDCARD_MASK_TXDAVLIE (1 << 20) /* Bit 20: Data available in Tx FIFO interrupt enable */ -#define SDCARD_MASK_RXDAVLIE (1 << 21) /* Bit 21: Data available in Rx FIFO interrupt enable */ -#define SDCARD_MASK_SDIOITIE (1 << 22) /* Bit 22: SDIO mode interrupt received interrupt enable */ -#define SDCARD_MASK_CEATAENDIE (1 << 23) /* Bit 23: CE-ATA command completion interrupt enable */ +#define SDCARD_MASK0_CCRCFAILIE (1 << 0) /* Bit 0: Command CRC fail interrupt enable */ +#define SDCARD_MASK0_DCRCFAILIE (1 << 1) /* Bit 1: Data CRC fail interrupt enable */ +#define SDCARD_MASK0_CTIMEOUTIE (1 << 2) /* Bit 2: Command timeout interrupt enable */ +#define SDCARD_MASK0_DTIMEOUTIE (1 << 3) /* Bit 3: Data timeout interrupt enable */ +#define SDCARD_MASK0_TXUNDERRIE (1 << 4) /* Bit 4: Tx FIFO underrun error interrupt enable */ +#define SDCARD_MASK0_RXOVERRIE (1 << 5) /* Bit 5: Rx FIFO overrun error interrupt enable */ +#define SDCARD_MASK0_CMDRENDIE (1 << 6) /* Bit 6: Command response received interrupt enable */ +#define SDCARD_MASK0_CMDSENTIE (1 << 7) /* Bit 7: Command sent interrupt enable */ +#define SDCARD_MASK0_DATAENDIE (1 << 8) /* Bit 8: Data end interrupt enable */ +#define SDCARD_MASK0_STBITERRIE (1 << 9) /* Bit 9: Start bit error interrupt enable */ +#define SDCARD_MASK0_DBCKENDIE (1 << 10) /* Bit 10: Data block end interrupt enable */ +#define SDCARD_MASK0_CMDACTIE (1 << 11) /* Bit 11: Command acting interrupt enable */ +#define SDCARD_MASK0_TXACTIE (1 << 12) /* Bit 12: Data transmit acting interrupt enable */ +#define SDCARD_MASK0_RXACTIE (1 << 13) /* Bit 13: Data receive acting interrupt enable */ +#define SDCARD_MASK0_TXFIFOHEIE (1 << 14) /* Bit 14: Tx FIFO half empty interrupt enable */ +#define SDCARD_MASK0_RXFIFOHFIE (1 << 15) /* Bit 15: Rx FIFO half full interrupt enable */ +#define SDCARD_MASK0_TXFIFOFIE (1 << 16) /* Bit 16: Tx FIFO full interrupt enable */ +#define SDCARD_MASK0_RXFIFOFIE (1 << 17) /* Bit 17: Rx FIFO full interrupt enable */ +#define SDCARD_MASK0_TXFIFOEIE (1 << 18) /* Bit 18: Tx FIFO empty interrupt enable */ +#define SDCARD_MASK0_RXFIFOEIE (1 << 19) /* Bit 19: Rx FIFO empty interrupt enable */ +#define SDCARD_MASK0_TXDAVLIE (1 << 20) /* Bit 20: Data available in Tx FIFO interrupt enable */ +#define SDCARD_MASK0_RXDAVLIE (1 << 21) /* Bit 21: Data available in Rx FIFO interrupt enable */ +#define SDCARD_MASK0_SDIOITIE (1 << 22) /* Bit 22: SDIO mode interrupt received interrupt enable */ +#define SDCARD_MASK0_CEATAENDIE (1 << 23) /* Bit 23: CE-ATA command completion interrupt enable */ -#define SDCARD_MASK_RESET (0) +#define SDCARD_MASK0_RESET (0) #define SDCARD_FIFOCNT_SHIFT (0) #define SDCARD_FIFOCNT_MASK (0x01ffffff << SDCARD_FIFOCNT_SHIFT) diff --git a/arch/arm/src/lpc17xx/lpc17_sdcard.c b/arch/arm/src/lpc17xx/lpc17_sdcard.c index 7abdbad1c4..ae37a1a4fb 100644 --- a/arch/arm/src/lpc17xx/lpc17_sdcard.c +++ b/arch/arm/src/lpc17xx/lpc17_sdcard.c @@ -60,9 +60,12 @@ #include "chip.h" #include "up_arch.h" -#include "lpc17_dma.h" +#include "lpc17_gpdma.h" +#include "lpc17_gpio.h" #include "lpc17_sdcard.h" +#include "chip/lpc17_pinconfig.h" + #if CONFIG_LPC17_SDCARD /**************************************************************************** @@ -74,7 +77,7 @@ * * CONFIG_ARCH_DMA - Enable architecture-specific DMA subsystem * initialization. Required if CONFIG_SDIO_DMA is enabled. - * CONFIG_LPC17_GPDMA - Enable LPC17XX DMA2 support. Required if + * CONFIG_LPC17_GPDMA - Enable LPC17XX GPDMA support. Required if * CONFIG_SDIO_DMA is enabled * CONFIG_SCHED_WORKQUEUE -- Callback support requires work queue support. * @@ -1432,11 +1435,16 @@ static void lpc17_reset(FAR struct sdio_dev_s *dev) { FAR struct lpc17_dev_s *priv = (FAR struct lpc17_dev_s *)dev; irqstate_t flags; + uint32_t regval; /* Disable clocking */ flags = irqsave(); - putreg32(0, SDCARD_CLOCK_CLKEN_BB); + + regval = getreg32(LPC17_SDCARD_CLOCK); + regval &= ~SDCARD_CLOCK_CLKEN; + putreg32(regval, LPC17_SDCARD_CLOCK); + lpc17_setpwrctrl(SDCARD_PWR_CTRL_OFF); /* Put SD card registers in their default, reset state */ @@ -1544,7 +1552,7 @@ static void lpc17_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate) /* Disable clocking (with default ID mode divisor) */ default: - case CLOCK_SDCARD_DISABLED: + case CLOCK_SDIO_DISABLED: clock = LPC17_CLCKCR_INIT; return; @@ -1600,7 +1608,7 @@ static int lpc17_attach(FAR struct sdio_dev_s *dev) /* Attach the SD card interrupt handler */ - ret = irq_attach(LPC17_IRQ_SDCARD, lpc17_interrupt); + ret = irq_attach(LPC17_IRQ_MCI, lpc17_interrupt); if (ret == OK) { @@ -1615,11 +1623,7 @@ static int lpc17_attach(FAR struct sdio_dev_s *dev) * the SD card controller as needed. */ - up_enable_irq(LPC17_IRQ_SDCARD); - - /* Set the interrrupt priority */ - - up_prioritize_irq(LPC17_IRQ_SDCARD, CONFIG_SDCARD_PRI); + up_enable_irq(LPC17_IRQ_MCI); } return ret; @@ -2080,7 +2084,7 @@ static int lpc17_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlo rlong[0] = getreg32(LPC17_SDCARD_RESP0); rlong[1] = getreg32(LPC17_SDCARD_RESP1); rlong[2] = getreg32(LPC17_SDCARD_RESP2); - rlong[3] = getreg32(LPC17_SDCARD_RESP4); + rlong[3] = getreg32(LPC17_SDCARD_RESP3); } return ret; } @@ -2426,6 +2430,7 @@ static int lpc17_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer, { struct lpc17_dev_s *priv = (struct lpc17_dev_s *)dev; uint32_t dblocksize; + uint32_t regval; int ret = -EINVAL; DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0); @@ -2457,7 +2462,10 @@ static int lpc17_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer, lpc17_configxfrints(priv, SDCARD_DMARECV_MASK); - putreg32(1, SDCARD_DCTRL_DMAEN_BB); + regval = getreg32(LPC17_SDCARD_DCTRL); + regval |= SDCARD_DCTRL_DMAEN; + putreg32(regval, LPC17_SDCARD_DCTRL); + lpc17_dmasetup(priv->dma, LPC17_SDCARD_FIFO, (uint32_t)buffer, (buflen + 3) >> 2, SDCARD_RXDMA32_CONFIG); @@ -2498,6 +2506,7 @@ static int lpc17_dmasendsetup(FAR struct sdio_dev_s *dev, { struct lpc17_dev_s *priv = (struct lpc17_dev_s *)dev; uint32_t dblocksize; + uint32_t regval; int ret = -EINVAL; DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0); @@ -2531,7 +2540,10 @@ static int lpc17_dmasendsetup(FAR struct sdio_dev_s *dev, (buflen + 3) >> 2, SDCARD_TXDMA32_CONFIG); lpc17_sample(priv, SAMPLENDX_BEFORE_ENABLE); - putreg32(1, SDCARD_DCTRL_DMAEN_BB); + + regval = getreg32(LPC17_SDCARD_DCTRL); + regval |= SDCARD_DCTRL_DMAEN; + putreg32(regval, LPC17_SDCARD_DCTRL); /* Start the DMA */ @@ -2579,7 +2591,7 @@ static void lpc17_callback(void *arg) { /* Yes.. Check for enabled callback events */ - if ((priv->cdstatus & SDCARD_STATUS_PRESENT) != 0) + if ((priv->cdstatus & SDIO_STATUS_PRESENT) != 0) { /* Media is present. Is the media inserted event enabled? */ @@ -2696,14 +2708,14 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno) */ #ifndef CONFIG_SDIO_MUXBUS - lpc17_configgpio(GPIO_SDCARD_D0); + lpc17_configgpio(GPIO_SD_DAT0); #ifndef CONFIG_SDIO_WIDTH_D1_ONLY - lpc17_configgpio(GPIO_SDCARD_D1); - lpc17_configgpio(GPIO_SDCARD_D2); - lpc17_configgpio(GPIO_SDCARD_D3); + lpc17_configgpio(GPIO_SD_DAT1); + lpc17_configgpio(GPIO_SD_DAT2); + lpc17_configgpio(GPIO_SD_DAT3); #endif - lpc17_configgpio(GPIO_SDCARD_CK); - lpc17_configgpio(GPIO_SDCARD_CMD); + lpc17_configgpio(GPIO_SD_CLK); + lpc17_configgpio(GPIO_SD_CMD); #endif /* Reset the card and assure that it is in the initial, unconfigured @@ -2745,11 +2757,11 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot) cdstatus = priv->cdstatus; if (cardinslot) { - priv->cdstatus |= SDCARD_STATUS_PRESENT; + priv->cdstatus |= SDIO_STATUS_PRESENT; } else { - priv->cdstatus &= ~SDCARD_STATUS_PRESENT; + priv->cdstatus &= ~SDIO_STATUS_PRESENT; } fvdbg("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus); @@ -2788,11 +2800,11 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect) flags = irqsave(); if (wrprotect) { - priv->cdstatus |= SDCARD_STATUS_WRPROTECTED; + priv->cdstatus |= SDIO_STATUS_WRPROTECTED; } else { - priv->cdstatus &= ~SDCARD_STATUS_WRPROTECTED; + priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED; } fvdbg("cdstatus: %02x\n", priv->cdstatus); irqrestore(flags); diff --git a/configs/open1788/include/board.h b/configs/open1788/include/board.h index 7a6fd0e078..5ed6b1a453 100644 --- a/configs/open1788/include/board.h +++ b/configs/open1788/include/board.h @@ -142,6 +142,36 @@ #define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV20 +/* SDIO dividers. Note that slower clocking is required when DMA is disabled + * in order to avoid RX overrun/TX underrun errors due to delayed responses + * to service FIFOs in interrupt driven mode. These values have not been + * tuned!!! + * + * SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(118+2)=400 KHz + */ + +#define SDCARD_INIT_CLKDIV (118 << SDCARD_CLOCK_CLKDIV_SHIFT) + +/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz + * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDCARD_MMCXFR_CLKDIV (1 << SDCARD_CLOCK_CLKDIV_SHIFT) +#else +# define SDCARD_MMCXFR_CLKDIV (2 << SDCARD_CLOCK_CLKDIV_SHIFT) +#endif + +/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz + * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDCARD_SDXFR_CLKDIV (1 << SDCARD_CLOCK_CLKDIV_SHIFT) +#else +# define SDCARD_SDXFR_CLKDIV (2 << SDCARD_CLOCK_CLKDIV_SHIFT) +#endif + /* Set EMC delay values: * * CMDDLY: Programmable delay value for EMC outputs in command delayed @@ -261,6 +291,13 @@ #define GPIO_UART0_TXD GPIO_UART0_TXD_2 #define GPIO_UART0_RXD GPIO_UART0_RXD_2 +#define GPIO_SD_DAT0 GPIO_SD_DAT0_1 /* REVISIT */ +#define GPIO_SD_DAT1 GPIO_SD_DAT1_1 +#define GPIO_SD_DAT2 GPIO_SD_DAT2_1 +#define GPIO_SD_DAT3 GPIO_SD_DAT3_1 +#define GPIO_SD_CLK GPIO_SD_CLK_1 +#define GPIO_SD_CMD GPIO_SD_CMD_1 + /************************************************************************************ * Public Types ************************************************************************************/ diff --git a/configs/open1788/nsh/defconfig b/configs/open1788/nsh/defconfig index c04baba607..b17b8386eb 100644 --- a/configs/open1788/nsh/defconfig +++ b/configs/open1788/nsh/defconfig @@ -118,6 +118,7 @@ CONFIG_ARMV7M_OABI_TOOLCHAIN=y # CONFIG_ARCH_CHIP_LPC1787 is not set CONFIG_ARCH_CHIP_LPC1788=y CONFIG_ARCH_FAMILY_LPC178X=y +CONFIG_ARCH_HAVE_SDIO=y # # LPC17xx Peripheral Support @@ -129,6 +130,7 @@ CONFIG_LPC17_PLL1=y # CONFIG_LPC17_ETHERNET is not set # CONFIG_LPC17_USBHOST is not set # CONFIG_LPC17_USBDEV is not set +# CONFIG_LPC17_SDCARD is not set CONFIG_LPC17_UART0=y # CONFIG_LPC17_UART1 is not set # CONFIG_LPC17_UART2 is not set @@ -154,7 +156,7 @@ CONFIG_LPC17_UART0=y # CONFIG_LPC17_WDT is not set # CONFIG_LPC17_ADC is not set # CONFIG_LPC17_DAC is not set -# CONFIG_LPC17_GPDMA is not set +CONFIG_LPC17_GPDMA=y # CONFIG_LPC17_FLASH is not set # @@ -255,6 +257,7 @@ CONFIG_ARCH_HAVE_BUTTONS=y # CONFIG_ARCH_BUTTONS is not set CONFIG_ARCH_HAVE_IRQBUTTONS=y CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 # # Board-Specific Options @@ -342,7 +345,13 @@ CONFIG_LOOP=y CONFIG_BCH=y # CONFIG_INPUT is not set # CONFIG_LCD is not set -# CONFIG_MMCSD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +# CONFIG_MMCSD_SDIO is not set # CONFIG_MTD is not set CONFIG_PIPES=y # CONFIG_PM is not set