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arch/ assertions files: up_registerdump capture the general register if not yet saved and up_saveusercontext is implemented, the register dump is very useful to find the cause of failure.

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This commit is contained in:
Xiang Xiao 2018-11-11 12:50:50 -06:00 committed by Gregory Nutt
parent 084904c40b
commit e4106a3744
16 changed files with 395 additions and 210 deletions
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40
arch/arm/src/arm/up_assert.c
View File

@ -72,6 +72,14 @@
# define CONFIG_BOARD_RESET_ON_ASSERT 0
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_ARCH_STACKDUMP
static uint32_t s_last_regs[XCPTCONTEXT_REGS];
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
@ -121,24 +129,30 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
#ifdef CONFIG_ARCH_STACKDUMP
static inline void up_registerdump(void)
{
volatile uint32_t *regs = CURRENT_REGS;
int reg;
/* Are user registers available from interrupt processing? */
if (CURRENT_REGS)
if (regs == NULL)
{
int regs;
/* No.. capture user registers by hand */
/* Yes.. dump the interrupt registers */
for (regs = REG_R0; regs <= REG_R15; regs += 8)
{
uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs];
_alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
_alert("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
up_saveusercontext(s_last_regs);
regs = s_last_regs;
}
/* Dump the interrupt registers */
for (reg = REG_R0; reg <= REG_R15; reg += 8)
{
uint32_t *ptr = (uint32_t *)&regs[reg];
_alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
reg, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
_alert("CPSR: %08x\n", regs[REG_CPSR]);
}
#else
# define up_registerdump()

50
arch/arm/src/armv6-m/up_assert.c
View File

@ -70,6 +70,14 @@
# define CONFIG_BOARD_RESET_ON_ASSERT 0
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_ARCH_STACKDUMP
static uint32_t s_last_regs[XCPTCONTEXT_REGS];
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
@ -155,31 +163,33 @@ static inline void up_showtasks(void)
#ifdef CONFIG_ARCH_STACKDUMP
static inline void up_registerdump(void)
{
volatile uint32_t *regs = CURRENT_REGS;
/* Are user registers available from interrupt processing? */
if (CURRENT_REGS)
if (regs == NULL)
{
/* Yes.. dump the interrupt registers */
/* No.. capture user registers by hand */
_alert("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1],
CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3],
CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5],
CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]);
_alert("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9],
CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
#ifdef CONFIG_BUILD_PROTECTED
_alert("xPSR: %08x PRIMASK: %08x EXEC_RETURN: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
#else
_alert("xPSR: %08x PRIMASK: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
#endif
up_saveusercontext(s_last_regs);
regs = s_last_regs;
}
/* Dump the interrupt registers */
_alert("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
_alert("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
#ifdef CONFIG_BUILD_PROTECTED
_alert("xPSR: %08x PRIMASK: %08x EXEC_RETURN: %08x\n",
regs[REG_XPSR], regs[REG_PRIMASK], regs[REG_EXC_RETURN]);
#else
_alert("xPSR: %08x PRIMASK: %08x\n",
regs[REG_XPSR], regs[REG_PRIMASK]);
#endif
}
#else
# define up_registerdump()

41
arch/arm/src/armv7-a/arm_assert.c
View File

@ -73,6 +73,14 @@
# define CONFIG_BOARD_RESET_ON_ASSERT 0
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_ARCH_STACKDUMP
static uint32_t s_last_regs[XCPTCONTEXT_REGS];
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
@ -158,24 +166,31 @@ static inline void up_showtasks(void)
#ifdef CONFIG_ARCH_STACKDUMP
static inline void up_registerdump(void)
{
volatile uint32_t *regs = CURRENT_REGS;
int reg;
/* Are user registers available from interrupt processing? */
if (CURRENT_REGS)
if (regs == NULL)
{
int regs;
/* No.. capture user registers by hand */
/* Yes.. dump the interrupt registers */
for (regs = REG_R0; regs <= REG_R15; regs += 8)
{
uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs];
_alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
_alert("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
up_saveusercontext(s_last_regs);
regs = s_last_regs;
}
/* Dump the interrupt registers */
for (reg = REG_R0; reg <= REG_R15; reg += 8)
{
uint32_t *ptr = (uint32_t *)&regs[reg];
_alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
reg, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
_alert("CPSR: %08x\n", regs[REG_CPSR]);
}
#else
# define up_registerdump()

49
arch/arm/src/armv7-m/up_assert.c
View File

@ -73,6 +73,14 @@
# define CONFIG_BOARD_RESET_ON_ASSERT 0
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_ARCH_STACKDUMP
static uint32_t s_last_regs[XCPTCONTEXT_REGS];
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
@ -158,37 +166,38 @@ static inline void up_showtasks(void)
#ifdef CONFIG_ARCH_STACKDUMP
static inline void up_registerdump(void)
{
volatile uint32_t *regs = CURRENT_REGS;
/* Are user registers available from interrupt processing? */
if (CURRENT_REGS)
if (regs == NULL)
{
/* Yes.. dump the interrupt registers */
/* No.. capture user registers by hand */
_alert("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1],
CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3],
CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5],
CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]);
_alert("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9],
CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
up_saveusercontext(s_last_regs);
regs = s_last_regs;
}
/* Dump the interrupt registers */
_alert("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
_alert("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
#ifdef CONFIG_ARMV7M_USEBASEPRI
_alert("xPSR: %08x BASEPRI: %08x CONTROL: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
getcontrol());
_alert("xPSR: %08x BASEPRI: %08x CONTROL: %08x\n",
regs[REG_XPSR], regs[REG_BASEPRI], getcontrol());
#else
_alert("xPSR: %08x PRIMASK: %08x CONTROL: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
getcontrol());
_alert("xPSR: %08x PRIMASK: %08x CONTROL: %08x\n",
regs[REG_XPSR], regs[REG_PRIMASK], getcontrol());
#endif
#ifdef REG_EXC_RETURN
_alert("EXC_RETURN: %08x\n", CURRENT_REGS[REG_EXC_RETURN]);
_alert("EXC_RETURN: %08x\n", regs[REG_EXC_RETURN]);
#endif
}
}
#else
# define up_registerdump()

40
arch/arm/src/armv7-r/arm_assert.c
View File

@ -70,6 +70,14 @@
# define CONFIG_BOARD_RESET_ON_ASSERT 0
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_ARCH_STACKDUMP
static uint32_t s_last_regs[XCPTCONTEXT_REGS];
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
@ -155,24 +163,30 @@ static inline void up_showtasks(void)
#ifdef CONFIG_ARCH_STACKDUMP
static inline void up_registerdump(void)
{
volatile uint32_t *regs = CURRENT_REGS;
int reg;
/* Are user registers available from interrupt processing? */
if (CURRENT_REGS)
if (regs == NULL)
{
int regs;
/* No.. capture user registers by hand */
/* Yes.. dump the interrupt registers */
for (regs = REG_R0; regs <= REG_R15; regs += 8)
{
uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs];
_alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
_alert("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
up_saveusercontext(s_last_regs);
regs = s_last_regs;
}
/* Dump the interrupt registers */
for (reg = REG_R0; reg <= REG_R15; reg += 8)
{
uint32_t *ptr = (uint32_t *)&regs[reg];
_alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
reg, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
_alert("CPSR: %08x\n", regs[REG_CPSR]);
}
#else
# define up_registerdump()

47
arch/hc/src/m9s12/m9s12_assert.c
View File

@ -70,6 +70,14 @@
# define CONFIG_BOARD_RESET_ON_ASSERT 0
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_ARCH_STACKDUMP
static uint8_t s_last_regs[XCPTCONTEXT_REGS];
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
@ -103,33 +111,40 @@ static void up_stackdump(uint16_t sp, uint16_t stack_base)
#ifdef CONFIG_ARCH_STACKDUMP
static inline void up_registerdump(void)
{
volatile uint8_t *regs = g_current_regs;
/* Are user registers available from interrupt processing? */
if (g_current_regs)
if (regs == NULL)
{
_alert("A:%02x B:%02x X:%02x%02x Y:%02x%02x PC:%02x%02x CCR:%02x\n",
g_current_regs[REG_A], g_current_regs[REG_B], g_current_regs[REG_XH],
g_current_regs[REG_XL], g_current_regs[REG_YH], g_current_regs[REG_YL],
g_current_regs[REG_PCH], g_current_regs[REG_PCL], g_current_regs[REG_CCR]);
_alert("SP:%02x%02x FRAME:%02x%02x TMP:%02x%02x Z:%02x%02x XY:%02x\n",
g_current_regs[REG_SPH], g_current_regs[REG_SPL],
g_current_regs[REG_FRAMEH], g_current_regs[REG_FRAMEL],
g_current_regs[REG_TMPL], g_current_regs[REG_TMPH], g_current_regs[REG_ZL],
g_current_regs[REG_ZH], g_current_regs[REG_XY], g_current_regs[REG_XY+1]);
/* No.. capture user registers by hand */
up_saveusercontext(s_last_regs);
regs = s_last_regs;
}
_alert("A:%02x B:%02x X:%02x%02x Y:%02x%02x PC:%02x%02x CCR:%02x\n",
regs[REG_A], regs[REG_B], regs[REG_XH], regs[REG_XL],
regs[REG_YH], regs[REG_YL], regs[REG_PCH], regs[REG_PCL],
regs[REG_CCR]);
_alert("SP:%02x%02x FRAME:%02x%02x TMP:%02x%02x Z:%02x%02x XY:%02x\n",
regs[REG_SPH], regs[REG_SPL], regs[REG_FRAMEH], regs[REG_FRAMEL],
regs[REG_TMPL], regs[REG_TMPH], regs[REG_ZL], regs[REG_ZH],
regs[REG_XY], regs[REG_XY+1]);
#if CONFIG_HCS12_MSOFTREGS > 2
# error "Need to save more registers"
#elif CONFIG_HCS12_MSOFTREGS == 2
_alert("SOFTREGS: %02x%02x :%02x%02x\n",
g_current_regs[REG_SOFTREG1], g_current_regs[REG_SOFTREG1+1],
g_current_regs[REG_SOFTREG2], g_current_regs[REG_SOFTREG2+1]);
_alert("SOFTREGS: %02x%02x :%02x%02x\n",
regs[REG_SOFTREG1], regs[REG_SOFTREG1+1],
regs[REG_SOFTREG2], regs[REG_SOFTREG2+1]);
#elif CONFIG_HCS12_MSOFTREGS == 1
_alert("SOFTREGS: %02x%02x\n", g_current_regs[REG_SOFTREG1],
g_current_regs[REG_SOFTREG1+1]);
_alert("SOFTREGS: %02x%02x\n",
regs[REG_SOFTREG1], regs[REG_SOFTREG1+1]);
#endif
#ifndef CONFIG_HCS12_NONBANKED
_alert("PPAGE: %02x\n", g_current_regs[REG_PPAGE],);
_alert("PPAGE: %02x\n", regs[REG_PPAGE]);
#endif
}
}

50
arch/or1k/src/common/up_assert.c
View File

@ -69,6 +69,14 @@
# define CONFIG_BOARD_RESET_ON_ASSERT 0
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_ARCH_STACKDUMP
static uint32_t s_last_regs[XCPTCONTEXT_REGS];
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
@ -160,31 +168,33 @@ static inline void up_showtasks(void)
#ifdef CONFIG_ARCH_STACKDUMP
static inline void up_registerdump(void)
{
volatile uint32_t *regs = CURRENT_REGS;
/* Are user registers available from interrupt processing? */
if (CURRENT_REGS)
if (regs == NULL)
{
/* Yes.. dump the interrupt registers */
/* No.. capture user registers by hand */
_alert("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1],
CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3],
CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5],
CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]);
_alert("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9],
CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
#ifdef CONFIG_BUILD_PROTECTED
_alert("xPSR: %08x PRIMASK: %08x EXEC_RETURN: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
#else
_alert("xPSR: %08x PRIMASK: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
#endif
up_saveusercontext(s_last_regs);
regs = s_last_regs;
}
/* Dump the interrupt registers */
_alert("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
_alert("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
#ifdef CONFIG_BUILD_PROTECTED
_alert("xPSR: %08x PRIMASK: %08x EXEC_RETURN: %08x\n",
regs[REG_XPSR], regs[REG_PRIMASK], regs[REG_EXC_RETURN]);
#else
_alert("xPSR: %08x PRIMASK: %08x\n",
regs[REG_XPSR], regs[REG_PRIMASK]);
#endif
}
#else
# define up_registerdump()

38
arch/renesas/src/m16c/m16c_dumpstate.c
View File

@ -52,6 +52,12 @@
#ifdef CONFIG_ARCH_STACKDUMP
/****************************************************************************
* Private Data
****************************************************************************/
static uint8_t s_last_regs[XCPTCONTEXT_REGS];
/****************************************************************************
* Private Functions
****************************************************************************/
@ -112,23 +118,27 @@ static inline void m16c_registerdump(void)
/* Are user registers available from interrupt processing? */
if (ptr)
if (ptr == NULL)
{
/* Yes.. dump the interrupt registers */
_alert("PC: %02x%02x%02x FLG: %02x00%02x FB: %02x%02x SB: %02x%02x SP: %02x%02x\n",
ptr[REG_FLGPCHI] & 0xff, ptr[REG_PC], ptr[REG_PC+1],
ptr[REG_FLGPCHI] >> 8, ptr[REG_FLG],
ptr[REG_FB], ptr[REG_FB+1],
ptr[REG_SB], ptr[REG_SB+1],
ptr[REG_SP], ptr[REG_SP+1]);
_alert("R0: %02x%02x R1: %02x%02x R2: %02x%02x A0: %02x%02x A1: %02x%02x\n",
ptr[REG_R0], ptr[REG_R0+1], ptr[REG_R1], ptr[REG_R1+1],
ptr[REG_R2], ptr[REG_R2+1], ptr[REG_R3], ptr[REG_R3+1],
ptr[REG_A0], ptr[REG_A0+1], ptr[REG_A1], ptr[REG_A1+1]);
/* No.. capture user registers by hand */
up_saveusercontext((uint32_t *)s_last_regs);
regs = s_last_regs;
}
/* Dump the interrupt registers */
_alert("PC: %02x%02x%02x FLG: %02x00%02x FB: %02x%02x SB: %02x%02x SP: %02x%02x\n",
ptr[REG_FLGPCHI] & 0xff, ptr[REG_PC], ptr[REG_PC+1],
ptr[REG_FLGPCHI] >> 8, ptr[REG_FLG],
ptr[REG_FB], ptr[REG_FB+1],
ptr[REG_SB], ptr[REG_SB+1],
ptr[REG_SP], ptr[REG_SP+1]);
_alert("R0: %02x%02x R1: %02x%02x R2: %02x%02x A0: %02x%02x A1: %02x%02x\n",
ptr[REG_R0], ptr[REG_R0+1], ptr[REG_R1], ptr[REG_R1+1],
ptr[REG_R2], ptr[REG_R2+1], ptr[REG_R3], ptr[REG_R3+1],
ptr[REG_A0], ptr[REG_A0+1], ptr[REG_A1], ptr[REG_A1+1]);
}
/****************************************************************************

41
arch/renesas/src/sh1/sh1_dumpstate.c
View File

@ -51,6 +51,12 @@
#ifdef CONFIG_ARCH_STACKDUMP
/****************************************************************************
* Private Data
****************************************************************************/
static uint32_t s_last_regs[XCPTCONTEXT_REGS];
/****************************************************************************
* Private Functions
****************************************************************************/
@ -100,24 +106,29 @@ static inline void sh1_registerdump(void)
/* Are user registers available from interrupt processing? */
if (ptr)
if (ptr == NULL)
{
/* Yes.. dump the interrupt registers */
/* No.. capture user registers by hand */
_alert("PC: %08x SR=%08x\n",
ptr[REG_PC], ptr[REG_SR]);
_alert("PR: %08x GBR: %08x MACH: %08x MACL: %08x\n",
ptr[REG_PR], ptr[REG_GBR], ptr[REG_MACH], ptr[REG_MACL]);
_alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", 0,
ptr[REG_R0], ptr[REG_R1], ptr[REG_R2], ptr[REG_R3],
ptr[REG_R4], ptr[REG_R5], ptr[REG_R6], ptr[REG_R7]);
_alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", 8,
ptr[REG_R8], ptr[REG_R9], ptr[REG_R10], ptr[REG_R11],
ptr[REG_R12], ptr[REG_R13], ptr[REG_R14], ptr[REG_R15]);
up_saveusercontext(s_last_regs);
regs = s_last_regs;
}
/* Dump the interrupt registers */
_alert("PC: %08x SR=%08x\n",
ptr[REG_PC], ptr[REG_SR]);
_alert("PR: %08x GBR: %08x MACH: %08x MACL: %08x\n",
ptr[REG_PR], ptr[REG_GBR], ptr[REG_MACH], ptr[REG_MACL]);
_alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", 0,
ptr[REG_R0], ptr[REG_R1], ptr[REG_R2], ptr[REG_R3],
ptr[REG_R4], ptr[REG_R5], ptr[REG_R6], ptr[REG_R7]);
_alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", 8,
ptr[REG_R8], ptr[REG_R9], ptr[REG_R10], ptr[REG_R11],
ptr[REG_R12], ptr[REG_R13], ptr[REG_R14], ptr[REG_R15]);
}
/****************************************************************************

15
arch/x86/src/common/up_assert.c
View File

@ -70,6 +70,14 @@
# define CONFIG_BOARD_RESET_ON_ASSERT 0
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_ARCH_STACKDUMP
static uint32_t s_last_regs[XCPTCONTEXT_REGS];
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
@ -212,6 +220,13 @@ static void up_dumpstate(void)
{
up_registerdump((uint32_t*)g_current_regs);
}
else
{
/* Capture and dump user registers by hand */
up_saveusercontext(s_last_regs);
up_registerdump(s_last_regs);
}
#ifdef CONFIG_ARCH_USBDUMP
/* Dump USB trace data */

59
arch/xtensa/src/common/xtensa_dumpstate.c
View File

@ -55,6 +55,12 @@
#ifdef CONFIG_DEBUG_ALERT
/****************************************************************************
* Private Data
****************************************************************************/
static uint32_t s_last_regs[XCPTCONTEXT_REGS];
/****************************************************************************
* Private Functions
****************************************************************************/
@ -141,35 +147,40 @@ static inline void xtensa_registerdump(void)
/* Are user registers available from interrupt processing? */
if (regs != NULL)
if (regs == NULL)
{
_alert(" PC: %08lx PS: %08lx\n",
(unsigned long)regs[REG_PC], (unsigned long)regs[REG_PS]);
_alert(" A0: %08lx A1: %08lx A2: %08lx A3: %08lx\n",
(unsigned long)regs[REG_A0], (unsigned long)regs[REG_A1],
(unsigned long)regs[REG_A2], (unsigned long)regs[REG_A3]);
_alert(" A4: %08lx A5: %08lx A6: %08lx A7: %08lx\n",
(unsigned long)regs[REG_A4], (unsigned long)regs[REG_A5],
(unsigned long)regs[REG_A6], (unsigned long)regs[REG_A7]);
_alert(" A8: %08lx A9: %08lx A10: %08lx A11: %08lx\n",
(unsigned long)regs[REG_A8], (unsigned long)regs[REG_A9],
(unsigned long)regs[REG_A10], (unsigned long)regs[REG_A11]);
_alert(" A12: %08lx A13: %08lx A14: %08lx A15: %08lx\n",
(unsigned long)regs[REG_A12], (unsigned long)regs[REG_A13],
(unsigned long)regs[REG_A14], (unsigned long)regs[REG_A15]);
_alert(" SAR: %08lx CAUSE: %08lx VADDR: %08lx\n",
(unsigned long)regs[REG_SAR], (unsigned long)regs[REG_EXCCAUSE],
(unsigned long)regs[REG_EXCVADDR]);
/* No.. capture user registers by hand */
xtensa_context_save(s_last_regs);
regs = s_last_regs;
}
_alert(" PC: %08lx PS: %08lx\n",
(unsigned long)regs[REG_PC], (unsigned long)regs[REG_PS]);
_alert(" A0: %08lx A1: %08lx A2: %08lx A3: %08lx\n",
(unsigned long)regs[REG_A0], (unsigned long)regs[REG_A1],
(unsigned long)regs[REG_A2], (unsigned long)regs[REG_A3]);
_alert(" A4: %08lx A5: %08lx A6: %08lx A7: %08lx\n",
(unsigned long)regs[REG_A4], (unsigned long)regs[REG_A5],
(unsigned long)regs[REG_A6], (unsigned long)regs[REG_A7]);
_alert(" A8: %08lx A9: %08lx A10: %08lx A11: %08lx\n",
(unsigned long)regs[REG_A8], (unsigned long)regs[REG_A9],
(unsigned long)regs[REG_A10], (unsigned long)regs[REG_A11]);
_alert(" A12: %08lx A13: %08lx A14: %08lx A15: %08lx\n",
(unsigned long)regs[REG_A12], (unsigned long)regs[REG_A13],
(unsigned long)regs[REG_A14], (unsigned long)regs[REG_A15]);
_alert(" SAR: %08lx CAUSE: %08lx VADDR: %08lx\n",
(unsigned long)regs[REG_SAR], (unsigned long)regs[REG_EXCCAUSE],
(unsigned long)regs[REG_EXCVADDR]);
#ifdef XCHAL_HAVE_LOOPS
_alert(" LBEG: %08lx LEND: %08lx LCNT: %08lx\n",
(unsigned long)regs[REG_LBEG], (unsigned long)regs[REG_LEND],
(unsigned long)regs[REG_LCOUNT]);
_alert(" LBEG: %08lx LEND: %08lx LCNT: %08lx\n",
(unsigned long)regs[REG_LBEG], (unsigned long)regs[REG_LEND],
(unsigned long)regs[REG_LCOUNT]);
#endif
#ifndef __XTENSA_CALL0_ABI__
_alert(" TMP0: %08lx TMP1: %08lx\n",
(unsigned long)regs[REG_TMP0], (unsigned long)regs[REG_TMP1]);
_alert(" TMP0: %08lx TMP1: %08lx\n",
(unsigned long)regs[REG_TMP0], (unsigned long)regs[REG_TMP1]);
#endif
}
}
/****************************************************************************

14
arch/z16/src/common/up_registerdump.c
View File

@ -49,6 +49,12 @@
#ifdef CONFIG_ARCH_STACKDUMP
/****************************************************************************
* Private Data
****************************************************************************/
static chipreg_t s_last_regs[XCPTCONTEXT_REGS];
/****************************************************************************
* Private Functions
****************************************************************************/
@ -62,6 +68,12 @@ static void up_registerdump(void)
#ifdef CONFIG_DEBUG_INFO
FAR uint32_t *regs32 = (FAR uint32_t*)g_current_regs;
if (regs32 == NULL)
{
up_saveusercontext(s_last_regs);
regs32 = (FAR uint32_t *)s_last_regs;
}
_alert("R0 :%08x R1 :%08x R2 :%08x R3 :%08x "
"R4 :%08x R5 :%08x R6 :%08x R7 :%08x\n"
regs32[REG_R0/2], regs32[REG_R1/2], regs32[REG_R2/2], regs32[REG_R3/2],
@ -70,7 +82,7 @@ static void up_registerdump(void)
regs32[REG_R8/2], regs32[REG_R9/2], regs32[REG_R10/2], regs3[REG_R11/2],
regs32[REG_R12/2], regs32[REG_R13/2]);
_alert("FP :%08x SP :%08x FLG:%04x\n"
regs32[REG_R14/2], regs32[REG_R15/2], g_current_regs[REG_FLAGS]);
regs32[REG_R14/2], regs32[REG_R15/2], regs32[REG_FLAGS]);
#endif
}

47
arch/z80/src/ez80/ez80_registerdump.c
View File

@ -57,6 +57,8 @@
* Private Data
****************************************************************************/
static chipreg_t s_last_regs[XCPTCONTEXT_REGS];
/****************************************************************************
* Private Functions
****************************************************************************/
@ -67,28 +69,33 @@
static void ez80_registerdump(void)
{
if (g_current_regs)
volatile chipreg_t *regs = g_current_regs;
if (regs == NULL)
{
#ifdef CONFIG_EZ80_Z80MODE
_alert("AF: %04x I: %04x\n",
g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
_alert("BC: %04x DE: %04x HL: %04x\n",
g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
_alert("IX: %04x IY: %04x\n",
g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
_alert("SP: %04x PC: %04x\n"
g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
#else
_alert("AF: %06x I: %06x\n",
g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
_alert("BC: %06x DE: %06x HL: %06x\n",
g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
_alert("IX: %06x IY: %06x\n",
g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
_alert("SP: %06x PC: %06x\n"
g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
#endif
ez80_saveusercontext(s_last_regs);
regs = s_last_regs;
}
#ifdef CONFIG_EZ80_Z80MODE
_alert("AF: %04x I: %04x\n",
regs[XCPT_AF], regs[XCPT_I]);
_alert("BC: %04x DE: %04x HL: %04x\n",
regs[XCPT_BC], regs[XCPT_DE], regs[XCPT_HL]);
_alert("IX: %04x IY: %04x\n",
regs[XCPT_IX], regs[XCPT_IY]);
_alert("SP: %04x PC: %04x\n"
regs[XCPT_SP], regs[XCPT_PC]);
#else
_alert("AF: %06x I: %06x\n",
regs[XCPT_AF], regs[XCPT_I]);
_alert("BC: %06x DE: %06x HL: %06x\n",
regs[XCPT_BC], regs[XCPT_DE], regs[XCPT_HL]);
_alert("IX: %06x IY: %06x\n",
regs[XCPT_IX], regs[XCPT_IY]);
_alert("SP: %06x PC: %06x\n"
regs[XCPT_SP], regs[XCPT_PC]);
#endif
}
#endif /* CONFIG_ARCH_STACKDUMP */

33
arch/z80/src/z180/z180_registerdump.c
View File

@ -49,6 +49,12 @@
#ifdef CONFIG_ARCH_STACKDUMP
/****************************************************************************
* Private Data
****************************************************************************/
static chipreg_t s_last_regs[XCPTCONTEXT_REGS];
/****************************************************************************
* Private Functions
****************************************************************************/
@ -59,19 +65,24 @@
static void z180_registerdump(void)
{
if (g_current_regs)
volatile chipreg_t *regs = g_current_regs;
if (regs == NULL)
{
_alert("AF: %04x I: %04x\n",
g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
_alert("BC: %04x DE: %04x HL: %04x\n",
g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
_alert("IX: %04x IY: %04x\n",
g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
_alert("SP: %04x PC: %04x\n"
g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
_alert("CBAR: %02x BBR: %02x CBR: %02x\n"
inp(Z180_MMU_CBAR), inp(Z180_MMU_BBR), inp(Z180_MMU_CBR));
z180_saveusercontext(s_last_regs);
regs = s_last_regs;
}
_alert("AF: %04x I: %04x\n",
regs[XCPT_AF], regs[XCPT_I]);
_alert("BC: %04x DE: %04x HL: %04x\n",
regs[XCPT_BC], regs[XCPT_DE], regs[XCPT_HL]);
_alert("IX: %04x IY: %04x\n",
regs[XCPT_IX], regs[XCPT_IY]);
_alert("SP: %04x PC: %04x\n"
regs[XCPT_SP], regs[XCPT_PC]);
_alert("CBAR: %02x BBR: %02x CBR: %02x\n"
inp(Z180_MMU_CBAR), inp(Z180_MMU_BBR), inp(Z180_MMU_CBR));
}
#endif /* CONFIG_ARCH_STACKDUMP */

12
arch/z80/src/z8/z8_registerdump.c
View File

@ -50,6 +50,12 @@
#ifdef CONFIG_ARCH_STACKDUMP
/****************************************************************************
* Private Data
****************************************************************************/
static chipreg_t s_last_regs[XCPTCONTEXT_REGS];
/****************************************************************************
* Private Functions
****************************************************************************/
@ -79,7 +85,6 @@ static inline void z8_dumpstate(chipreg_t sp, chipreg_t pc, uint8_t irqctl,
void z8_registerdump(void)
{
FAR chipret_t *regs;
FAR chipret_t *state;
chipreg_t sp;
uint16_t rp;
@ -115,6 +120,11 @@ void z8_registerdump(void)
case Z8_IRQSTATE_NONE:
default:
z8_saveusercontext(s_last_regs);
regs = s_last_regs;
z8_dumpregs(regs);
z8_dumpstate(regs[XCPT_SP], regs[XCPT_PC],
regs[XCPT_IRQCTL], regs[XCPT_RPFLAGS]);
break;
}
}

29
arch/z80/src/z80/z80_registerdump.c
View File

@ -49,6 +49,12 @@
#ifdef CONFIG_ARCH_STACKDUMP
/****************************************************************************
* Private Data
****************************************************************************/
static chipreg_t s_last_regs[XCPTCONTEXT_REGS];
/****************************************************************************
* Private Functions
****************************************************************************/
@ -59,17 +65,22 @@
static void z80_registerdump(void)
{
if (g_current_regs)
volatile chipreg_t *regs = g_current_regs;
if (regs == NULL)
{
_alert("AF: %04x I: %04x\n",
g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
_alert("BC: %04x DE: %04x HL: %04x\n",
g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
_alert("IX: %04x IY: %04x\n",
g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
_alert("SP: %04x PC: %04x\n"
g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
z80_saveusercontext(s_last_regs);
regs = s_last_regs;
}
_alert("AF: %04x I: %04x\n",
regs[XCPT_AF], regs[XCPT_I]);
_alert("BC: %04x DE: %04x HL: %04x\n",
regs[XCPT_BC], regs[XCPT_DE], regs[XCPT_HL]);
_alert("IX: %04x IY: %04x\n",
regs[XCPT_IX], regs[XCPT_IY]);
_alert("SP: %04x PC: %04x\n"
regs[XCPT_SP], regs[XCPT_PC]);
}
#endif /* CONFIG_ARCH_STACKDUMP */