arch/arm/src/nrf52: Better uart handling and some cleanup.
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@ -33,8 +33,8 @@
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_NRF53_CHIP_H
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#define __ARCH_ARM_SRC_NRF53_CHIP_H
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#ifndef __ARCH_ARM_SRC_NRF52_CHIP_H
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#define __ARCH_ARM_SRC_NRF52_CHIP_H
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/************************************************************************************
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* Included Files
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@ -74,4 +74,4 @@
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* Public Functions
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************************************************************************************/
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#endif /* __ARCH_ARM_SRC_NRF53_CHIP_H */
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#endif /* __ARCH_ARM_SRC_NRF52_CHIP_H */
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@ -194,4 +194,5 @@ void nrf52_gpio_write(nrf52_pinset_t pinset, bool value)
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bool nrf52_gpio_read(nrf52_pinset_t pinset)
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{
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#warning Missing implementation!
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}
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@ -176,8 +176,6 @@ void nrf52_usart_configure(uintptr_t base, const struct uart_config_s *config)
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/* Enable */
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putreg32(NRF52_UART_ENABLE_ENABLE, base + NRF52_UART_ENABLE_OFFSET);
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putreg32(1, base + NRF52_UART_TASKS_STARTTX_OFFSET);
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putreg32(1, base + NRF52_UART_TASKS_STARTRX_OFFSET);
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}
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#endif
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@ -216,10 +214,13 @@ void nrf52_usart_disable(uintptr_t base)
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void up_lowputc(char ch)
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{
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#ifdef HAVE_UART_CONSOLE
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putreg32(1, CONSOLE_BASE + NRF52_UART_TASKS_STARTTX_OFFSET);
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putreg32(0, CONSOLE_BASE + NRF52_UART_EVENTS_TXDRDY_OFFSET);
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putreg32(ch, CONSOLE_BASE + NRF52_UART_TXD_OFFSET);
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while (getreg32(CONSOLE_BASE + NRF52_UART_EVENTS_TXDRDY_OFFSET) == 0 )
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{
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}
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putreg32(1, CONSOLE_BASE + NRF52_UART_TASKS_STOPTX_OFFSET);
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#endif
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}
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@ -212,11 +212,17 @@ static uart_dev_t g_uart0port =
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static int nrf52_setup(struct uart_dev_s *dev)
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{
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#ifndef CONFIG_SUPPRESS_UART_CONFIG
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struct nrf52_dev_s *priv = (struct nrf52_dev_s *)dev->priv;
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/* struct nrf52_dev_s *priv = (struct nrf52_dev_s *)dev->priv; */
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/* Configure the UART as an RS-232 UART */
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nrf52_usart_configure(priv->uartbase, &priv->config);
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/* REVISIT: If nrf52_usart_configure() called 2nd time uart stops working.
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* Rx interrupt keeps firing.
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* configuring is done on __start
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*/
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/* nrf52_usart_configure(priv->uartbase, &priv->config); */
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#endif
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return OK;
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@ -290,6 +296,7 @@ static void nrf52_detach(struct uart_dev_s *dev)
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/* Disable interrupts */
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putreg32(NRF52_UART_INTENSET_RXDRDY, priv->uartbase + NRF52_UART_INTENCLR_OFFSET);
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up_disable_irq(priv->irq);
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/* Detach from the interrupt(s) */
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@ -313,17 +320,25 @@ static int nrf52_interrupt(int irq, void *context, FAR void *arg)
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{
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struct uart_dev_s *dev = (struct uart_dev_s *)arg;
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struct nrf52_dev_s *priv;
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uint32_t regval;
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DEBUGASSERT(dev != NULL && dev->priv != NULL);
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priv = (struct nrf52_dev_s *)dev->priv;
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/* Clear RX event */
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putreg32(0 , priv->uartbase + NRF52_UART_EVENTS_RXDRDY_OFFSET);
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priv->rx_available = true;
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/* Check RX event */
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uart_recvchars(dev);
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regval = getreg32(priv->uartbase + NRF52_UART_EVENTS_RXDRDY_OFFSET);
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//uart_xmitchars(dev);
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if (regval != 0)
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{
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putreg32(0, priv->uartbase + NRF52_UART_EVENTS_RXDRDY_OFFSET);
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priv->rx_available = true;
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uart_recvchars(dev);
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}
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/* Clear errors */
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putreg32(0, priv->uartbase + NRF52_UART_ERRORSRC_OFFSET);
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return OK;
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}
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@ -394,6 +409,7 @@ static void nrf52_rxint(struct uart_dev_s *dev, bool enable)
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putreg32(NRF52_UART_INTENSET_RXDRDY,
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priv->uartbase + NRF52_UART_INTENSET_OFFSET);
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putreg32(1, priv->uartbase + NRF52_UART_TASKS_STARTRX_OFFSET);
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#endif
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}
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@ -401,6 +417,7 @@ static void nrf52_rxint(struct uart_dev_s *dev, bool enable)
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{
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putreg32(NRF52_UART_INTENSET_RXDRDY,
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priv->uartbase + NRF52_UART_INTENCLR_OFFSET);
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putreg32(1, priv->uartbase + NRF52_UART_TASKS_STOPRX_OFFSET);
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}
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}
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@ -434,10 +451,15 @@ static void nrf52_send(struct uart_dev_s *dev, int ch)
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struct nrf52_dev_s *priv = (struct nrf52_dev_s *)dev->priv;
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putreg32(0, priv->uartbase + NRF52_UART_EVENTS_TXDRDY_OFFSET);
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putreg32(1, priv->uartbase + NRF52_UART_TASKS_STARTTX_OFFSET);
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putreg32(ch, priv->uartbase + NRF52_UART_TXD_OFFSET);
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while (getreg32(priv->uartbase + NRF52_UART_EVENTS_TXDRDY_OFFSET) == 0 )
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{
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}
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putreg32(1, priv->uartbase + NRF52_UART_TASKS_STOPTX_OFFSET);
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}
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/****************************************************************************
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