arch/arm/src/nrf52: Add nRF52 Flash PROGMEM support
This commit is contained in:
Alan Carvalho de Assis
Gregory Nutt
parent
7534a3d554
commit
e4e4e63164
@ -70,6 +70,19 @@ config NRF52_WDT
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endmenu # NRF52 Peripheral Selection
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config NRF52_FLASH_PREFETCH
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bool "Enable FLASH Pre-fetch"
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default y
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---help---
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Enable FLASH prefetch
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config NRF52_PROGMEM
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bool "FLASH program memory"
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default n
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select ARCH_HAVE_PROGMEM
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---help---
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Enable support FLASH interfaces as defined in include/nuttx/progmem.h
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menu "GPIO Interrupt Configuration"
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config NRF52_GPIOIRQ
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@ -81,7 +81,7 @@ endif
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CHIP_ASRCS =
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CHIP_CSRCS = nrf52_start.c nrf52_clockconfig.c nrf52_irq.c nrf52_clrpend.c
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CHIP_CSRCS += nrf52_allocateheap.c nrf52_lowputc.c nrf52_gpio.c
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CHIP_CSRCS += nrf52_allocateheap.c nrf52_lowputc.c nrf52_gpio.c nrf52_nvmc.c
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ifneq ($(CONFIG_SCHED_TICKLESS),y)
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CHIP_CSRCS += nrf52_timerisr.c
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@ -101,6 +101,10 @@ ifeq ($(CONFIG_NRF52_HAVE_UART),y)
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CHIP_CSRCS += nrf52_serial.c
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endif
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ifeq ($(CONFIG_NRF52_PROGMEM),y)
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CHIP_CSRCS += nrf52_flash.c
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endif
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ifeq ($(CONFIG_NRF52_WDT),y)
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CHIP_CSRCS += nrf52_wdt.c
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endif
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163
arch/arm/src/nrf52/chip/nrf52_ficr.h
Normal file
163
arch/arm/src/nrf52/chip/nrf52_ficr.h
Normal file
@ -0,0 +1,163 @@
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/***************************************************************************************************
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* arch/arm/src/nrf52/chip/nrf52_ficr.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Alan Carvalho de Assis <acassis@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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***************************************************************************************************/
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#ifndef __ARCH_ARM_SRC_NRF52_CHIP_NRF52_FICR_H
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#define __ARCH_ARM_SRC_NRF52_CHIP_NRF52_FICR_H
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/***************************************************************************************************
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* Included Files
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***************************************************************************************************/
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#include <nuttx/config.h>
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#include "chip/nrf52_memorymap.h"
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/***************************************************************************************************
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* Pre-processor Definitions
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***************************************************************************************************/
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/* FICR Register Offsets ****************************************************************************/
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/* Registers for the FICR */
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#define NRF52_FICR_CODEPAGESIZE_OFFSET 0x010 /* Code memory page size */
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#define NRF52_FICR_CODESIZE_OFFSET 0x014 /* Code memory size */
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#define NRF52_FICR_DEVICEID0_OFFSET 0x060 /* Device identifier */
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#define NRF52_FICR_DEVICEID1_OFFSET 0x064 /* Device identifier */
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#define NRF52_FICR_ER0_OFFSET 0x080 /* Encryption Root, word 0 */
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#define NRF52_FICR_ER1_OFFSET 0x084 /* Encryption Root, word 1 */
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#define NRF52_FICR_ER2_OFFSET 0x088 /* Encryption Root, word 2 */
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#define NRF52_FICR_ER3_OFFSET 0x08c /* Encryption Root, word 3 */
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#define NRF52_FICR_IR0_OFFSET 0x090 /* Identity Root, word 0 */
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#define NRF52_FICR_IR1_OFFSET 0x094 /* Identity Root, word 1 */
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#define NRF52_FICR_IR2_OFFSET 0x098 /* Identity Root, word 2 */
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#define NRF52_FICR_IR3_OFFSET 0x09c /* Identity Root, word 3 */
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#define NRF52_FICR_DEVICEADDRTYPE_OFFSET 0x0a0 /* Device address type */
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#define NRF52_FICR_DEVICEADDR0_OFFSET 0x0a4 /* Device address 0 */
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#define NRF52_FICR_DEVICEADDR1_OFFSET 0x0a8 /* Device address 1 */
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#define NRF52_FICR_INFO_PART_OFFSET 0x100 /* Part code */
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#define NRF52_FICR_INFO_VARIANT_OFFSET 0x104 /* Part Variant, Hardware version and Production configuration */
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#define NRF52_FICR_INFO_PACKAGE_OFFSET 0x108 /* Package option */
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#define NRF52_FICR_INFO_RAM_OFFSET 0x10c /* RAM variant */
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#define NRF52_FICR_INFO_FLASH_OFFSET 0x110 /* Flash variant */
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#define NRF52_FICR_TEMP_A0_OFFSET 0x404 /* Slope definition A0 */
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#define NRF52_FICR_TEMP_A1_OFFSET 0x408 /* Slope definition A1 */
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#define NRF52_FICR_TEMP_A2_OFFSET 0x40c /* Slope definition A2 */
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#define NRF52_FICR_TEMP_A3_OFFSET 0x410 /* Slope definition A3 */
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#define NRF52_FICR_TEMP_A4_OFFSET 0x414 /* Slope definition A4 */
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#define NRF52_FICR_TEMP_A5_OFFSET 0x418 /* Slope definition A5 */
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#define NRF52_FICR_TEMP_B0_OFFSET 0x41c /* y-intercept B0 */
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#define NRF52_FICR_TEMP_B1_OFFSET 0x420 /* y-intercept B1 */
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#define NRF52_FICR_TEMP_B2_OFFSET 0x424 /* y-intercept B2 */
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#define NRF52_FICR_TEMP_B3_OFFSET 0x428 /* y-intercept B3 */
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#define NRF52_FICR_TEMP_B4_OFFSET 0x42c /* y-intercept B4 */
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#define NRF52_FICR_TEMP_B5_OFFSET 0x430 /* y-intercept B5 */
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#define NRF52_FICR_TEMP_T0_OFFSET 0x434 /* Segment end T0 */
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#define NRF52_FICR_TEMP_T1_OFFSET 0x438 /* Segment end T1 */
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#define NRF52_FICR_TEMP_T2_OFFSET 0x43c /* Segment end T2 */
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#define NRF52_FICR_TEMP_T3_OFFSET 0x440 /* Segment end T3 */
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#define NRF52_FICR_TEMP_T4_OFFSET 0x444 /* Segment end T4 */
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#define NRF52_FICR_NFC_TAGHEADER0_OFFSET 0x450 /* Default header for NFC Tag */
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#define NRF52_FICR_NFC_TAGHEADER1_OFFSET 0x454 /* Default header for NFC Tag */
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#define NRF52_FICR_NFC_TAGHEADER2_OFFSET 0x458 /* Default header for NFC Tag */
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#define NRF52_FICR_NFC_TAGHEADER3_OFFSET 0x45c /* Default header for NFC Tag */
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/* FICR Register Addresses **************************************************************************/
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#define NRF52_FICR_CODEPAGESIZE (NRF52_FICR_BASE + NRF52_FICR_CODEPAGESIZE_OFFSET)
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#define NRF52_FICR_CODESIZE (NRF52_FICR_BASE + NRF52_FICR_CODESIZE_OFFSET)
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#define NRF52_FICR_DEVICEID0 (NRF52_FICR_BASE + NRF52_FICR_DEVICEID0_OFFSET)
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#define NRF52_FICR_DEVICEID1 (NRF52_FICR_BASE + NRF52_FICR_DEVICEID1_OFFSET)
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#define NRF52_FICR_ER0 (NRF52_FICR_BASE + NRF52_FICR_ER0_OFFSET)
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#define NRF52_FICR_ER1 (NRF52_FICR_BASE + NRF52_FICR_ER1_OFFSET)
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#define NRF52_FICR_ER2 (NRF52_FICR_BASE + NRF52_FICR_ER2_OFFSET)
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#define NRF52_FICR_ER3 (NRF52_FICR_BASE + NRF52_FICR_ER3_OFFSET)
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#define NRF52_FICR_IR0 (NRF52_FICR_BASE + NRF52_FICR_IR0_OFFSET)
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#define NRF52_FICR_IR1 (NRF52_FICR_BASE + NRF52_FICR_IR1_OFFSET)
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#define NRF52_FICR_IR2 (NRF52_FICR_BASE + NRF52_FICR_IR2_OFFSET)
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#define NRF52_FICR_IR3 (NRF52_FICR_BASE + NRF52_FICR_IR3_OFFSET)
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#define NRF52_FICR_DEVICEADDRTYPE (NRF52_FICR_BASE + NRF52_FICR_DEVICEADDRTYPE_OFFSET)
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#define NRF52_FICR_DEVICEADDR0 (NRF52_FICR_BASE + NRF52_FICR_DEVICEADDR0_OFFSET)
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#define NRF52_FICR_DEVICEADDR1 (NRF52_FICR_BASE + NRF52_FICR_DEVICEADDR1_OFFSET)
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#define NRF52_FICR_INFO_PART (NRF52_FICR_BASE + NRF52_FICR_INFO_PART_OFFSET)
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#define NRF52_FICR_INFO_VARIANT (NRF52_FICR_BASE + NRF52_FICR_INFO_VARIANT_OFFSET)
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#define NRF52_FICR_INFO_PACKAGE (NRF52_FICR_BASE + NRF52_FICR_INFO_PACKAGE_OFFSET)
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#define NRF52_FICR_INFO_RAM (NRF52_FICR_BASE + NRF52_FICR_INFO_RAM_OFFSET)
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#define NRF52_FICR_INFO_FLASH (NRF52_FICR_BASE + NRF52_FICR_INFO_FLASH_OFFSET)
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#define NRF52_FICR_TEMP_A0 (NRF52_FICR_BASE + NRF52_FICR_TEMP_A0_OFFSET)
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#define NRF52_FICR_TEMP_A1 (NRF52_FICR_BASE + NRF52_FICR_TEMP_A1_OFFSET)
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#define NRF52_FICR_TEMP_A2 (NRF52_FICR_BASE + NRF52_FICR_TEMP_A2_OFFSET)
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#define NRF52_FICR_TEMP_A3 (NRF52_FICR_BASE + NRF52_FICR_TEMP_A3_OFFSET)
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#define NRF52_FICR_TEMP_A4 (NRF52_FICR_BASE + NRF52_FICR_TEMP_A4_OFFSET)
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#define NRF52_FICR_TEMP_A5 (NRF52_FICR_BASE + NRF52_FICR_TEMP_A5_OFFSET)
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#define NRF52_FICR_TEMP_B0 (NRF52_FICR_BASE + NRF52_FICR_TEMP_B0_OFFSET)
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#define NRF52_FICR_TEMP_B1 (NRF52_FICR_BASE + NRF52_FICR_TEMP_B1_OFFSET)
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#define NRF52_FICR_TEMP_B2 (NRF52_FICR_BASE + NRF52_FICR_TEMP_B2_OFFSET)
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#define NRF52_FICR_TEMP_B3 (NRF52_FICR_BASE + NRF52_FICR_TEMP_B3_OFFSET)
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#define NRF52_FICR_TEMP_B4 (NRF52_FICR_BASE + NRF52_FICR_TEMP_B4_OFFSET)
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#define NRF52_FICR_TEMP_B5 (NRF52_FICR_BASE + NRF52_FICR_TEMP_B5_OFFSET)
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#define NRF52_FICR_TEMP_T0 (NRF52_FICR_BASE + NRF52_FICR_TEMP_T0_OFFSET)
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#define NRF52_FICR_TEMP_T1 (NRF52_FICR_BASE + NRF52_FICR_TEMP_T1_OFFSET)
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#define NRF52_FICR_TEMP_T2 (NRF52_FICR_BASE + NRF52_FICR_TEMP_T2_OFFSET)
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#define NRF52_FICR_TEMP_T3 (NRF52_FICR_BASE + NRF52_FICR_TEMP_T3_OFFSET)
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#define NRF52_FICR_TEMP_T4 (NRF52_FICR_BASE + NRF52_FICR_TEMP_T4_OFFSET)
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#define NRF52_FICR_NFC_TAGHEADER0 (NRF52_FICR_BASE + NRF52_FICR_NFC_TAGHEADER0_OFFSET)
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#define NRF52_FICR_NFC_TAGHEADER1 (NRF52_FICR_BASE + NRF52_FICR_NFC_TAGHEADER1_OFFSET)
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#define NRF52_FICR_NFC_TAGHEADER2 (NRF52_FICR_BASE + NRF52_FICR_NFC_TAGHEADER2_OFFSET)
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#define NRF52_FICR_NFC_TAGHEADER3 (NRF52_FICR_BASE + NRF52_FICR_NFC_TAGHEADER3_OFFSET)
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/* FICR Register Bitfield Definitions **************************************************************/
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#define NRF52_FICR_READY_READY (1 << 0) /* FICR is ready */
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#define NRF52_FICR_CONFIG_WEN (1 << 0) /* Enable write program memory */
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#define NRF52_FICR_ICACHECNF_CACHEEN (1 << 0) /* Cache enable */
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#define NRF52_FICR_ICACHECNF_CACHEPROFEN (1 << 8) /* Cache profiling enable */
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/* ENABLE Register */
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/* INTENSET Register */
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#endif /* __ARCH_ARM_SRC_NRF52_CHIP_NRF52_FICR_H */
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99
arch/arm/src/nrf52/chip/nrf52_nvmc.h
Normal file
99
arch/arm/src/nrf52/chip/nrf52_nvmc.h
Normal file
@ -0,0 +1,99 @@
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/***************************************************************************************************
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* arch/arm/src/nrf52/chip/nrf52_nvmc.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Alan Carvalho de Assis <acassis@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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***************************************************************************************************/
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#ifndef __ARCH_ARM_SRC_NRF52_CHIP_NRF52_NVMC_H
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#define __ARCH_ARM_SRC_NRF52_CHIP_NRF52_NVMC_H
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/***************************************************************************************************
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* Included Files
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***************************************************************************************************/
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#include <nuttx/config.h>
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#include "chip/nrf52_memorymap.h"
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/***************************************************************************************************
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* Pre-processor Definitions
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***************************************************************************************************/
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/* NVMC Register Offsets ****************************************************************************/
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/* Registers for the NVMC */
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#define NRF52_NVMC_READY_OFFSET 0x400 /* Ready flag */
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#define NRF52_NVMC_CONFIG_OFFSET 0x504 /* Configuration register */
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#define NRF52_NVMC_ERASEPAGE_OFFSET 0x508 /* Register for erasing a page in Code area */
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#define NRF52_NVMC_ERASEPCR1_OFFSET 0x508 /* Equivalent to ERASEPAGE */
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#define NRF52_NVMC_ERASEALL_OFFSET 0x50c /* Register for erasing all non-volatile user memory */
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#define NRF52_NVMC_ERASEPCR0_OFFSET 0x510 /* Register for erasing a page in Code area. Equiv. ERASEPAGE */
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#define NRF52_NVMC_ERASEUICR_OFFSET 0x514 /* Register for erasing User Information Configuration Registers */
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#define NRF52_NVMC_ICACHECNF_OFFSET 0x540 /* I-Code cache configuration register */
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#define NRF52_NVMC_IHIT_OFFSET 0x548 /* I-Code cache hit counter. */
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#define NRF52_NVMC_IMISS_OFFSET 0x54c /* I-Code cache miss counter */
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/* NVMC Register Addresses **************************************************************************/
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#define NRF52_NVMC_READY (NRF52_NVMC_BASE + NRF52_NVMC_READY_OFFSET)
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#define NRF52_NVMC_CONFIG (NRF52_NVMC_BASE + NRF52_NVMC_CONFIG_OFFSET)
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#define NRF52_NVMC_ERASEPAGE (NRF52_NVMC_BASE + NRF52_NVMC_ERASEPAGE_OFFSET)
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#define NRF52_NVMC_ERASEPCR1 (NRF52_NVMC_BASE + NRF52_NVMC_ERASEPCR1_OFFSET)
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#define NRF52_NVMC_ERASEALL (NRF52_NVMC_BASE + NRF52_NVMC_ERASEALL_OFFSET)
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#define NRF52_NVMC_ERASEPCR0 (NRF52_NVMC_BASE + NRF52_NVMC_ERASEPCR0_OFFSET)
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#define NRF52_NVMC_ERASEUICR (NRF52_NVMC_BASE + NRF52_NVMC_ERASEUICR_OFFSET)
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#define NRF52_NVMC_ICACHECNF (NRF52_NVMC_BASE + NRF52_NVMC_ICACHECNF_OFFSET)
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#define NRF52_NVMC_IHIT (NRF52_NVMC_BASE + NRF52_NVMC_IHIT_OFFSET)
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#define NRF52_NVMC_IMISS (NRF52_NVMC_BASE + NRF52_NVMC_IMISS_OFFSET)
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/* NVMC Register Bitfield Definitions **************************************************************/
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/* READY Register */
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#define NVMC_READY_READY (1 << 0) /* NVMC is ready */
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/* CONFIG Register */
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#define NVMC_CONFIG_SHIFT (0)
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#define NVMC_CONFIG_MASK (3 << NVMC_CONFIG_SHIFT)
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#define NVMC_CONFIG_REN (0 << NVMC_CONFIG_SHIFT) /* Read-only access */
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#define NVMC_CONFIG_WEN (1 << NVMC_CONFIG_SHIFT) /* Write Enabled */
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#define NVMC_CONFIG_EEN (2 << NVMC_CONFIG_SHIFT) /* Erase Enabled */
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/* ICACHECNF Register */
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#define NVMC_ICACHECNF_CACHEEN (1 << 0) /* Cache enable */
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#define NVMC_ICACHECNF_CACHEPROFEN (1 << 8) /* Cache profiling enable */
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/* INTENSET Register */
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#endif /* __ARCH_ARM_SRC_NRF52_CHIP_NRF52_NVMC_H */
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213
arch/arm/src/nrf52/nrf52_flash.c
Normal file
213
arch/arm/src/nrf52/nrf52_flash.c
Normal file
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/****************************************************************************
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* arch/arm/src/nrf52/nrf52_flash.c
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* Standard Flash access functions needed by the flash mtd driver.
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*
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* Copyright (C) 2018 Zglue Inc. All rights reserved.
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* Author: Levin Li <zhiqiang@zglue.com>
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* Author: Alan Carvalho de Assis <acassis@gmail.com>
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*
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* Ported from the Nordic SDK, this is the original license:
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*
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* Copyright (c) 2012 - 2018, Nordic Semiconductor ASA
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/arch.h>
|
||||
#include <errno.h>
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/progmem.h>
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
#include "up_arch.h"
|
||||
|
||||
#include "chip/nrf52_ficr.h"
|
||||
#include "chip/nrf52_nvmc.h"
|
||||
#include "nrf52_nvmc.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
#define NRF52_FLASH_PAGE_SIZE (4*1024)
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
size_t up_progmem_pagesize(size_t page)
|
||||
{
|
||||
size_t npage = up_progmem_npages();
|
||||
|
||||
if (page >= npage)
|
||||
{
|
||||
_err("Error For Wrong Page Index[%d], Total Page %d.\n", page, npage);
|
||||
return 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
return NRF52_FLASH_PAGE_SIZE;
|
||||
}
|
||||
}
|
||||
|
||||
ssize_t up_progmem_getpage(size_t addr)
|
||||
{
|
||||
size_t page_end = 0;
|
||||
|
||||
if (addr >= nrf_nvmc_get_flash_size())
|
||||
{
|
||||
_err("Address is out of Total Size.\n");
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
page_end = addr / NRF52_FLASH_PAGE_SIZE;
|
||||
|
||||
return page_end;
|
||||
}
|
||||
|
||||
size_t up_progmem_getaddress(size_t page)
|
||||
{
|
||||
|
||||
if (page >= up_progmem_npages())
|
||||
{
|
||||
return SIZE_MAX;
|
||||
}
|
||||
|
||||
return page * NRF52_FLASH_PAGE_SIZE;
|
||||
}
|
||||
|
||||
size_t up_progmem_npages(void)
|
||||
{
|
||||
return nrf_nvmc_get_flash_size() / NRF52_FLASH_PAGE_SIZE;
|
||||
}
|
||||
|
||||
bool up_progmem_isuniform(void)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
ssize_t up_progmem_erasepage(size_t page)
|
||||
{
|
||||
size_t page_address;
|
||||
|
||||
if (page >= up_progmem_npages())
|
||||
{
|
||||
_err("Wrong Page number %d.\n", page);
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
page_address = up_progmem_getaddress(page);
|
||||
|
||||
/* Get flash ready and begin erasing single page */
|
||||
|
||||
nrf_nvmc_page_erase(page_address);
|
||||
|
||||
/* Verify */
|
||||
|
||||
if (up_progmem_ispageerased(page) == 0)
|
||||
{
|
||||
return up_progmem_pagesize(page);
|
||||
}
|
||||
else
|
||||
{
|
||||
return -EIO;
|
||||
}
|
||||
}
|
||||
|
||||
ssize_t up_progmem_ispageerased(size_t page)
|
||||
{
|
||||
size_t addr;
|
||||
size_t count;
|
||||
size_t bwritten = 0;
|
||||
|
||||
if (page >= up_progmem_npages())
|
||||
{
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
/* Verify */
|
||||
|
||||
for (addr = up_progmem_getaddress(page), count = up_progmem_pagesize(page);
|
||||
count; count--, addr++)
|
||||
{
|
||||
if (getreg8(addr) != 0xff)
|
||||
{
|
||||
bwritten++;
|
||||
}
|
||||
}
|
||||
|
||||
return bwritten;
|
||||
}
|
||||
|
||||
ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
|
||||
{
|
||||
uint32_t *pword = (uint32_t *)buf;
|
||||
size_t written = count;
|
||||
|
||||
/* NRF52 requires word access */
|
||||
|
||||
if (count & 0x3)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Check for valid address range */
|
||||
|
||||
if ((addr + count) > nrf_nvmc_get_flash_size())
|
||||
{
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
|
||||
/* Get flash ready and begin flashing */
|
||||
|
||||
for (addr += NRF52_FLASH_BASE; count; count -= 4, pword++, addr += 4)
|
||||
{
|
||||
/* Write word and wait to complete */
|
||||
|
||||
nrf_nvmc_write_word(addr, *pword);
|
||||
|
||||
/* Verify */
|
||||
|
||||
if (getreg32(addr) != *pword)
|
||||
{
|
||||
_err("Write Internal Flash Error.\n");
|
||||
return -EIO;
|
||||
}
|
||||
}
|
||||
|
||||
return written;
|
||||
}
|
||||
525
arch/arm/src/nrf52/nrf52_nvmc.c
Normal file
525
arch/arm/src/nrf52/nrf52_nvmc.c
Normal file
@ -0,0 +1,525 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/nrf52/nrf52_nvmc.c
|
||||
*
|
||||
* Copyright (C) 2018 Zglue Inc. All rights reserved.
|
||||
* Author: Levin Li <zhiqiang@zglue.com>
|
||||
* Author: Alan Carvalho de Assis <acassis@gmail.com>
|
||||
*
|
||||
* Ported from the Nordic SDK, this is the original license:
|
||||
*
|
||||
* Copyright (c) 2012 - 2018, Nordic Semiconductor ASA
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <stdbool.h>
|
||||
#include "cache.h"
|
||||
|
||||
#include "chip/nrf52_ficr.h"
|
||||
#include "chip/nrf52_nvmc.h"
|
||||
#include "nrf52_nvmc.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: wait_for_flash_ready
|
||||
*
|
||||
* Description:
|
||||
* Busy-wait until the flash operation is done.
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void wait_for_flash_ready(void)
|
||||
{
|
||||
while (!(getreg32(NRF52_NVMC_READY) & NVMC_READY_READY))
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_mem_barrier
|
||||
*
|
||||
* Description:
|
||||
* Force memory sync before continuing.
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void nrf_mem_barrier(void)
|
||||
{
|
||||
ARM_ISB();
|
||||
ARM_DSB();
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_enable_icache
|
||||
*
|
||||
* Description:
|
||||
* Enable I-Cache for Flash
|
||||
*
|
||||
* Input Parameter:
|
||||
* flag - Flag to enable or disable.
|
||||
*
|
||||
* Returned Values:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void nrf_nvmc_enable_icache(bool flag)
|
||||
{
|
||||
uint32_t value;
|
||||
|
||||
/* Read the current icache configuration */
|
||||
|
||||
value = getreg32(NRF52_NVMC_ICACHECNF);
|
||||
|
||||
if (flag)
|
||||
{
|
||||
value |= NVMC_ICACHECNF_CACHEEN;
|
||||
}
|
||||
else
|
||||
{
|
||||
value &= ~NVMC_ICACHECNF_CACHEEN;
|
||||
}
|
||||
|
||||
/* Setup the new icache configuration */
|
||||
|
||||
putreg32(value, NRF52_NVMC_ICACHECNF);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_enable_profile
|
||||
*
|
||||
* Description:
|
||||
* Enable profiling I-Cache for flash
|
||||
*
|
||||
* Input Parameter:
|
||||
* flag - Flag to enable or disable.
|
||||
*
|
||||
* Returned Values:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void nrf_nvmc_enable_profile(bool flag)
|
||||
{
|
||||
uint32_t value;
|
||||
|
||||
/* Read the current icache configuration */
|
||||
|
||||
value = getreg32(NRF52_NVMC_ICACHECNF);
|
||||
|
||||
if (flag)
|
||||
{
|
||||
value |= NVMC_ICACHECNF_CACHEPROFEN;
|
||||
}
|
||||
else
|
||||
{
|
||||
value &= ~NVMC_ICACHECNF_CACHEPROFEN;
|
||||
}
|
||||
|
||||
/* Setup the new icache configuration */
|
||||
|
||||
putreg32(value, NRF52_NVMC_ICACHECNF);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_get_profiling_ihit
|
||||
*
|
||||
* Description:
|
||||
* Get I-Hit for profiling
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* Number of cache hits.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t nrf_nvmc_get_profiling_ihit(void)
|
||||
{
|
||||
return getreg32(NRF52_NVMC_IHIT);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_get_profiling_imiss
|
||||
*
|
||||
* Description:
|
||||
* Get I-Miss for profiling
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* Number of cache misses.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t nrf_nvmc_get_profiling_imiss(void)
|
||||
{
|
||||
return getreg32(NRF52_NVMC_IMISS);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_get_flash_size
|
||||
*
|
||||
* Description:
|
||||
* Get internal FLASH size
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* Flash size.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t nrf_nvmc_get_flash_size(void)
|
||||
{
|
||||
return getreg32(NRF52_FICR_INFO_FLASH) * 1024;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_get_ram_size
|
||||
*
|
||||
* Description:
|
||||
* Get internal RAM size.
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* RAM size.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t nrf_nvmc_get_ram_size(void)
|
||||
{
|
||||
return getreg32(NRF52_FICR_INFO_RAM) * 1024;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_read_dev_id0
|
||||
*
|
||||
* Description:
|
||||
* Get device identifier 0
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* Value of ID0
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t nrf_nvmc_read_dev_id0(void)
|
||||
{
|
||||
return getreg32(NRF52_FICR_DEVICEID0);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_read_dev_id1
|
||||
*
|
||||
* Description:
|
||||
* Get device identifier 1
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* Value of ID1
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t nrf_nvmc_read_dev_id1(void)
|
||||
{
|
||||
return getreg32(NRF52_FICR_DEVICEID1);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: system_image_start_address
|
||||
*
|
||||
* Description:
|
||||
* Get system image code begin address.
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* Address where code starts.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t system_image_start_address(void)
|
||||
{
|
||||
extern uint32_t _stext;
|
||||
return (uint32_t)&_stext;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: system_image_ro_section_end
|
||||
*
|
||||
* Description:
|
||||
* Get system image end address of read only section.
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* The end address of the RO section.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t system_image_ro_section_end(void)
|
||||
{
|
||||
extern uint32_t _eronly;
|
||||
return (uint32_t)&_eronly;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: system_image_data_section_size
|
||||
*
|
||||
* Description:
|
||||
* Get system image data section size
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* The size of the data section.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t system_image_data_section_size(void)
|
||||
{
|
||||
extern uint32_t _edata;
|
||||
extern uint32_t _sdata;
|
||||
uint32_t data_size;
|
||||
uint32_t start;
|
||||
uint32_t end;
|
||||
|
||||
start = (uint32_t)&_sdata;
|
||||
end = (uint32_t)&_edata;
|
||||
data_size = end - start;
|
||||
return data_size;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_page_erase
|
||||
*
|
||||
* Description:
|
||||
* Erase a page in flash. This is required before writing to any
|
||||
* address in the page.
|
||||
*
|
||||
* Input Parameter:
|
||||
* address - Start address of the page.
|
||||
*
|
||||
* Returned Values:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void nrf_nvmc_page_erase(uint32_t address)
|
||||
{
|
||||
/* Enable erase */
|
||||
|
||||
putreg32(NVMC_CONFIG_EEN, NRF52_NVMC_CONFIG);
|
||||
nrf_mem_barrier();
|
||||
|
||||
/* Erase the page */
|
||||
|
||||
putreg32(address, NRF52_NVMC_ERASEPAGE);
|
||||
wait_for_flash_ready();
|
||||
|
||||
/* Return to read-only mode */
|
||||
|
||||
putreg32(NVMC_CONFIG_REN, NRF52_NVMC_CONFIG);
|
||||
nrf_mem_barrier();
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_write_byte
|
||||
*
|
||||
* Description:
|
||||
* The function reads the word containing the byte, and then
|
||||
* rewrites the entire word.
|
||||
*
|
||||
* Input Parameter:
|
||||
* address - Address to write to.
|
||||
* value - Value to write.
|
||||
*
|
||||
* Returned Values:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void nrf_nvmc_write_byte(uint32_t address, uint8_t value)
|
||||
{
|
||||
uint32_t byte_shift = address & (uint32_t)0x03;
|
||||
uint32_t address32 = address & ~byte_shift; /* Address to the word this byte is in.*/
|
||||
uint32_t value32 = (*(uint32_t *)address32 &
|
||||
~((uint32_t)0xFF << (byte_shift << (uint32_t)3)));
|
||||
value32 = value32 + ((uint32_t)value << (byte_shift << 3));
|
||||
|
||||
/* Enable write */
|
||||
|
||||
putreg32(NVMC_CONFIG_WEN, NRF52_NVMC_CONFIG);
|
||||
nrf_mem_barrier();
|
||||
|
||||
/* Write the byte, needs to be a single 32-bit write operation */
|
||||
|
||||
*(uint32_t *)address32 = value32;
|
||||
wait_for_flash_ready();
|
||||
|
||||
/* Return to read-only mode */
|
||||
|
||||
putreg32(NVMC_CONFIG_REN, NRF52_NVMC_CONFIG);
|
||||
nrf_mem_barrier();
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_write_word
|
||||
*
|
||||
* Description:
|
||||
* Write a 32-bit word to flash.
|
||||
*
|
||||
* Input Parameter:
|
||||
* address - Address to write to.
|
||||
* value - Value to write.
|
||||
*
|
||||
* Returned Values:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void nrf_nvmc_write_word(uint32_t address, uint32_t value)
|
||||
{
|
||||
/* Enable write */
|
||||
|
||||
putreg32(NVMC_CONFIG_WEN, NRF52_NVMC_CONFIG);
|
||||
nrf_mem_barrier();
|
||||
|
||||
/* Write the word */
|
||||
|
||||
*(uint32_t *)address = value;
|
||||
wait_for_flash_ready();
|
||||
|
||||
/* Return to read-only mode */
|
||||
|
||||
putreg32(NVMC_CONFIG_REN, NRF52_NVMC_CONFIG);
|
||||
nrf_mem_barrier();
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_write_bytes
|
||||
*
|
||||
* Description:
|
||||
* Write consecutive bytes to flash.
|
||||
*
|
||||
* Input Parameter:
|
||||
* address - Address to write to.
|
||||
* src - Pointer to data to copy from.
|
||||
* num_bytes - Number of bytes in src to write.
|
||||
*
|
||||
* Returned Values:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void nrf_nvmc_write_bytes(uint32_t address, const uint8_t *src,
|
||||
uint32_t num_bytes)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0; i < num_bytes; i++)
|
||||
{
|
||||
nrf_nvmc_write_byte(address + i, src[i]);
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_write_words
|
||||
*
|
||||
* Description:
|
||||
* Write consecutive words to flash.
|
||||
*
|
||||
* Input Parameter:
|
||||
* address - Address to write to.
|
||||
* src - Pointer to data to copy from.
|
||||
* num_words - Number of words in src to write.
|
||||
*
|
||||
* Returned Values:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void nrf_nvmc_write_words(uint32_t address, const uint32_t *src,
|
||||
uint32_t num_words)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
/* Enable write */
|
||||
|
||||
putreg32(NVMC_CONFIG_WEN, NRF52_NVMC_CONFIG);
|
||||
nrf_mem_barrier();
|
||||
|
||||
for (i = 0; i < num_words; i++)
|
||||
{
|
||||
((uint32_t *)address)[i] = src[i];
|
||||
wait_for_flash_ready();
|
||||
}
|
||||
|
||||
/* Return to read-only mode */
|
||||
|
||||
putreg32(NVMC_CONFIG_REN, NRF52_NVMC_CONFIG);
|
||||
nrf_mem_barrier();
|
||||
}
|
||||
329
arch/arm/src/nrf52/nrf52_nvmc.h
Normal file
329
arch/arm/src/nrf52/nrf52_nvmc.h
Normal file
@ -0,0 +1,329 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/nrf52/nrf52_nvmc.h
|
||||
*
|
||||
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Ported from the Nordic SDK, this is the original license:
|
||||
*
|
||||
* Copyright (c) 2012 - 2018, Nordic Semiconductor ASA
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_NRF52_NRF52_NVMC_H
|
||||
#define __ARCH_ARM_SRC_NRF52_NRF52_NVMC_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_page_erase
|
||||
*
|
||||
* Description:
|
||||
* Erase a page in flash. This is required before writing to any
|
||||
* address in the page.
|
||||
*
|
||||
* Input Parameter:
|
||||
* address - Start address of the page.
|
||||
*
|
||||
* Returned Values:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void nrf_nvmc_page_erase(uint32_t address);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_write_byte
|
||||
*
|
||||
* Description:
|
||||
* The function reads the word containing the byte, and then
|
||||
* rewrites the entire word.
|
||||
*
|
||||
* Input Parameter:
|
||||
* address - Address to write to.
|
||||
* value - Value to write.
|
||||
*
|
||||
* Returned Values:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void nrf_nvmc_write_byte(uint32_t address, uint8_t value);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_write_word
|
||||
*
|
||||
* Description:
|
||||
* Write a 32-bit word to flash.
|
||||
*
|
||||
* Input Parameter:
|
||||
* address - Address to write to.
|
||||
* value - Value to write.
|
||||
*
|
||||
* Returned Values:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void nrf_nvmc_write_word(uint32_t address, uint32_t value);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_write_bytes
|
||||
*
|
||||
* Description:
|
||||
* Write consecutive bytes to flash.
|
||||
*
|
||||
* Input Parameter:
|
||||
* address - Address to write to.
|
||||
* src - Pointer to data to copy from.
|
||||
* num_bytes - Number of bytes in src to write.
|
||||
*
|
||||
* Returned Values:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void nrf_nvmc_write_bytes(uint32_t address, const uint8_t *src,
|
||||
uint32_t num_bytes);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_write_words
|
||||
*
|
||||
* Description:
|
||||
* Write consecutive words to flash.
|
||||
*
|
||||
* Input Parameter:
|
||||
* address - Address to write to.
|
||||
* src - Pointer to data to copy from.
|
||||
* num_words - Number of words in src to write.
|
||||
*
|
||||
* Returned Values:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void nrf_nvmc_write_words(uint32_t address, const uint32_t *src,
|
||||
uint32_t num_words);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_enable_icache
|
||||
*
|
||||
* Description:
|
||||
* Enable I-Cache for Flash
|
||||
*
|
||||
* Input Parameter:
|
||||
* flag - Flag to enable or disable.
|
||||
*
|
||||
* Returned Values:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void nrf_nvmc_enable_icache(bool flag);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_enable_profile
|
||||
*
|
||||
* Description:
|
||||
* Enable profiling I-Cache for flash
|
||||
*
|
||||
* Input Parameter:
|
||||
* flag - Flag to enable or disable.
|
||||
*
|
||||
* Returned Values:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void nrf_nvmc_enable_profile(bool flag);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_get_profiling_ihit
|
||||
*
|
||||
* Description:
|
||||
* Get I-Hit for profiling
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* Number of cache hits.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t nrf_nvmc_get_profiling_ihit(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_get_profiling_imiss
|
||||
*
|
||||
* Description:
|
||||
* Get I-Miss for profiling
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* Number of cache misses.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t nrf_nvmc_get_profiling_imiss(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_get_flash_size
|
||||
*
|
||||
* Description:
|
||||
* Get internal FLASH size
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* Flash size.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t nrf_nvmc_get_flash_size(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_get_ram_size
|
||||
*
|
||||
* Description:
|
||||
* Get internal RAM size.
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* RAM size.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t nrf_nvmc_get_ram_size(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: system_image_start_address
|
||||
*
|
||||
* Description:
|
||||
* Get system image code begin address.
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* Address where code starts.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t system_image_start_address(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: system_image_ro_section_end
|
||||
*
|
||||
* Description:
|
||||
* Get system image end address of read only section.
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* The end address of the RO section.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t system_image_ro_section_end(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: system_image_data_section_size
|
||||
*
|
||||
* Description:
|
||||
* Get system image data section size
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* The size of the data section.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t system_image_data_section_size(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_read_dev_id0
|
||||
*
|
||||
* Description:
|
||||
* Get device identifier 0
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* Value of ID0
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t nrf_nvmc_read_dev_id0(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf_nvmc_read_dev_id1
|
||||
*
|
||||
* Description:
|
||||
* Get device identifier 1
|
||||
*
|
||||
* Input Parameter:
|
||||
* None
|
||||
*
|
||||
* Returned Values:
|
||||
* Value of ID1
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t nrf_nvmc_read_dev_id1(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_NRF52_NRF52_NVMC_H */
|
||||
|
||||
@ -54,6 +54,7 @@
|
||||
#include "nrf52_start.h"
|
||||
#include "nrf52_gpio.h"
|
||||
#include "nrf52_serial.h"
|
||||
#include "nrf52_nvmc.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
@ -220,6 +221,12 @@ void __start(void)
|
||||
/* Initialize the FPU (if configured) */
|
||||
|
||||
nrf52_fpuconfig();
|
||||
|
||||
#ifdef CONFIG_NRF52_FLASH_PREFETCH
|
||||
nrf_nvmc_enable_icache(true);
|
||||
nrf_nvmc_enable_profile(true);
|
||||
#endif
|
||||
|
||||
showprogress('D');
|
||||
|
||||
/* Perform early serial initialization */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user