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xtensa/esp32: Fix interrupt flag configuration for DMA transfers

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Previously SPI interrupts were enabled on DMA initialization. But since
the addition of SPI Mixed mode it created a side-effect, breaking
polling transfers. So now interrupts are enabled before the DMA
transactions and disabled once they are finished.
Furthermore, the transaction done flag is also cleared before a new
transaction starts.
This commit is contained in:
Gustavo Henrique Nihei 2021-03-20 22:37:09 -03:00 committed by Xiang Xiao
parent 20d24fe148
commit e4efa9dfa7
1 changed files with 5 additions and 2 deletions
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7
arch/xtensa/src/esp32/esp32_spi.c
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@ -889,6 +889,9 @@ static void esp32_spi_dma_exchange(FAR struct esp32_spi_priv_s *priv,
tp = rp;
}
esp32_spi_reset_regbits(priv, SPI_SLAVE_OFFSET, SPI_TRANS_DONE_M);
esp32_spi_set_regbits(priv, SPI_SLAVE_OFFSET, SPI_INT_EN_M);
while (bytes)
{
esp32_spi_set_reg(priv, SPI_DMA_IN_LINK_OFFSET, 0);
@ -943,6 +946,8 @@ static void esp32_spi_dma_exchange(FAR struct esp32_spi_priv_s *priv,
rp += n;
}
esp32_spi_reset_regbits(priv, SPI_SLAVE_OFFSET, SPI_INT_EN_M);
#ifdef CONFIG_XTENSA_IMEM_USE_SEPARATE_HEAP
if (esp32_ptr_extram(rxbuffer))
{
@ -1303,8 +1308,6 @@ static void esp32_spi_init(FAR struct spi_dev_s *dev)
esp32_spi_set_reg(priv, SPI_DMA_CONF_OFFSET, SPI_OUT_DATA_BURST_EN_M |
SPI_INDSCR_BURST_EN_M |
SPI_OUTDSCR_BURST_EN_M);
esp32_spi_set_regbits(priv, SPI_SLAVE_OFFSET, SPI_INT_EN_M);
}
esp32_spi_setfrequency(dev, config->clk_freq);