SAM3X/Arduino Due: Fix typo in sam3x_periphclks.h; add SCLK definitions to board.h header file. From Fabien Comte
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@ -52,8 +52,8 @@
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#define sam_enableperiph0(s) putreg32((1 << (s)), SAM_PMC_PCER0)
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#define sam_enableperiph1(s) putreg32((1 << ((s) - 32)), SAM_PMC_PCER1)
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#define sam_disableperiph0(s) putreg32((1 << (s)), SAM_PMC_PDER0)
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#define sam_disableperiph1(s) putreg32((1 << ((s) - 32)), SAM_PMC_PDER1)
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#define sam_disableperiph0(s) putreg32((1 << (s)), SAM_PMC_PCDR0)
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#define sam_disableperiph1(s) putreg32((1 << ((s) - 32)), SAM_PMC_PCDR1)
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#define sam_supc_enableclk() sam_enableperiph0(SAM_PID_SUPC)
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#define sam_rstc_enableclk() sam_enableperiph0(SAM_PID_RSTC)
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@ -67,7 +67,7 @@
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# define RTT_PRES 1
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#endif
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#define RTT_FCLK (BOARD_SLCK_FREQUENCY/RTT_PRES)
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#define RTT_FCLK (BOARD_SCLK_FREQUENCY/RTT_PRES)
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#define RTT_MAXTIMEOUT ((1000000ULL * (0x100000000ULL)) / RTT_FCLK)
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/* Configuration ************************************************************/
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@ -66,7 +66,7 @@
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/* TODO: Allow selection of any of the input clocks */
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#define TC_FCLK (BOARD_SLCK_FREQUENCY)
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#define TC_FCLK (BOARD_SCLK_FREQUENCY)
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#define TC_MAXTIMEOUT ((1000000ULL * (1ULL + TC_RVALUE_MASK)) / TC_FCLK)
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/* Configuration ************************************************************/
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@ -71,7 +71,7 @@
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* 1000 * 64 / Fmin = 49.93 msec
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*/
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#define WDT_FCLK (BOARD_SLCK_FREQUENCY / 128)
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#define WDT_FCLK (BOARD_SCLK_FREQUENCY / 128)
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#define WDT_MAXTIMEOUT ((1000 * (WDT_MR_WDV_MAX+1)) / WDT_FCLK)
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/* Configuration ************************************************************/
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@ -61,11 +61,11 @@
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* 32768 kHz).
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*/
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#ifndef BOARD_SLCK_FREQUENCY
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# define BOARD_SLCK_FREQUENCY 32768
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#ifndef BOARD_SCLK_FREQUENCY
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# define BOARD_SCLK_FREQUENCY 32768
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#endif
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#define WDT_FREQUENCY (BOARD_SLCK_FREQUENCY / 128)
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#define WDT_FREQUENCY (BOARD_SCLK_FREQUENCY / 128)
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/* At 32768Hz, the maximum timeout value will be:
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*
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@ -64,6 +64,10 @@
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* CPU clock: 84MHz
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*/
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#define BOARD_32KOSC_FREQUENCY (32768)
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#define BOARD_SCLK_FREQUENCY (BOARD_32KOSC_FREQUENCY)
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#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
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/* Main oscillator register settings.
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*
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* The start up time should be should be:
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@ -97,7 +101,6 @@
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/* Resulting frequencies */
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#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
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#define BOARD_PLLA_FREQUENCY (168000000) /* PLLACK: 14 * 12Mhz / 1 */
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#define BOARD_MCK_FREQUENCY (84000000) /* MCK: PLLACK / 2 */
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#define BOARD_CPU_FREQUENCY (84000000) /* CPU: MCK */
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@ -65,7 +65,7 @@
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#define BOARD_CKGR_MOR_MOSCXTST (63 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */
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#define BOARD_32KOSC_FREQUENCY (32768)
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#define BOARD_SLCK_FREQUENCY (BOARD_32KOSC_FREQUENCY)
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#define BOARD_SCLK_FREQUENCY (BOARD_32KOSC_FREQUENCY)
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#define BOARD_MAINOSC_FREQUENCY (12000000)
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#ifdef CONFIG_SAM34_UDP
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