diff --git a/arch/arm/src/sam34/sam3x_periphclks.h b/arch/arm/src/sam34/sam3x_periphclks.h index a6b106cc88..f20a86a0e8 100644 --- a/arch/arm/src/sam34/sam3x_periphclks.h +++ b/arch/arm/src/sam34/sam3x_periphclks.h @@ -52,8 +52,8 @@ #define sam_enableperiph0(s) putreg32((1 << (s)), SAM_PMC_PCER0) #define sam_enableperiph1(s) putreg32((1 << ((s) - 32)), SAM_PMC_PCER1) -#define sam_disableperiph0(s) putreg32((1 << (s)), SAM_PMC_PDER0) -#define sam_disableperiph1(s) putreg32((1 << ((s) - 32)), SAM_PMC_PDER1) +#define sam_disableperiph0(s) putreg32((1 << (s)), SAM_PMC_PCDR0) +#define sam_disableperiph1(s) putreg32((1 << ((s) - 32)), SAM_PMC_PCDR1) #define sam_supc_enableclk() sam_enableperiph0(SAM_PID_SUPC) #define sam_rstc_enableclk() sam_enableperiph0(SAM_PID_RSTC) diff --git a/arch/arm/src/sam34/sam_rtt.c b/arch/arm/src/sam34/sam_rtt.c index fc9ddd1706..e417a65650 100644 --- a/arch/arm/src/sam34/sam_rtt.c +++ b/arch/arm/src/sam34/sam_rtt.c @@ -67,7 +67,7 @@ # define RTT_PRES 1 #endif -#define RTT_FCLK (BOARD_SLCK_FREQUENCY/RTT_PRES) +#define RTT_FCLK (BOARD_SCLK_FREQUENCY/RTT_PRES) #define RTT_MAXTIMEOUT ((1000000ULL * (0x100000000ULL)) / RTT_FCLK) /* Configuration ************************************************************/ diff --git a/arch/arm/src/sam34/sam_tc.c b/arch/arm/src/sam34/sam_tc.c index b955d6bb03..1f866726a6 100644 --- a/arch/arm/src/sam34/sam_tc.c +++ b/arch/arm/src/sam34/sam_tc.c @@ -66,7 +66,7 @@ /* TODO: Allow selection of any of the input clocks */ -#define TC_FCLK (BOARD_SLCK_FREQUENCY) +#define TC_FCLK (BOARD_SCLK_FREQUENCY) #define TC_MAXTIMEOUT ((1000000ULL * (1ULL + TC_RVALUE_MASK)) / TC_FCLK) /* Configuration ************************************************************/ diff --git a/arch/arm/src/sam34/sam_wdt.c b/arch/arm/src/sam34/sam_wdt.c index 7886b78429..40d59d10a8 100644 --- a/arch/arm/src/sam34/sam_wdt.c +++ b/arch/arm/src/sam34/sam_wdt.c @@ -71,7 +71,7 @@ * 1000 * 64 / Fmin = 49.93 msec */ -#define WDT_FCLK (BOARD_SLCK_FREQUENCY / 128) +#define WDT_FCLK (BOARD_SCLK_FREQUENCY / 128) #define WDT_MAXTIMEOUT ((1000 * (WDT_MR_WDV_MAX+1)) / WDT_FCLK) /* Configuration ************************************************************/ diff --git a/arch/arm/src/sama5/sam_wdt.c b/arch/arm/src/sama5/sam_wdt.c index 8d8d10dcd8..706f8e8a39 100644 --- a/arch/arm/src/sama5/sam_wdt.c +++ b/arch/arm/src/sama5/sam_wdt.c @@ -61,11 +61,11 @@ * 32768 kHz). */ -#ifndef BOARD_SLCK_FREQUENCY -# define BOARD_SLCK_FREQUENCY 32768 +#ifndef BOARD_SCLK_FREQUENCY +# define BOARD_SCLK_FREQUENCY 32768 #endif -#define WDT_FREQUENCY (BOARD_SLCK_FREQUENCY / 128) +#define WDT_FREQUENCY (BOARD_SCLK_FREQUENCY / 128) /* At 32768Hz, the maximum timeout value will be: * diff --git a/configs/arduino-due/include/board.h b/configs/arduino-due/include/board.h index e47158116a..c537c783c5 100644 --- a/configs/arduino-due/include/board.h +++ b/configs/arduino-due/include/board.h @@ -64,6 +64,10 @@ * CPU clock: 84MHz */ +#define BOARD_32KOSC_FREQUENCY (32768) +#define BOARD_SCLK_FREQUENCY (BOARD_32KOSC_FREQUENCY) +#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */ + /* Main oscillator register settings. * * The start up time should be should be: @@ -97,7 +101,6 @@ /* Resulting frequencies */ -#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */ #define BOARD_PLLA_FREQUENCY (168000000) /* PLLACK: 14 * 12Mhz / 1 */ #define BOARD_MCK_FREQUENCY (84000000) /* MCK: PLLACK / 2 */ #define BOARD_CPU_FREQUENCY (84000000) /* CPU: MCK */ diff --git a/configs/sam4s-xplained-pro/include/board.h b/configs/sam4s-xplained-pro/include/board.h index 13ebfd37d1..2158bfb348 100644 --- a/configs/sam4s-xplained-pro/include/board.h +++ b/configs/sam4s-xplained-pro/include/board.h @@ -65,7 +65,7 @@ #define BOARD_CKGR_MOR_MOSCXTST (63 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ #define BOARD_32KOSC_FREQUENCY (32768) -#define BOARD_SLCK_FREQUENCY (BOARD_32KOSC_FREQUENCY) +#define BOARD_SCLK_FREQUENCY (BOARD_32KOSC_FREQUENCY) #define BOARD_MAINOSC_FREQUENCY (12000000) #ifdef CONFIG_SAM34_UDP